An Improved Autonomous Current-Fed Push-Pull Parallel-Resonant Inverter for Inductive Power Transfer System

Anning Yu 1,2 , Xiaoping Zeng 1,2,*, Dong Xiong 1, Mi Tian 1,2 and Junbing Li 1,2 1 School of Microelectronics and Communication Engineering, Chongqing University, 174 Shazheng Street, Shapingba District, Chongqing 400044, China; anning865@163.com (A.Y.); xiongd@cqu.edu.cn (D.X.); tianmi@cqu.edu.cn (M.T.); lijunbing2017@163.com (J.L.) 2 Chongqing Engineering Laboratory of High Performance Integrated Circuits, Chongqing 400044, China * Correspondence: zxp@cqu.edu.cn; Tel.: +86-23-6511-1966


Introduction
Inductive power transfer (IPT) technology [1], characterized by convenience and safety, has many potential applications in portable devices [2], wireless sensor networks (WSNs) [3], implant medical devices (IMDs) [4][5][6][7], and electrical vehicles [8][9][10].In general, it is recommended to drive the primary-side inverter of IPT systems at zero phase angle (ZPA) operation in order to minimize the volt-amp (VA) rating of the source supply.Moreover, the resonant inverter can achieve zero-voltage switching (ZVS) or zero-current switching (ZCS) operation with less switching losses and electromagnetic interference (EMI) at ZPA or a similar condition [11][12][13].However, it is often a great challenge to maintain ZVS or ZCS operation with variable couplings, caused by nonconstant coil distances, misalignment, shape deformation, or metal object proximity.Especially when it occurs to the frequency bifurcation region, the power transfer capability and efficiency can deteriorate rapidly at the original resonant frequency [2,13].
Various solutions have been proposed in the previous literature.One is dynamic tuning of reactive elements in either the primary or the secondary compensation network through variable inductors [14][15][16], switchable capacitor bank [9], or transistor-controlled variable capacitor [17], respectively.This method aims to keep the ZVS frequency fixed under coupling variation, although it needs more switching devices, passive components, and even a complicated control unit.Moreover, another common method is directly adjusting the inverter frequency to the new ZVS frequency as the magnetic coupling changes.For instance, in [18], the authors present a closed-loop automatic frequency tuning system by an optimum frequency tracking method in an overcoupled regime with the aid of an extra control unit.Similarly, in [19], an automatic adaptive frequency tracking system was implemented on the basis of feedback power efficiency via 2.45 GHz data transmission.The drawbacks of these systems are the cost and time delay due to the existence of communication and control units.To achieve a cost-effective small-for-size IPT system, an autonomous current-fed push-pull inverter used in a parallel-resonant circuit structure was proposed in [20,21], and this system has the ability to naturally track the ZPA frequency of a parallel-parallel resonant network without any extra control or communication units.What is more, the two active power switches in the inverter are common ground, and consequently, the gate drive structure is rather simple with no need for a high-side gate drive.With these advantages, this inverter structure is a potential choice for dynamic applications, but the gate drive problem is often neglected in practice, especially in low-power applications.The authors in [22] proposed and analyzed this issue, then they modified the inverter by adding speedup capacitors in the gate drive circuit, which reduced the gate losses and extended the switching frequency range into the MHz region.However, the value of speedup capacitors should be calculated and selected carefully in advance based on the predefined drive resistances and operating frequency, which means it is not suitable in dynamic applications.
This paper presents an improved current-fed push-pull parallel-resonant inverter with a powerful gate drive circuit and flexible input source configuration for dynamic applications.Compared with the traditional inverter, it enhances the gate drive capability and thus reduces the gate losses as well as the switching losses in a wide range.Furthermore, the maximum power transfer limitation is removed, and the system's overall efficiency increases due to the input voltage adjustment.First, the impedance characteristic of a parallel-parallel resonant circuit was analyzed theoretically and the exact and approximate solutions of ZPA frequencies in both bifurcation and bifurcation-free regions were derived.Then, the gate drive losses and switching losses were analyzed and simulated, and the corresponding improvements are presented.Last, an improved inverter prototype is proposed, and the results are compared and analyzed with those of a traditional inverter.

Operating Principle of Autonomous Current-Fed Push-Pull Circuit
A traditional autonomous current-fed push-pull IPT system, including transmitter and receiver, is presented in Figure 1 [20,21].Compared with the resonant inductors (L 1 and L 2 ), two relatively large inductive chokes (L choke1 and L choke2 ) are connected serially with the DC input voltage source and form a quasi-current source.Under a steady-state condition, the two inductive chokes divide the DC current into two halves and feed the current into the primary LC tank (L 1 and C 1 ) alternately.Therefore, the current injected into the primary LC tank is an approximate square waveform with half the magnitude of the DC current.Then, AC power is transferred from the primary resonant LC tank to the secondary side (L 2 and C 2 ) by magnetically coupling, and then provided to the terminal DC load R load after the rectifier bridge (D s1 -D s4 ) and LC filter L 3 and C 3 .According to [23], the rectifier, LC filter, and DC load can be replaced by an AC equivalent resistance R eq = π 2 R load /8, and the equivalent circuit of current-fed push-pull parallel-resonant circuit can be simplified, as shown in Figure 2.  One assumption of the equivalent circuit in Figure 2 is that the two MOSFETs (metal oxide silicon field effect transistors) are always driven at the resonant frequency of the magnetically coupled primary LC tank, and this is achieved by the gate drive circuit of the two MOSFETs going into the blue dashed line in Figure 1 ) take the resonant voltage signal at the drain of one MOSFET to the gate of the other MOSFET like a bistable multivibrator.When the inverter is powered on, one of the two power MOSFETs will turn on first due to their parameter differences, noise, and disturbances, which makes the current inject into the LC tank and the TX tank begin to oscillate.At steady state, when one power MOSFET, such as 1 M , turns on, the drain voltage M .So, the diode 1 D is reverse biased until the resonant voltage falls below the DC voltage.A similar procedure occurs for the other side of the LC tank, but in the opposite direction, in the second half-cycle.The waveforms of corresponding voltages and currents in one switching cycle are shown in Figure 3.One assumption of the equivalent circuit in Figure 2 is that the two MOSFETs (metal oxide silicon field effect transistors) are always driven at the resonant frequency of the magnetically coupled primary LC tank, and this is achieved by the gate drive circuit of the two MOSFETs going into the blue dashed line in Figure 1 ) take the resonant voltage signal at the drain of one MOSFET to the gate of the other MOSFET like a bistable multivibrator.When the inverter is powered on, one of the two power MOSFETs will turn on first due to their parameter differences, noise, and disturbances, which makes the current inject into the LC tank and the TX tank begin to oscillate.At steady state, when one power MOSFET, such as 1 M , turns on, the drain voltage M .So, the diode 1 D is reverse biased until the resonant voltage falls below the DC voltage.A similar procedure occurs for the other side of the LC tank, but in the opposite direction, in the second half-cycle.The waveforms of corresponding voltages and currents in one switching cycle are shown in Figure 3.One assumption of the equivalent circuit in Figure 2 is that the two MOSFETs (metal oxide silicon field effect transistors) are always driven at the resonant frequency of the magnetically coupled primary LC tank, and this is achieved by the gate drive circuit of the two MOSFETs going into the blue dashed line in Figure 1.The gates of the two MOSFETs (M 1 and M 2 ) are connected with two large pull-down resistors (R 3 and R 4 ) to ground and two current limiting resistors (R 1 and R 2 ) to the DC voltage source.In addition, two cross-connected diodes (D 1 and D 2 ) take the resonant voltage signal at the drain of one MOSFET to the gate of the other MOSFET like a bistable multivibrator.When the inverter is powered on, one of the two power MOSFETs will turn on first due to their parameter differences, noise, and disturbances, which makes the current inject into the LC tank and the TX tank begin to oscillate.At steady state, when one power MOSFET, such as M 1 , turns on, the drain voltage v A is almost zero to ground, which clamps the gate voltage of M 2 at just a forward diode drop above zero by D 2 and thus keeps M 2 in the off state.Meanwhile, the voltage at terminal-A of D 1 is fixed at the gate voltage of M 1 , which is approximately the DC voltage (R 3 R 1 ), and the voltage at terminal-K of D 1 is equal to the resonant sinusoidal voltage at the drain of M 2 .So, the diode D 1 is reverse biased until the resonant voltage falls below the DC voltage.A similar procedure occurs for the other side of the LC tank, but in the opposite direction, in the second half-cycle.The waveforms of corresponding voltages and currents in one switching cycle are shown in Figure 3.According to the volt-second balance of an inductor at steady state, the average voltages across the inductive chokes are zero and the following relationship can be obtained as [23]: where A V and B V are the magnitude of resonant sinusoidal voltage.

ZPA Frequency Analysis of Parallel-Resonant Circuit
In order to keep the inverter at ZVS operation with varying coupling coefficients, it is necessary to analyze the impedance characteristic of the parallel-parallel resonant circuit.
Due to the bandpass filter characteristic of a parallel-resonant circuit, all the other harmonics are filtered out except for the fundamental component, so the rectangular wave current source DC i in Figure 2 can be replaced by its fundamental component-sinusoidal current source s I after ignoring the higher harmonics, and the relationship is 2 .
With the sinusoidal current source and the mutual inductance coupling transformer model, the equivalent circuit can be simplified, as in Figure 4a.It can be seen that the load impedance of the secondary side s Z is expressed as Additionally, the reflected impedance from the secondary to primary side r Z , which is in series with primary inductor L1, can be obtained as According to the volt-second balance of an inductor at steady state, the average voltages across the inductive chokes are zero and the following relationship can be obtained as [23]: where V A and V B are the magnitude of resonant sinusoidal voltage.

ZPA Frequency Analysis of Parallel-Resonant Circuit
In order to keep the inverter at ZVS operation with varying coupling coefficients, it is necessary to analyze the impedance characteristic of the parallel-parallel resonant circuit.
Due to the bandpass filter characteristic of a parallel-resonant circuit, all the other harmonics are filtered out except for the fundamental component, so the rectangular wave current source i DC in Figure 2 can be replaced by its fundamental component-sinusoidal current source I s after ignoring the higher harmonics, and the relationship is With the sinusoidal current source and the mutual inductance coupling transformer model, the equivalent circuit can be simplified, as in Figure 4a.It can be seen that the load impedance of the secondary side Z s is expressed as Additionally, the reflected impedance from the secondary to primary side Z r , which is in series with primary inductor L 1 , can be obtained as where R r and X r represent the reflected resistance and reactance, respectively.M is the mutual inductance.Thus, the circuit can be further simplified, as in Figure 4b.
Energies 2018, 11, x FOR PEER REVIEW 5 of 17 where r R and r X represent the reflected resistance and reactance, respectively.M is the mutual inductance.Thus, the circuit can be further simplified, as in Figure 4b.The input impedance p Z of the resonant LC tank in Figure 4b can be written as Substituting Equations ( 3) and ( 4) into ( 5) and the mutual inductance where k is the coupling coefficient, the input impedance p Z can be expressed as Here, we get the ZPA frequency points of the input impedance p Z by equating its imaginary component to zero, and with Mathmatica software, it can be expanded as ] On the assumption that both sides of the network have the same free resonant angular frequency , the complex form of Equation ( 8) can be simplified as The input impedance Z p of the resonant LC tank in Figure 4b can be written as ( Substituting Equations ( 3) and ( 4) into ( 5) and the mutual inductance where k is the coupling coefficient, the input impedance Z p can be expressed as Here, we get the ZPA frequency points of the input impedance Z p by equating its imaginary component to zero, and with Mathmatica software, it can be expanded as On the assumption that both sides of the network have the same free resonant angular frequency the complex form of Equation ( 8) can be simplified as where u is defined as the normalized frequency u = ω/ω 0 and Q is the quality factor Q = R eq /ω 0 L 2 .Furthermore, the symbols A and B are denoted as Energies 2018, 11, 2653 6 of 16 It is obvious that the solutions of Equation ( 9) depend on two equations (ignoring the solution ω = 0): the trough equation A = 0 and ridge equation

The Trough Equation
The discriminant ∆ of the trough equation is nonnegative, so there are two roots of the equation with opposite signs.After excluding the impractical negative root, we take the positive root as the trough point, which is the middle bifurcation frequency

The Ridge Equation
The ridge equation is a biquadratic equation, which can be treated as a quadratic equation with x = u 2 , and it can be simplified as In the bifurcation region, (12) has two positive roots.According to the Descartes' sign rule and the nonnegative discriminant principle, we get the following preconditions: where k b is denoted as the critical bifurcation coupling coefficient, representing the key point between the bifurcation region and the bifurcation-free region.In the meantime, the bifurcation frequency at the critical bifurcation coupling point is √ 2 can always satisfy Equation (13).Under the preconditions of ( 13) and ( 14), the roots of Equation ( 12) are and when Q 1 holds, (15) can also be simplified as The two ZPA frequencies derived from the ridge equation (the small bifurcation frequency ω − and the great bifurcation frequency ω + ) sit on both sides of the free resonant angular frequency ω 0 or the middle bifurcation frequency ω m , and their relationship is ω − ≤ ω 0 ≤ ω m ≤ ω + .For intuitive understanding, three numerical simulations were performed with different coupling coefficients (k = 0.1, 0.2, and 0.3), and the parameters are: The results of the phase angle and real part of Z p are plotted in Figure 5.
and the great bifurcation frequency   ) sit on both sides of the free resonant angular frequency 0  or the middle bifurcation frequency m  , and their relationship is . For intuitive understanding, three numerical simulations were performed with different coupling coefficients (k = 0.1, 0.2, and 0.3), and the parameters are: According to Equation ( 14), the bifurcation coupling coefficient kb is about 0.1312 and the free resonant frequency f0 is 660 kHz for this system.As illustrated in Figure 5a, there exist three ZPA frequencies in the bifurcation region (i.e., k = 0.3 or k = 0.2).The middle bifurcation frequency is near the free resonant frequency f0, while the other two ZPA frequencies are distributed at both sides of the middle bifurcation frequency fm.Furthermore, the deviation between the middle bifurcation frequency fm and the free resonant frequency f0 become larger as the coupling coefficient increases, as does the distance between the other two ZPA frequencies.In the bifurcation-free region (i.e., k = 0.1), there is only one ZPA frequency fm near the free resonant frequency f0.According to Equation ( 14), the bifurcation coupling coefficient k b is about 0.1312 and the free resonant frequency f 0 is 660 kHz for this system.As illustrated in Figure 5a, there exist three ZPA frequencies in the bifurcation region (i.e., k = 0.3 or k = 0.2).The middle bifurcation frequency is near the free resonant frequency f 0 , while the other two ZPA frequencies are distributed at both sides of the middle bifurcation frequency f m .Furthermore, the deviation between the middle bifurcation frequency f m and the free resonant frequency f 0 become larger as the coupling coefficient increases, as does the distance between the other two ZPA frequencies.In the bifurcation-free region (i.e., k = 0.1), there is only one ZPA frequency f m near the free resonant frequency f 0 .
Figure 5b illustrates the real part of input impedance Z p for different coupling conditions.It is obvious that two impedance peaks appear at the two-side ZPA frequencies f + , f − and one impedance trough at the middle bifurcation frequency f m in the bifurcation region (i.e., k = 0.3 or k = 0.2).According to [6], the output power of the inverter is proportional to the input DC voltage, and the relationship is where R P is the real part of Z p .The two impedance peaks at both sides are close to each other and can get the approximate output power at the two ZPA frequencies, while more power can be obtained at the middle bifurcation frequency under the same coupling condition due to the low input impedance.However, the ZVS operation to the middle bifurcation frequency is unstable without an external complex controller [25].When in the bifurcation-free region (i.e., k = 0.1), there exists only one ZPA frequency near the input impedance peak.The simulation results imply that the inverter should track the small or great bifurcation frequency in the bifurcation region and the middle bifurcation frequency in bifurcation-free region to maintain ZVS operation against coupling variation.

Gate Circuit Analysis
According to the analysis in Section 2, the traditional autonomous current-fed push-pull inverter in Figure 1 can track the ZPA frequency of a parallel-resonant circuit automatically by the feedback zero-crossing resonant voltage signals from the LC tank.In practice, the selection of the current limiting resistance R 1 and R 2 is a dilemma between gate drive losses and switching losses.To explain this, a SPICE simulation using the circuit parameters and components listed in Tables 1 and 2 at 12 V DC input was carried out in LTspice XVII under the coupling coefficient k = 0.18, and the waveforms of the gate voltage and current are shown in Figure 6.
Parameters of the primary and secondary side coils L 1 and L 2 .D connected with the drain of 1 M forms a current leakage path with resistance 2 R , and so does the diode 1  D with resistance 1 R in the next half-cycle.The lower part of Figure 6 shows that the current flowing through 1  R is about 116 mA when 1 M turns off and the power loss on the two current-limiting resistances is about 1.3 W. In order to reduce this gate loss, a high value of 1  R and 2 R is preferred.

Parameters
For another thing, the current limiting resistance 1 R or 2 R with the input parasitic capacitor  For one thing, when one of the MOSFETs turns on-say M 1 is on and M 2 is off-the clamp diode D 2 connected with the drain of M 1 forms a current leakage path with resistance R 2 , and so does the diode D 1 with resistance R 1 in the next half-cycle.The lower part of Figure shows that the current flowing through R 1 is about 116 mA when M 1 turns off and the power loss on the two current-limiting resistances is about 1.3 W. In order to reduce this gate loss, a high value of R 1 and R 2 is preferred.For another thing, the current limiting resistance R 1 or R 2 with the input parasitic capacitor C iss of M 1 or M 2 constitutes a first-order RC circuit, which turns on the MOSFET by charging the input capacitor.The time constant τ = R 1 × C iss determines the charging speed and seriously affects the switching losses of the MOSFETs.As shown in the upper part of Figure 6, the gate voltage V gs1 rises slowly to approximately 8 V on account of the limited charging current.The turn-on switching delay t on and turn-off switching delay t o f f of the MOSFETs at a 603 kHz switching frequency are 279 ns and 297 ns, respectively, which may cause severe switching losses.In order to improve the signal quality and reduce switching losses, lower resistances R 1 and R 2 are needed.Therefore, in the traditional inverter structure, the contradiction between gate drive losses and switching losses cannot be solved at the same time.

Improved Inverter
An improved autonomous current-fed push-pull inverter is proposed in Figure 7. Two BJT (bipolar junction transistor) switches Q 1 and Q 2 with base resistances R 1 and R 2 supply the charging current to the gates of MOSFETs M 1 and M 2 alternatively, and they replace the current limiting resistances in the traditional design with zero voltage detection control by two cross-connected diodes D 1 and D 3 .Additionally, the other two cross-connected diodes D 2 and D 4 perform the same function for the MOSFETs as in the traditional design.One advantage of the improvements is that with the characteristic of high current transfer ratio h FE , low saturation voltage V CE(sat) , and low saturation resistance R CE(sat) , the transistors Q 1 and Q 2 pull a high charging current to the gates of the MOSFETs, which speeds up the turn-on procedure of the MOSFET and maintains the gate voltage close to the drive source voltage.Meanwhile, it is possible to apply a high value of R 1 and R 2 to decrease the leakage current due to the low base current I B of transistors.A relevant simulation was carried out using the parameters and components listed in Tables 2 and 3 at V DC = 12 V and V drive = 12 V under the same coupling condition.Corresponding waveforms are presented in Figure 8, and it is obvious that the waveform of gate voltage V gs1 is improved and the voltage is maintained at a 12 V drive source voltage when M 1 turns on.The turn-on switching delay t on and turn-off switching delay t o f f of MOSFETs at a 608 kHz switching frequency are 67 ns and 72 ns, respectively, which are obviously shorter than those in Figure 6.In addition, the leakage current of R 1 is down to 12 mA and the gate loss is close to 1/10 of that in traditional circuit simulation.ns, respectively, which are obviously shorter than those in Figure 6.In addition, the leakage current of 1 R is down to 12 mA and the gate loss is close to 1/10 of that in traditional circuit simulation.Table 3. Parameters and components of the improved circuit.
. The schematic of an improved autonomous current-fed push-pull IPT system.Another advantage of the proposed inverter is the separation between the DC voltage source V DC and drive voltage source V drive .In the traditional inverter, the value of the DC voltage source is often restricted to a certain range below the maximum gate voltage of the MOSFET, avoiding device damage.However, this hinders the possibility of increasing the transmission power regarding Equation (17).The separation of voltage sources removes this transmission power restriction by increasing the DC voltage source and maintaining the gate voltage constant simultaneously, which makes the design more flexible in practice.A simulation with the same parameters as those in Tables 2 and 3 was carried out at V DC = 24 V and V drive = 12 V under the same coupling condition.In Figure 9, the magnitude of V A is increased to about 76 V, while the gate voltage V gs1 and the leakage current i R1 remain the same as in Figure 8.The turn-on switching delay t on and turn-off switching delay t o f f of MOSFETs at a 611 kHz switching frequency are 44 ns and 56 ns, respectively, which are shorter than those in Figure 8 due to the decrease of input capacitor C iss caused by higher V ds (i.e., V A ). often restricted to a certain range below the maximum gate voltage of the MOSFET, avoiding device damage.However, this hinders the possibility of increasing the transmission power regarding Equation (17).The separation of voltage sources removes this transmission power restriction by increasing the DC voltage source and maintaining the gate voltage constant simultaneously, which makes the design more flexible in practice.A simulation with the same parameters as those in Tables 2 and 3 was carried out at

Experimental Setup
To verify the simulation results and the performance of the proposed inverter, a prototype system with two different inverters was implemented and is shown in Figure 10.

Experimental Setup
To verify the simulation results and the performance of the proposed inverter, a prototype system with two different inverters was implemented and is shown in Figure 10.

Experimental Setup
To verify the simulation results and the performance of the proposed inverter, a prototype system with two different inverters was implemented and is shown in Figure 10.In the experimental setup, the TX and RX coils were separated along their common axis with a distance from 2 cm to 20 cm in steps of 2 cm, and their parameters were the same as those in Table 2.For the sake of performance comparison, two inverters (traditional version and improved version) were manufactured according to the parameters listed in Tables 1 and 3.An oscilloscope (Tektronix: DPO3054) was used to record the voltage waveforms of the two MOSFETs and measure the load voltage magnitude V out simultaneously.A 12 V switching power was adopted as the drive source, whose current was measured by an ammeter (Fluke: 15B+), and the DC source was implemented using an adjustable voltage source with a current recording function.Three experiments were performed at different conditions: Experiment 1 (Exp 1) with a traditional inverter at V DC = 12 V, Experiment 2 (Exp 2) with the improved inverter at V DC = V drive = 12 V, and Experiment 3 (Exp 3) with the improved inverter at V DC = 24 V and V drive = 12 V.To avoid failure at start-up, the voltage of the DC source should be increased slowly during the experiment after turning on the drive source [26].

ZPA Frequency Bifurcation and Tracking
Before comparing the measured frequency points with the calculated ZPA frequency curves, it is necessary to calculate the relationship between coil distance and coupling coefficient.The mutual inductance between TX and RX coils can be computed by the Neumann formula for multiple turn coils [10,27] as where R is the distance between the incremental lines d → l m and d → l n , µ 0 is the permittivity of free space, and N 1 , N 2 are the turn numbers of the two coils, respectively.Equation ( 18) can also be expressed as [28] where r 1 and r 2 are the radii of the coils, and d is the distance between the two coils.By substituting Equation ( 19) into Equations ( 15) and ( 16), the theoretical results, as well as the measured data, are plotted in Figure 11.
m n 0 space, and 1 N , 2 N are the turn numbers of the two coils, respectively.Equation ( 18) can also be expressed as [28] 2 cos( ) where 1 r and 2 r are the radii of the coils, and d is the distance between the two coils.By substituting Equation (19) into Equations ( 15) and ( 16), the theoretical results, as well as the measured data, are plotted in Figure 11.In Figure 11, the measured frequency data are marked as data points (red circle for Exp 1 data f Exp1 and blue triangle for Exp 2 data f Exp2 ), the theoretical exact solutions in Equations ( 11) and (15) plotted as solid lines (green for the great bifurcation frequency f + , red for the small bifurcation frequency f − , and purple for the middle bifurcation frequency f m ) and the approximate solutions of Equation ( 16) are presented as dashed lines (blue for the great bifurcation approximate frequency f +app and yellow for the small bifurcation approximate frequency f −app ).
The frequency bifurcation phenomenon is obvious in Figure 11, and the great bifurcation frequency f + and the small bifurcation frequency f − will merge together at the bifurcation coupling point k b = 0.1067, i.e., d = 0.0891 m between the two coils, which is marked in the partial enlarged image.In the left bifurcation region, there always exists more than one ZPA frequency point and the middle bifurcation frequency becomes larger as the separation distance decreases, which is different from the series-series resonant circuit in [24].The measured frequency data of Exp 1 and Exp 2 are in good agreement with the small bifurcation curve, as well as the small bifurcation approximate frequency curve in the bifurcation region.While in the right bifurcation-free region, the great and small bifurcation frequency disappear and only the middle bifurcation frequency point exists, which approaches the free resonant frequency f 0 = 660 kHz infinitely, like the two approximate solutions, as separation distance increases.The measured frequency data of Exp 1 and Exp 2 also approach the free resonant frequency f 0 with the coils apart in the bifurcation-free region.The slight difference between the measured and calculated results may be from the ignoring of the coils' parasitic resistances and higher harmonics in the theoretical model.These results demonstrate that the improved inverter can track the ZPA frequency automatically, just as the traditional inverter does, which means the inverter can achieve ZVS operation as the coupling varies.resistances and higher harmonics in the theoretical model.These results demonstrate that the improved inverter can track the ZPA frequency automatically, just as the traditional inverter does, which means the inverter can achieve ZVS operation as the coupling varies.To better illustrate the difference between the three sets of measured data, we divided them into two comparison groups and depicted the output power and efficiency curves in Figures 13 and 14, respectively.Specifically, the efficiency  was computed as the ratio of the output power  Vi ), which implies that it is the system efficiency, including the gate drive circuit, in Exp 1.Additionally, one thing to note is that the drive source power (   To better illustrate the difference between the three sets of measured data, we divided them into two comparison groups and depicted the output power and efficiency curves in Figures 13 and 14, respectively.Specifically, the efficiency η was computed as the ratio of the output power (V 2 out /R load ) to the input power (V DC * i DC ), which implies that it is the system efficiency, including the gate drive circuit, in Exp 1.Additionally, one thing to note is that the drive source power (V drive * i drive ) was also accounted for in the input power when the two power sources were used in Exp 2 and Exp 3.

Power and Efficiency Comparison
Figure 13a,b show the comparison of output power and efficiency between Exp 1 and Exp 2, respectively, and it is noted that the maximum output power and efficiency are 8.74 W and 72.5% with the improved inverter at a 2 cm separation distance, while the output power and efficiency are only 7.68 W and 63.5% with the traditional inverter at the same gap.The increase of output power in Figure 13a is obvious over a short distance due to the larger switching losses in the traditional inverter under heavy load.As the distance increase, the reflected impedance from the secondary side is too small to be neglected and the output power is almost the same due to Equation (17).The increase of system efficiency in Figure 13b is obvious in the bifurcation region for the lower gate losses and switching losses of the improved gate drive circuit.As the coil distance increases, the deviation of switching losses between Exp 1 and Exp 2 becomes less, while the gate losses remain constant, so the gap between the two efficiency curves decreases but does not merge together.
two comparison groups and depicted the output power and efficiency curves in Figures 13 and 14, respectively.Specifically, the efficiency  was computed as the ratio of the output power  Vi ), which implies that it is the system efficiency, including the gate drive circuit, in Exp 1.Additionally, one thing to note is that the drive source power ( was also accounted for in the input power when the two power sources were used in Exp 2 and Exp 3. (a) (b) Figure 13a,b show the comparison of output power and efficiency between Exp 1 and Exp 2, respectively, and it is noted that the maximum output power and efficiency are 8.74 W and 72.5% with the improved inverter at a 2 cm separation distance, while the output power and efficiency are only 7.68 W and 63.5% with the traditional inverter at the same gap.The increase of output power in Figure 13a is obvious over a short distance due to the larger switching losses in the traditional inverter under heavy load.As the distance increase, the reflected impedance from the secondary side is too small to be neglected and the output power is almost the same due to Equation (17).The increase of system efficiency in Figure 13b is obvious in the bifurcation region for the lower gate losses and switching losses of the improved gate drive circuit.As the coil distance increases, the deviation of switching losses between Exp 1 and Exp 2 becomes less, while the gate losses remain constant, so the gap between the two efficiency curves decreases but does not merge together.Figure 14a,b show the comparison of output power and efficiency between Exp 2 and Exp 3, respectively.It is clear that the output power of Exp 3 at a 2 cm separation distance is 38.9 W, which is about 4 times that in Exp 2, and the other data in Figure 14a have a similar rule, which is consistent with Equation (17).Meanwhile, Figure 14b shows that a higher efficiency of 83.6% can be acquired in Exp 3 compared with Exp 2 at the same gap, and the main reason is that the constant gate drive loss is nearly same as in Exp 2, and the switching loss makes up a far smaller percentage of the total losses in Exp 3.
For a better understanding, the losses of each block in Exp 1, Exp 2, and Exp 3 at 2 cm are summarized in Table 4. Table 4 shows that the gate losses and switching losses make up a high percentage of the total losses in Exp 1, while the improved inverter reduces them significantly in Exp 2. Although the gate losses and switching losses make up a far smaller percentage in Exp 3, the losses caused by the parasitic resistances in the TX and RX tank increase rapidly and make up a relatively large percentage due to the large resonant current.Therefore, to further increase the efficiency of the improved system, more attention should be paid to low-loss inductors and capacitors.Figure 14a,b show the comparison of output power and efficiency between Exp 2 and Exp 3, respectively.It is clear that the output power of Exp 3 at a 2 cm separation distance is 38.9 W, which is about 4 times that in Exp 2, and the other data in Figure 14a have a similar rule, which is consistent with Equation (17).Meanwhile, Figure 14b shows that a higher efficiency of 83.6% can be acquired in Exp 3 compared with Exp 2 at the same gap, and the main reason is that the constant gate drive loss is nearly same as in Exp 2, and the switching loss makes up a far smaller percentage of the total losses in Exp 3.
For a better understanding, the losses of each block in Exp 1, Exp 2, and Exp 3 at 2 cm are summarized in Table 4. Table 4 shows that the gate losses and switching losses make up a high percentage of the total losses in Exp 1, while the improved inverter reduces them significantly in Exp 2. Although the gate losses and switching losses make up a far smaller percentage in Exp 3, the losses caused by the parasitic resistances in the TX and RX tank increase rapidly and make up a relatively large percentage due to the large resonant current.Therefore, to further increase the efficiency of the improved system, more attention should be paid to low-loss inductors and capacitors.

Conclusions
This paper presents an improved autonomous current-fed push-pull parallel-resonant inverter in an IPT application.The inverter achieved a ZVS operation automatically as the coupling coefficient varied by tracking the ZPA frequencies of a parallel-parallel resonant circuit, which was analyzed mathematically and verified by experiments.Moreover, the improved inverter increases the output power level and the system efficiency by reducing the gate losses and switching losses.Accordingly, two groups of comparative experiments were performed and verified that the improved inverter can increase the output power from 7.68 W to 8.74 W and overall efficiency from 63.5% to 72.5% compared with the traditional inverter at a 2 cm coil distance.In addition, a higher power of 38.9 W and a higher efficiency of 83.6% can also be obtained by increasing the input voltage to 24 V at 2 cm, which implies that the improved inverter can be used in a variety of IPT applications, such as IMDs or high-voltage quick charge.

Figure 1 .Figure 2 .
Figure 1.The schematic of a traditional autonomous current-fed push-pull inductive power transfer (IPT) system.

2 M 1 R and 2 R
. The gates of the two MOSFETs ( 1 M and ) are connected with two large pull-down resistors ( 3 R and 4 R ) to ground and two current limiting resistors ( ) to the DC voltage source.In addition, two cross-connected diodes ( 1 D and 2 D

Av 2 D and thus keeps 2 M
is almost zero to ground, which clamps the gate voltage of 2 M at just a forward diode drop above zero by in the off state.Meanwhile, the voltage at terminal-A of 1 D is fixed at the gate voltage of 1 M , which is approximately the DC voltage ( 31 RR ), and the voltage at terminal-K of 1 D is equal to the resonant sinusoidal voltage at the drain of 2

Figure 1 .
Figure 1.The schematic of a traditional autonomous current-fed push-pull inductive power transfer (IPT) system.

Figure 1 .Figure 2 .
Figure 1.The schematic of a traditional autonomous current-fed push-pull inductive power transfer (IPT) system.

2 M 1 R and 2 R
. The gates of the two MOSFETs ( 1 M and ) are connected with two large pull-down resistors ( 3 R and 4 R ) to ground and two current limiting resistors ( ) to the DC voltage source.In addition, two cross-connected diodes ( 1 D and 2 D

Av 2 D and thus keeps 2 M
is almost zero to ground, which clamps the gate voltage of 2 M at just a forward diode drop above zero by in the off state.Meanwhile, the voltage at terminal-A of 1 D is fixed at the gate voltage of 1 M , which is approximately the DC voltage ( 31 RR ), and the voltage at terminal-K of 1 D is equal to the resonant sinusoidal voltage at the drain of 2

Figure 3 .
Figure 3. Operation principle of an ideal autonomous inverter at steady state.

Figure 3 .
Figure 3. Operation principle of an ideal autonomous inverter at steady state.

Figure 4 .
Figure 4. Simplified circuit model: (a) with sinusoidal current source and mutual voltage; (b) with reflected impedance.

Figure 4 .
Figure 4. Simplified circuit model: (a) with sinusoidal current source and mutual voltage; (b) with reflected impedance.

Figure 5 .
Figure 5.The impedance characteristic of Zp versus frequency: (a) phase angle; (b) real part.

Figure 6 . 2 M
Figure 6.Voltage and current waveforms of a traditional circuit simulation at VDC = 12 V.For one thing, when one of the MOSFETs turns on-say 1M is on and

2 M
constitutes a first-order RC circuit, which turns on the MOSFET by charging the input capacitor.The time constant1 iss RC  determines the charging speed and seriously affects

Figure 6 .
Figure 6.Voltage and current waveforms of a traditional circuit simulation at V DC = 12 V.

Energies 2018 ,
11, x FOR PEER REVIEW 10 of 17 voltage is maintained at a 12 V drive source voltage when 1 M turns on.The turn-on switching delay on t and turn-off switching delay off t of MOSFETs at a 608 kHz switching frequency are 67 ns and 72

Figure 7 .
Figure 7.The schematic of an improved autonomous current-fed push-pull IPT system.

Figure 7 .
Figure 7.The schematic of an improved autonomous current-fed push-pull IPT system.

Figure 8 .Figure 8 .
Figure 8. Voltage and current waveforms of the improved circuit simulation at VDC = 12 V.Another advantage of the proposed inverter is the separation between the DC voltage source

Figure 9 .
Figure 9. Voltage and current waveforms of the improved circuit simulation at VDC = 24 V and Vdrive = 12 V.

Figure 9 .
Figure 9. Voltage and current waveforms of the improved circuit simulation at V DC = 24 V and V drive = 12 V.

Figure 9 .
Figure 9. Voltage and current waveforms of the improved circuit simulation at VDC = 24 V and Vdrive = 12 V.

Figure 10 .
Figure 10.Photo of the experimental setup.Figure 10.Photo of the experimental setup.

Figure 10 .
Figure 10.Photo of the experimental setup.Figure 10.Photo of the experimental setup.

Figure 11 .
Figure 11.Calculated and measured zero phase angle (ZPA) frequencies of a parallel-resonant circuit versus distance.

Figure
Figure12a-cshow that the practical voltage waveforms are similar to the simulation results in Figure6, Figure8, and Figure9.The gate drive signal of one MOSFET always rises with the resonant

FigureFigure 12 .
Figure 12a-c show that the practical voltage waveforms are similar to the simulation results in Figure 6, 8, and 9.The gate drive signal of one MOSFET always rises with the resonant voltage at the drain of another MOSFET simultaneously in the three experiments, and the gate drive signal quality has been improved effectively due to the improved gate drive circuit in Exp 2 and Exp 3. The turnon switching delay on t and turn-off switching delay off t of the MOSFETs are 223 ns, 246 ns in Exp 1; 61 ns, 69 ns in Exp 2; and 42 ns, 48 ns in Exp 3.Moreover, the magnitude of the resonant voltage at the TX LC tank in Exp 3 is about 75.2 V, which is consistent with the voltage Equation (1) indicated.

Figure
Figure 13a,b show the comparison of output power and efficiency between Exp 1 and Exp 2,

Table 1 .
Parameters and components of a traditional circuit.

Table 3 .
Parameters and components of the improved circuit.

Table 3 .
Parameters and components of the improved circuit.

Table 4 .
Power losses and the corresponding percentage of each block in Exp 1, Exp 2, and Exp 3.

Table 4 .
Power losses and the corresponding percentage of each block in Exp 1, Exp 2, and Exp 3.