Studies on a Hybrid Full-Bridge / Half-Bridge Bidirectional CLTC Multi-Resonant DC-DC Converter with a Digital Synchronous Rectification Strategy

This study presents a new bidirectional multi-resonant DC-DC converter, which is named CLTC. The converter adds an auxiliary transformer and an extra resonant capacitor based on a LLC resonant DC-DC converter, achieving zero-voltage switching (ZVS) for the input inverting switches and zero-current switching (ZCS) for the output rectifiers in all load range. The converter also has a wide gain range in two directions. When the load is light, a half-bridge configuration is adopted instead of a full-bridge configuration to solve the problem of voltage regulation. By this method, the voltage gain becomes monotonous and controllable. Besides, the digital synchronous rectification strategy is proposed in forward mode without adding any auxiliary circuit. The conduction time of synchronous rectifiers equals the estimation value of body diodes’ conduction time with the lightest load. Power loss analysis is also conducted in different situations. Finally, the theoretical analysis is validated by a 5 kW prototype.


Introduction
With advantage of ZVS + ZCS, the bidirectional resonant DC-DC converter (BRDC) is gaining more attention in DC distribution system or DC microgrid applications [1][2][3][4][5][6][7][8].All the power switching devices, including metal oxide semiconductor field effect transistor (MOSFET) switches and diodes have the desirable soft-switching features, and the switching loss is greatly decreased.In addition, the electromagnetic interference (EMI) is also restricted.As a result, BRDCs are characterized by high efficiency, high power density and low EMI, and are applicable to high frequency applications [9,10].Among all the BRDCs, the bidirectional series resonant converter (BSRC) is a candidate topology [11][12][13][14][15][16].All the switches of a BSRC work in either ZVS or ZCS for a wide variation of voltage gains with phase-shift control [13].A novel control scheme was developed for BSRC in discontinuous mode [14].With the accumulation of energy packets to raise output voltage, it is possible to have a gain greater than one.A novel method for analyzing the frequency response is also presented based on a mixture of the Fourier and the average state-space methods [15].The analysis method provides enough information to properly control the BSRC.A BSRC using a continuous current mode was proposed in [16].Experimental results from a 6 kW prototype validated the theoretical analysis, and higher efficiency is obtained compared to the phase-shift DAB in a wide power range.However, the efficiency shows, the converter is composed of a high-voltage side (HVS) full-bridge, low-voltage side (LVS) full-bridge and a multi-resonant tank.An auxiliary transformer T2 and an extra resonant capacitor Cr2 are added on bidirectional LLC resonant DC-DC converter, so the converter is named by CLTC.The gain range in two directions is broadened with the added devices.ZVS for the input inverting switches and ZCS for the output rectifiers are realized in all load range.

Operation Principles and Characteristic Description
In this section, the main operation principles of CLTC multi-resonant converter are given.It is similar to a LLC resonant converter as two stages of resonance exist.The resonant frequency, voltage gain and ZVS characteristic are analyzed, forming research foundations for the following sections.

Operation Principles
Figure 2 shows different states of the CLTC multi-resonant converter.In Figure 2, i Lm1 is excitation current of transformer T 1 on HVS, i' Lm1 is excitation current of transformer T 1 on LVS, i Lr is current of resonant inductor, i Cr1 and i Cr2 are currents of resonant capacitors on HVS and LVS, u GS14 is the driving signal of S 1 and S 4 , u GS23 is the driving signal of S 2 and S 3 , u GS58 is the driving signal of S 5 and S 8 , u GS67 is the driving signal of S 6 and S 7 , u DS14 is the drain-source voltage of S 1 and S 4 , u DS23 is the drain-source voltage of S 2 and S 3 , u DS58 is the drain-source voltage of S 5 and S 8 , u DS67 is the drain-source voltage of S 6 and S 7 , i DS14 is the drain-source current of S 1 and S 4 , i DS23 is the drain-source current of S 2 and S 3 , i DS58 is the drain-source current of S 5 and S 8 , i DS67 is the drain-source current of S 6 and S 7 .
Energies 2018, 11, 227 3 of 22 This paper is organized as follows: the operation principles and characteristic descriptions of the proposed converter are discussed in Section 2. Hybrid full-bridge/half-bridge configuration is used to improve the light load regulation capability in Section 3. Stresses of power devices, load and working frequency range in half-bridge CLTC are also given to prove the feasibility of the half-bridge configuration.SR strategy based on estimation of the diodes' conduction time is proposed in Section 4. Power loss distribution and comparison tests are conducted with different loads and LVS DC voltages in Section 5. A 5 kW prototype is built with HVS voltage of 400 V and LVS DC voltage of 42-58 V. Experimental results are shown to validate the theoretical analysis above in Section 6. Conclusions are drawn in Section 7.

Operation Principles and Characteristic Description
In this section, the main operation principles of CLTC multi-resonant converter are given.It is similar to a LLC resonant converter as two stages of resonance exist.The resonant frequency, voltage gain and ZVS characteristic are analyzed, forming research foundations for the following sections.

Operation Principles
Figure 2 shows different states of the CLTC multi-resonant converter.In Figure 2, iLm1 is excitation current of transformer T1 on HVS, i'Lm1 is excitation current of transformer T1 on LVS, iLr is current of resonant inductor, iCr1 and iCr2 are currents of resonant capacitors on HVS and LVS, uGS14 is the driving signal of S1 and S4, uGS23 is the driving signal of S2 and S3, uGS58 is the driving signal of S5 and S8, uGS67 is the driving signal of S6 and S7, uDS14 is the drain-source voltage of S1 and S4, uDS23 is the drain-source voltage of S2 and S3, uDS58 is the drain-source voltage of S5 and S8, uDS67 is the drain-source voltage of S6 and S7, iDS14 is the drain-source current of S1 and S4, iDS23 is the drain-source current of S2 and S3, iDS58 is the drain-source current of S5 and S8, iDS67 is the drain-source current of S6 and S7.

Forward Mode
The equivalent circuits in forward mode are listed in Figure 3. Detailed descriptions and explanations of the operational modes in half period are as follows: Mode A [t0-t1]: S2 and S3 have just turned off at t0.The HVS current charges the output capacitor of S2 and S3, and discharges the output capacitor of S1 and S4.After that, the HVS current passes through the antiparallel diode of S1 and S4, which makes the switches turn on under the ZVS condition.The equivalent circuits in forward mode are listed in Figure 3. Detailed descriptions and explanations of the operational modes in half period are as follows: Mode A [t 0 -t 1 ]: S 2 and S 3 have just turned off at t 0 .The HVS current charges the output capacitor of S 2 and S 3 , and discharges the output capacitor of S 1 and S 4 .After that, the HVS current passes through the antiparallel diode of S 1 and S 4 , which makes the switches turn on under the ZVS condition.Mode B [t1-t2]: At t1, S1, S4, S5 and S8 turn on and power is transferred from HVS to LVS.The resonant current changes in a sine-wave with main resonant frequency, fr.At t2, iLr is equal to iLm1, iCr2 and ids58 become zero.
Mode C [t2-t3]: S1 and S4 are still on in this mode, S5 and S8 are off in this mode.As iCr2 and ids58 are zero in t2, S5 and S8 turn off under ZCS condition.The HVS goes into secondary resonance with the frequency of fr2f.At t3, S1 and S4 are off and ready to go into dead-time duration.
When working frequency is bigger than main resonant frequency, Mode C and ZCS of LVS power switches disappear like LLC.The turn-off currents increase largely in this situation.

Backward Mode
The equivalent circuits in backward mode are listed in Figure 4. L'm1 and L'm2 are the magnetizing inductors on LVS.The modes are similar to those in forward mode.Detail descriptions and explanations of the operational modes in half period are shown as follows: Mode A [t0-t1]: S6 and S7 turn off at t0.The resonant current on LVS charges the output capacitor of S6 and S7, and discharges the output capacitor of S5 and S8.After that, the LVS current passes through the antiparallel diode of S5 and S8, which makes the switches turn on under the ZVS condition.
Mode B [t1-t2]: At t1, S5, S8, D1 and D4 turn on and power is transferred from LVS to HVS.The resonant current on LVS changes in a sine-wave with main resonant frequency.At t2, iCr2 is equal to i'Lm1, iCr1 and ids14 become zero.
Mode C [t2-t3]: S5 and S8 are still on in this mode, D1 and D4 are off in this mode.ZCS of D1 and D4 is realized as iCr1 and ids14 become zero at t2.The LVS goes into secondary resonance with the frequency of fr2b.At t3, S1 and S4 are off and ready to go into dead-time duration.
When working frequency is bigger than main resonant frequency, Mode C and ZCS of HVS diodes disappear like LLC.The turn-off currents increase largely in this situation.Mode B [t 1 -t 2 ]: At t 1 , S 1 , S 4 , S 5 and S 8 turn on and power is transferred from HVS to LVS.The resonant current changes in a sine-wave with main resonant frequency, f r .At t 2 , i Lr is equal to i Lm1 , i Cr2 and i ds58 become zero.
Mode C [t 2 -t 3 ]: S 1 and S 4 are still on in this mode, S 5 and S 8 are off in this mode.As i Cr2 and i ds58 are zero in t 2 , S 5 and S 8 turn off under ZCS condition.The HVS goes into secondary resonance with the frequency of f r2f .At t 3 , S 1 and S 4 are off and ready to go into dead-time duration.
When working frequency is bigger than main resonant frequency, Mode C and ZCS of LVS power switches disappear like LLC.The turn-off currents increase largely in this situation.

Backward Mode
The equivalent circuits in backward mode are listed in Figure 4. L' m1 and L' m2 are the magnetizing inductors on LVS.The modes are similar to those in forward mode.Detail descriptions and explanations of the operational modes in half period are shown as follows: Mode A [t 0 -t 1 ]: S 6 and S 7 turn off at t 0 .The resonant current on LVS charges the output capacitor of S 6 and S 7 , and discharges the output capacitor of S 5 and S 8 .After that, the LVS current passes through the antiparallel diode of S 5 and S 8 , which makes the switches turn on under the ZVS condition.
Mode B [t 1 -t 2 ]: At t 1 , S 5 , S 8 , D 1 and D 4 turn on and power is transferred from LVS to HVS.The resonant current on LVS changes in a sine-wave with main resonant frequency.At t 2 , i Cr2 is equal to i' Lm1 , i Cr1 and i ds14 become zero.

Characteristic Description
Main resonant frequency of CLTC converter in two power flows, fr, is: where: fr is obtained when no load is added and imaginary part of AC input impedance of CLTC is zero.The secondary resonant frequency in forward mode, fr2f, and the secondary resonant frequency in backward mode, fr2b, are: fr2f and fr2b are obtained with the resonant capacitance and inductance in secondary resonance.The resonant capacitance and inductance are shown in Figures 3c and 4c.

Characteristic Description
Main resonant frequency of CLTC converter in two power flows, f r , is: where: f r is obtained when no load is added and imaginary part of AC input impedance of CLTC is zero.The secondary resonant frequency in forward mode, f r2f , and the secondary resonant frequency in backward mode, f r2b , are: Energies 2018, 11, 227 6 of 22 f r2f and f r2b are obtained with the resonant capacitance and inductance in secondary resonance.The resonant capacitance and inductance are shown in Figures 3c and 4c.
By use of the fundamental harmonic analysis (FHA) method, Figures 5a and 6a show 3D voltage gain curves according to load P o and normalized working frequency f s /f r .G F is gain in forward mode and G B is gain in backward mode.As is shown in Figures 5b and 6b, when the working frequency is below the main resonant frequency, G F and G B increase at first and decrease subsequently with the growth of working frequency.The peak gains are more than 1 over all the load range and obtained around secondary resonant frequency, f r2f and f r2b .At main resonant frequency f r , the gain of the converter is 1.As is shown in Figures 5c and 6c, when working frequency is above main resonant frequency, G F and G B decrease with the growth of working frequency.When load is lighter, the voltage gain is higher and the slope of gain curve is sharper.Voltage gain range of CTLC converter is wide enough to adapt applications like battery charger and DC microgrid.By use of the fundamental harmonic analysis (FHA) method, Figures 5a and 6a show 3D voltage gain curves according to load Po and normalized working frequency fs/fr.GF is gain in forward mode and GB is gain in backward mode.As is shown in Figures 5b and 6b, when the working frequency is below the main resonant frequency, GF and GB increase at first and decrease subsequently with the growth of working frequency.The peak gains are more than 1 over all the load range and obtained around secondary resonant frequency, fr2f and fr2b.At main resonant frequency fr, the gain of the converter is 1.As is shown in Figures 5c and 6c, when working frequency is above main resonant frequency, GF and GB decrease with the growth of working frequency.When load is lighter, the voltage gain is higher and the slope of gain curve is sharper.Voltage gain range of CTLC converter is wide enough to adapt applications like battery charger and DC microgrid.
Energies 2018, 11, 227 6 of 22 By use of the fundamental harmonic analysis (FHA) method, Figures 5a and 6a show 3D voltage gain curves according to load Po and normalized working frequency fs/fr.GF is gain in forward mode and GB is gain in backward mode.As is shown in Figures 5b and 6b, when the working frequency is below the main resonant frequency, GF and GB increase at first and decrease subsequently with the growth of working frequency.The peak gains are more than 1 over all the load range and obtained around secondary resonant frequency, fr2f and fr2b.At main resonant frequency fr, the gain of the converter is 1.As is shown in Figures 5c and 6c, when working frequency is above main resonant frequency, GF and GB decrease with the growth of working frequency.When load is lighter, the voltage gain is higher and the slope of gain curve is sharper.Voltage gain range of CTLC converter is wide enough to adapt applications like battery charger and DC microgrid.In order to realize ZVS for HVS switches, in forward mode, the dead-time duration tdt_F should satisfy (6) using the ZVS mechanism analyzed by [19].Coss_H is the output capacitance of HVS switch: Similarly, in backward mode, the dead-time duration tdt_B of LVS switches should satisfy: Coss_L is the output capacitance of LVS switch in (7).
The inequations can be easily satisfied with different loads and working frequencies, which is good for efficiency.The tdt_F and tdt_B are set to 200 ns in experiments.

Hybrid Full-Bridge/Half-Bridge Configuration
In this section, the reason for the upturn phenomenon is analyzed.A full-bridge configuration is used with a normal load.Half-bridge configurations are used for light load conditions with the advantage of monotonous gain curve and lower frequency.Because the situations in forward and backward mode are similar, the discussion in this section is conducted only in forward mode, and details are not provided for the backward mode.

Half-Bridge Configuration at Light Load Condition
Using the analysis method proposed in [22], it is found that transformer wiring capacitance is the main factor leading to the upturn problem.As is shown in Figure 7a, the ideal gain curve without considering parasitic parameters in forward mode is monotonous with working frequency under light load conditions.However, the voltage gain curve considering transformer wiring capacitance and experimental gain curve has upturns.As the experiment gain curve is not monotonous, the gain cannot be regulated well with PFM.For example, the voltage gain of 1.02 in Figure 7a is obtained with four different working frequencies.When PFM is adopted to control LVS voltage, the working frequency may be around 1.4fr instead of 0.8fr, and fluctuates quickly as the gain curve is not monotonous.
To overcome the above problem, a half-bridge configuration is introduced in this paper to regulate the required output voltage.In forward mode, the full-bridge in HVS is transformed into a half-bridge by turning off Q3 and turning on Q4 incessantly.The voltage gain is reduced by half, with the same load and resonant parameters.Thus, when the voltage gain needed is below 1 under light load conditions, a half-bridge configuration is adopted and the required gain is obtained with lower working frequency.In Figure 7b, when the working frequency is around 0.35fr, twice the required gain is acquired in full-bridge configuration.Thus, a gain of 1.02 is acquired in half-bridge configuration with the same working frequency and load.Also, the gain of 1.02 is controllable in half- In order to realize ZVS for HVS switches, in forward mode, the dead-time duration t dt_F should satisfy (6) using the ZVS mechanism analyzed by [19].C oss_H is the output capacitance of HVS switch: Similarly, in backward mode, the dead-time duration t dt_B of LVS switches should satisfy: C oss_L is the output capacitance of LVS switch in (7).The inequations can be easily satisfied with different loads and working frequencies, which is good for efficiency.The t dt_F and t dt_B are set to 200 ns in experiments.

Hybrid Full-Bridge/Half-Bridge Configuration
In this section, the reason for the upturn phenomenon is analyzed.A full-bridge configuration is used with a normal load.Half-bridge configurations are used for light load conditions with the advantage of monotonous gain curve and lower frequency.Because the situations in forward and backward mode are similar, the discussion in this section is conducted only in forward mode, and details are not provided for the backward mode.

Half-Bridge Configuration at Light Load Condition
Using the analysis method proposed in [22], it is found that transformer wiring capacitance is the main factor leading to the upturn problem.As is shown in Figure 7a, the ideal gain curve without considering parasitic parameters in forward mode is monotonous with working frequency under light load conditions.However, the voltage gain curve considering transformer wiring capacitance and experimental gain curve has upturns.As the experiment gain curve is not monotonous, the gain cannot be regulated well with PFM.For example, the voltage gain of 1.02 in Figure 7a is obtained with four different working frequencies.When PFM is adopted to control LVS voltage, the working frequency may be around 1.4f r instead of 0.8f r , and fluctuates quickly as the gain curve is not monotonous.
To overcome the above problem, a half-bridge configuration is introduced in this paper to regulate the required output voltage.In forward mode, the full-bridge in HVS is transformed into a half-bridge by turning off Q 3 and turning on Q 4 incessantly.The voltage gain is reduced by half, with the same load and resonant parameters.Thus, when the voltage gain needed is below 1 under light load conditions, a half-bridge configuration is adopted and the required gain is obtained with lower working frequency.
In Figure 7b, when the working frequency is around 0.35f r , twice the required gain is acquired in full-bridge configuration.Thus, a gain of 1.02 is acquired in half-bridge configuration with the same working frequency and load.Also, the gain of 1.02 is controllable in half-bridge mode, because the working frequency decreases largely, away from the region where the gain is not monotonous.The mechanism of transformation between full-bridge and half-bridge configuration is displayed in Figure 8.With the decrease of load in full-bridge configuration, the gain curve rises.Then, the full-bridge configuration is transformed into a half-bridge configuration, working frequency gets lower and the gain curve is monotonous around G r .At last, half-bridge configuration is used to adapt lighter load instead of full-bridge configuration.The mechanism of transforming full-bridge into half-bridge is simple and effective, still, several considerations of the method are discussed here.

Voltage and Current Stresses
The stresses in both full-bridge and half-bridge configurations need to be checked.Voltage stresses of all the switches do not change.When the same power is transmitted, current stresses of LVS switches stay the same.Current stresses of HVS switches in half-bridge are twice of those in full-bridge as the AC input voltage is cut by half.Thus, the load must be light if half-bridge is adopted, to ensure the current amplitude is acceptable.

Load and Working Frquency Range
The peak gain should be larger than the required gain, G r .It is because if the peak gain is smaller than G r , G r cannot be tracked.Taking a margin of 0.05G r into consideration, the DC output resistance in half-bridge configuration, R o,H , should satisfy the following equation: In ( 8), G F,H is the voltage gain of half-bridge CLTC, f H,1 is the maximum point.Also, R o,H should be bigger than twice of the rated resistance, R o,H,rated , in full-bridge.As Section 3.2 tells, the selection of R o,H should guarantee that the current stresses in half-bridge are no bigger than those in full-bridge.Thus: The working frequency of CLTC in half-bridge configuration, should be in the range of [f H,1,max , f r ].The working frequency should be lower than f r to avoid upturn phenomenon of gain curve.Also, when load is heavier in half-bridge, f H,1 gets larger as Figure 8 shows, so the lower limit of the working frequency is the largest value of f H,1 , f H,1,max .In the range of [f H,1,max , f r ], the gain curve monotonously declines with working frequency, and the slope is sharper in half-bridge configuration.It is ideal for voltage regulation of CLTC.

Synchronous Rectification Strategy Based on Estimation of Body Diodes' Conduction Time
In consideration of improving the efficiency, a digital synchronous rectification strategy is proposed in forward mode.No auxiliary circuit is added.The proposed strategy adjusts conduction time of switches in LVS by calculating rectifier diodes' conduction time in half period, t SR .A whole process of calculating t SR is proposed and verified in this section.It can be used in both full-bridge configuration and half-bridge configuration.

Synchornous Rectification Strategy
With the proposed digital synchronous rectification strategy, all the driving signals of HVS switches S 1 -S 4 and LVS SR switches S 5 -S 8 are given by STM32F series chip.The turn-on time of SR switches is set to the same with HVS main switches.But the conduction time (the interval between turn-on and turn-off time) is set with the estimation value of body diodes' conduction time in half period, t SR , so t SR should be calculated for synchronous rectification.

Estimation of the Body Diodes' Conduction Time
When working frequency of CLTC is larger than main resonant frequency, t SR is half working period because the secondary resonance doesn't exist.However, when working frequency is smaller than main resonant frequency, t SR is a variable with respect to R o and f s .So discussion is focused on t SR when working frequency is smaller than main resonant frequency.

Estimation of the Body Diodes' Conduction Time
When working frequency of CLTC is larger than main resonant frequency, tSR is half working period because the secondary resonance doesn't exist.However, when working frequency is smaller than main resonant frequency, tSR is a variable with respect to Ro and fs.So discussion is focused on tSR when working frequency is smaller than main resonant frequency.In Figure 9, assuming resonant current on LVS, iCr2, is approximated to a sinusoidal pulse: ICr2 is the peak value of iCr2, t is the real time, T2 is half period, 1/(2fs).The value of uAB is UH in this period.
By using the law of conservation of electric charge, it can be obtained that: According to (13), ICr2 can be expressed by: The voltage of Cr2 can be expressed by: As iCr2 is 0 and the voltage of Cr2 stays the same during tSR-T2, the following equation is found: Applying ( 15) into ( 16), the UCr2,0 can be expressed by: The voltage of magnetizing inductance Lm1 and Lm2, uLm1 and uLm2, can form following equations: so uLm2 can be expressed by: In Figure 9, assuming resonant current on LVS, i Cr2 , is approximated to a sinusoidal pulse: I Cr2 is the peak value of i Cr2 , t is the real time, T 2 is half period, 1/(2f s ).The value of u AB is U H in this period.
By using the law of conservation of electric charge, it can be obtained that: According to (13), I Cr2 can be expressed by: The voltage of C r2 can be expressed by: As i Cr2 is 0 and the voltage of C r2 stays the same during t SR -T 2 , the following equation is found: Applying ( 15) into ( 16), the U Cr2,0 can be expressed by: The voltage of magnetizing inductance L m1 and L m2 , u Lm1 and u Lm2 , can form following equations: so u Lm2 can be expressed by: The instantaneous voltage between HVS full-bridge legs, u AB , can be expressed as: where, U Cr1,0 is the initial voltage of resonant capacitor C r1 at t 0 , and the instantaneous current of C r1 , i Cr1 , can be expressed as: In order to simplify calculation process, L m2 is supposed to be subject to u AB during 0-t SR .So i Lm2 and i Lm1 can be expressed as linearly increasing currents: I Lm1,0 and I Lm2,0 is the initial value of I Lm1 and I Lm2 : Realizing that u AB (t) = U H and substituting (19) and ( 21) into (20), gives: Getting the derivative of the above equation: In ( 27), D, E, F are: U H can be expressed as U L /M SD , so F can be simplified by: I Lm1,0 +I Lm2,0 I Cr2 is close to 0 as I Cr2 is much larger than I Lm1,0 + I Lm2,0 .When t is close to 0, π×t t SR ≈ sin π×t t SR , t SR is the solution of ( 27): In Figure 10, the normalized estimated conduction time t SR /T 2 versus normalized operating frequency f s /f r and different load (dots-simulation, solid lines-theoretical prediction).Figure 10 reveals good agreement between theoretical values and simulation results.The curve of t SR /T 2 is basically proportional to f s /f r , and grows with the increase of load.
Based on the above analysis, the conduction time of LVS switches is set to estimated conduction time t SR obtained when load is the lightest, so the conduction time of LVS switches in the proposed synchronous rectification strategy is not relevant to the load.It is a parameter changing with operating frequency.LVS switches turn on firstly to reduce conduction loss.Then, as estimated conduction time t SR is a little smaller than the real conduction time of LVS body diodes, the body diodes of LVS switches conduct until the LVS resonant current becomes zero.Efficiency is not affected because the duration when body diodes conduct is short.The proposed digital synchronous rectification strategy is simple and effective, the effects are discussed in sections below.
UH can be expressed as UL/MSD, so F can be simplified by: In Figure 10, the normalized estimated conduction time tSR/T2 versus normalized operating frequency fs/fr and different load (dots-simulation, solid lines-theoretical prediction).Figure 10 reveals good agreement between theoretical values and simulation results.The curve of tSR/T2 is basically proportional to fs/fr, and grows with the increase of load.
Based on the above analysis, the conduction time of LVS switches is set to estimated conduction time tSR obtained when load is the lightest, so the conduction time of LVS switches in the proposed synchronous rectification strategy is not relevant to the load.It is a parameter changing with operating frequency.LVS switches turn on firstly to reduce conduction loss.Then, as estimated conduction time tSR is a little smaller than the real conduction time of LVS body diodes, the body diodes of LVS switches conduct until the LVS resonant current becomes zero.Efficiency is not affected because the duration when body diodes conduct is short.The proposed digital synchronous rectification strategy is simple and effective, the effects are discussed in sections below.

Power Loss Analysis
The power loss of converters is the key factor for component selection and design.In this section, the power loss distribution is calculated with mathematical models and compared with different LVS DC voltages.The HVS DC voltage of the converter stays the same.The power loss with half-bridge configuration and synchronous rectification strategy are discussed in this section, too.
Before further analysis, several parameters are defined as follows, PHSW,off is the turn-off loss of HVS power switches, PHSW,con is the conduction loss of HVS power switches, PLSW,off is the turn-off loss of LVS power switches, PLSW,con is the conduction loss of LVS power switches, PL is the power loss of

Power Loss Analysis
The power loss of converters is the key factor for component selection and design.In this section, the power loss distribution is calculated with mathematical models and compared with different LVS DC voltages.The HVS DC voltage of the converter stays the same.The power loss with half-bridge configuration and synchronous rectification strategy are discussed in this section, too.
Before further analysis, several parameters are defined as follows, P HSW,off is the turn-off loss of HVS power switches, P HSW,con is the conduction loss of HVS power switches, P LSW,off is the turn-off loss of LVS power switches, P LSW,con is the conduction loss of LVS power switches, P L is the power loss of resonant inductor, P T,Σ is the total power loss of transformers, P WIRE,con is the conduction loss in printed circuit board and copper bar, P HD is the power loss of HVS diodes, P LD is the power loss of LVS body diodes in power switches.

Loss Distribution with Different LVS DC Voltages
Power loss distribution with 5 kW load in forward and backward mode is shown in Figure 11.The power loss distribution is conducted with three LVS DC voltages of 42, 50 and 58 V and the HVS Energies 2018, 11, 227 13 of 22 voltage of 400 V.In forward mode, the column of "50 V" is obtained around main resonant frequency, while the column of "42 V" is obtained with higher frequency and column of "58 V" is obtained with lower frequency.In backward mode, the column of "50 V" is obtained around main resonant frequency, while the column of "42 V" is obtained with lower frequency and column of "58 V" is obtained with higher frequency.
circuit board and copper bar, PHD is the power loss of HVS diodes, PLD is the power loss of LVS body diodes in power switches.

Loss Distribution with Different LVS DC Voltages
Power loss distribution with 5 kW load in forward and backward mode is shown in Figure 11.The power loss distribution is conducted with three LVS DC voltages of 42, 50 and 58 V and the HVS voltage of 400 V.In forward mode, the column of "50 V" is obtained around main resonant frequency, while the column of "42 V" is obtained with higher frequency and column of "58 V" is obtained with lower frequency.In backward mode, the column of "50 V" is obtained around main resonant frequency, while the column of "42 V" is obtained with lower frequency and column of "58 V" is obtained with higher frequency.P HSW,off and P LSW,off are the dominant power losses.P L and P T,Σ change little with the change of LVS DC voltage.P WIRE,con is large due to proximity effect and skin effect.The column of "42 V" in forward mode and the column of "58 V" in backward mode have greater power loss compared to the other columns.This is mainly because P HSW,off and P LSW,off are larger due to larger turn-off currents and higher working frequencies.The HVS switches are SiC power devices, and the LVS switches are Si power devices.Compared to LVS switches, the HVS switches have less turn-off delay time and fall time.So the switching loss of LVS switches is larger than that of HVS switches.Thus, the efficiency in forward mode is higher than that in backward mode in general.

Power Loss Distribution and Comparison between Full-Bridge and Half-Bridge Configuration
The power loss distribution and comparison between full-bridge and half-bridge configuration is made to demonstrate the advantage of half-bridge configuration in efficiency.Taking forward mode for example, changing from full-bridge configuration to half-bridge configuration has impacts as follows: (1) P HSW,off and P LSW,off decrease largely.In forward mode, switches staying on on-off mode in HVS decrease from 4 to 2, and their working frequency decreases from 160 kHz to around 40 kHz.So P HSW,off decreases largely with half-bridge configuration.Also, P LSW,off decreases with less turn-off current and lower working frequency.(2) The conduction loss of all devices increases.Resonant current on HVS increases to about twice, so P HSW,con , conduction loss of resonant inductor and primary windings of transformers are amplified.However, as resonant current on LVS changes little, P LSW,con and the conduction loss of secondary windings in transformers stay the same.(3) Core loss of resonant inductor and transformers stays the same.In half-bridge LLC, working frequency f s decreases.However, B max , the peak flux density, increases because peak value of current increases.With Steinmetz's equation P core = Kf s α B max β V e , the core losses of resonant inductor and transformers in half-bridge configuration change little.
Figure 12a shows power loss distribution and comparison with load of 200 W in forward mode.Efficiencies of half-bridge and full-bridge configuration are 87.7% and 86.7%.The power loss distribution is in accordance with the above analysis.Compared to full-bridge configuration, efficiency is a little higher in half-bridge configuration.
Figure 12b shows power loss distribution and comparison with load of 200 W in backward mode.P LSW,off gets much smaller in half-bridge configuration.The power loss is cut down by 26.7% and the efficiency is 81.5% in half-bridge configuration.PHSW,off and PLSW,off are the dominant power losses.PL and PT,Σ change little with the change of LVS DC voltage.PWIRE,con is large due to proximity effect and skin effect.The column of "42 V" in forward mode and the column of "58 V" in backward mode have greater power loss compared to the other columns.This is mainly because PHSW,off and PLSW,off are larger due to larger turn-off currents and higher working frequencies.The HVS switches are SiC power devices, and the LVS switches are Si power devices.Compared to LVS switches, the HVS switches have less turn-off delay time and fall time.So the switching loss of LVS switches is larger than that of HVS switches.Thus, the efficiency in forward mode is higher than that in backward mode in general.

Power Loss Distribution and Comparison between Full-Bridge and Half-Bridge Configuration
The power loss distribution and comparison between full-bridge and half-bridge configuration is made to demonstrate the advantage of half-bridge configuration in efficiency.Taking forward mode for example, changing from full-bridge configuration to half-bridge configuration has impacts as follows: (1) PHSW,off and PLSW,off decrease largely.In forward mode, switches staying on on-off mode in HVS decrease from 4 to 2, and their working frequency decreases from 160 kHz to around 40 kHz.So PHSW,off decreases largely with half-bridge configuration.Also, PLSW,off decreases with less turn-off current and lower working frequency.(2) The conduction loss of all devices increases.Resonant current on HVS increases to about twice, so PHSW,con, conduction loss of resonant inductor and primary windings of transformers are amplified.However, as resonant current on LVS changes little, PLSW,con and the conduction loss of secondary windings in transformers stay the same.(3) Core loss of resonant inductor and transformers stays the same.In half-bridge LLC, working frequency fs decreases.However, Bmax, the peak flux density, increases because peak value of current increases.With Steinmetz's equation Pcore = Kfs α Bmax β Ve, the core losses of resonant inductor and transformers in half-bridge configuration change little.
Figure 12a shows power loss distribution and comparison with load of 200 W in forward mode.Efficiencies of half-bridge and full-bridge configuration are 87.7% and 86.7%.The power loss distribution is in accordance with the above analysis.Compared to full-bridge configuration, efficiency is a little higher in half-bridge configuration.
Figure 12b shows power loss distribution and comparison with load of 200 W in backward mode.PLSW,off gets much smaller in half-bridge configuration.The power loss is cut down by 26.7% and the efficiency is 81.5% in half-bridge configuration.

Power Loss Distribution and Comparison with and without Synchronous Strategy
Figure 13 shows the power loss distribution and comparison with and without synchronous strategy.When body diodes of LVS switches are used to realize rectification, PLD is quite large with diode forward voltage of 0.9 V.However, the drain-source on-state resistance of LVS switches is only 0.7 mΩ.Thus, with the use of the proposed synchronous strategy, PLSW,con is quite small.The total loss is cut by 49% with the use of synchronous strategy, showing the advantage in power loss reduction and efficiency enhancement.

Experimental Results
A 5 kW prototype is built in the laboratory to verify the above analysis.The parameters of the components are listed in Table 1.

Power Loss Distribution and Comparison with and without Synchronous Strategy
Figure 13 shows the power loss distribution and comparison with and without synchronous strategy.When body diodes of LVS switches are used to realize rectification, P LD is quite large with diode forward voltage of 0.9 V.However, the drain-source on-state resistance of LVS switches is only 0.7 mΩ.Thus, with the use of the proposed synchronous strategy, P LSW,con is quite small.The total loss is cut by 49% with the use of synchronous strategy, showing the advantage in power loss reduction and efficiency enhancement.

Power Loss Distribution and Comparison with and without Synchronous Strategy
Figure 13 shows the power loss distribution and comparison with and without synchronous strategy.When body diodes of LVS switches are used to realize rectification, PLD is quite large with diode forward voltage of 0.9 V.However, the drain-source on-state resistance of LVS switches is only 0.7 mΩ.Thus, with the use of the proposed synchronous strategy, PLSW,con is quite small.The total loss is cut by 49% with the use of synchronous strategy, showing the advantage in power loss reduction and efficiency enhancement.

Experimental Results
A 5 kW prototype is built in the laboratory to verify the above analysis.The parameters of the components are listed in Table 1.

Experimental Results
A 5 kW prototype is built in the laboratory to verify the above analysis.The parameters of the components are listed in Table 1. Figure 14 shows that ZVS of power switches can be realized in both forward and backward modes.In forward mode, the D-S voltage of S 1 decreases to 0, before the driving signal of S 1 comes.In backward mode, the D-S voltage of S 5 decreases to 0, before the driving signal of S 5 comes.The dead time of 200 ns is wide enough for both HVS and LVS power switches, while the efficiency is not greatly reduced.Figure 14 shows that ZVS of power switches can be realized in both forward and backward modes.In forward mode, the D-S voltage of S1 decreases to 0, before the driving signal of S1 comes.In backward mode, the D-S voltage of S5 decreases to 0, before the driving signal of S5 comes.The dead time of 200 ns is wide enough for both HVS and LVS power switches, while the efficiency is not greatly reduced.Figure 15 shows experiment results in forward mode.The tSR is 4.6 μs in Figure 15a with working frequency of 60 kHz and load of 3.5 kW.The tSR is 4.5 μs with Equation (25) and 4.3 μs in the proposed synchronous rectification strategy, which is basically consistent with the experiment results.The accuracy of calculation and the effectiveness of proposed synchronous rectification strategy are verified through experiments.Figure 15b shows the waveforms around main resonant frequency.The resonant current is quite close to sinusoidal wave.The power loss is lower because of smaller turn-off loss in this situation.Figure 16 shows experiment results in backward mode.In Figure 16a, secondary resonance does not happen, so ZCS of HVS diodes cannot be realized.In Figure 16b, the resonant current is quite close to sinusoidal wave around main resonant frequency.The power loss in Figure 16b is lower because of smaller turn-off loss.Figure 16 shows experiment results in backward mode.In Figure 16a, secondary resonance does not happen, so ZCS of HVS diodes cannot be realized.In Figure 16b, the resonant current is quite close to sinusoidal wave around main resonant frequency.The power loss in Figure 16b is lower because of smaller turn-off loss.Experiments are conducted to verify the effectiveness of half-bridge configuration at light load condition in Figure 17.In both forward and backward mode, the adoption of half-bridge configuration can track a gain of 1.02.Compared to full-bridge, the fall of working frequency in half-bridge configuration reduces turn-off loss, which is very good for efficiency.Experiments are conducted to verify the effectiveness of half-bridge configuration at light load condition in Figure 17.In both forward and backward mode, the adoption of half-bridge configuration can track a gain of 1.02.Compared to full-bridge, the fall of working frequency in half-bridge configuration reduces turn-off loss, which is very good for efficiency.Experiments are conducted to verify the effectiveness of half-bridge configuration at light load condition in Figure 17.In both forward and backward mode, the adoption of half-bridge configuration can track a gain of 1.02.Compared to full-bridge, the fall of working frequency in half-bridge configuration reduces turn-off loss, which is very good for efficiency.Efficiency comparison is conducted with experiments at light load condition.In Table 2, the efficiency in half-bridge configuration is higher than that in full-bridge, which is in accord with analysis in Section 5.2.The advantage of half-bridge configuration is verified through experiments.Efficiencies of the proposed converter with different loads and LVS DC voltages are measured and plotted in Figure 18.The efficiency with 5 kW load and 50 V LVS DC voltage is 95.9% and 94.9% in forward and backward mode.The maximum efficiency of the converter is 97.0%, with load of 2 kW and LVS DC voltage of 50 V in forward mode.Due to less turn-off currents and lower working frequencies, the efficiency of "58 V" or "50 V" is higher than that of "42 V" in forward mode and the efficiency of "42 V" or "50 V" is higher than that of "58 V" in backward mode.It is in accord with theoretical analysis in Section 5. High efficiency can be achieved in a wide load range.Even with 1 kW load, the efficiency is still over 92% due to the wide ZVS soft switching operation range and little turn-off currents.
The comparative experiments are conducted with and without synchronous rectification strategy when LVS DC voltage is 50 V, displayed as "50 V" and "Diode 50 V".From the converter power loss distribution, the LVS diode conduction loss is the dominant part in "Diode 50 V", which occupies nearly 50% of the total power loss.Experiment results show that the efficiency is improved largely with the help of the proposed synchronous rectification strategy.Efficiency comparison is conducted with experiments at light load condition.In Table 2, the efficiency in half-bridge configuration is higher than that in full-bridge, which is in accord with analysis in Section 5.2.The advantage of half-bridge configuration is verified through experiments.Efficiencies of the proposed converter with different loads and LVS DC voltages are measured and plotted in Figure 18.The efficiency with 5 kW load and 50 V LVS DC voltage is 95.9% and 94.9% in forward and backward mode.The maximum efficiency of the converter is 97.0%, with load of 2 kW and LVS DC voltage of 50 V in forward mode.Due to less turn-off currents and lower working frequencies, the efficiency of "58 V" or "50 V" is higher than that of "42 V" in forward mode and the efficiency of "42 V" or "50 V" is higher than that of "58 V" in backward mode.It is in accord with theoretical analysis in Section 5. High efficiency can be achieved in a wide load range.Even with 1 kW load, the efficiency is still over 92% due to the wide ZVS soft switching operation range and little turn-off currents.
The comparative experiments are conducted with and without synchronous rectification strategy when LVS DC voltage is 50 V, displayed as "50 V" and "Diode 50 V".From the converter power loss distribution, the LVS diode conduction loss is the dominant part in "Diode 50 V", which occupies nearly 50% of the total power loss.Experiment results show that the efficiency is improved largely with the help of the proposed synchronous rectification strategy.

Conclusions
In this work, a new CLTC multi-resonant DC-DC converter is proposed.Possessing the optimal ZVS + ZCS soft switching feature in all load range, CLTC benefits from little turn-off loss and high efficiency.The gain range is so wide that the demands of applications like battery chargers and DC microgrids can be satisfied easily.The problem of voltage regulation under light load conditions is so serious that voltage is not controllable.The hybrid full-bridge/half-bridge configuration is proposed to make gain curve monotonous under light load conditions.Discussion about voltage and current stresses, load and working frequency range in half-bridge configuration are put forth as well.Besides, a digital synchronous rectification strategy is proposed in forward mode to improve the working efficiency.The turn-on time of LVS switches is set to the same as the HVS switches.The conduction time of LVS switches equals the estimation value of body diodes' conduction time with the lightest load.Simulations verify the accuracy of this estimation.Furthermore, power loss analysis is conducted with different LVS DC voltages in two directions.Power loss is much more when the working frequency is beyond main resonant frequency, because of high conduction losses and turn-off losses.Efficiency with a half-bridge configuration is a little higher than that with full-bridge configuration in both directions, due to less turn-off losses.The loss is cut by 49% with the use of a synchronous strategy, showing the advantage in improving efficiency.At last, experiments are conducted to validate the theoretical analysis above.ZVS feature, the effectiveness of hybrid

Conclusions
In this work, a new CLTC multi-resonant DC-DC converter is proposed.Possessing the optimal ZVS + ZCS soft switching feature in all load range, CLTC benefits from little turn-off loss and high efficiency.The gain range is so wide that the demands of applications like battery chargers and DC microgrids can be satisfied easily.The problem of voltage regulation under light load conditions is so serious that voltage is not controllable.The hybrid full-bridge/half-bridge configuration is proposed to make gain curve monotonous under light load conditions.Discussion about voltage and current stresses, load and working frequency range in half-bridge configuration are put forth as well.Besides, a digital synchronous rectification strategy is proposed in forward mode to improve the working efficiency.The turn-on time of LVS switches is set to the same as the HVS switches.The conduction time of LVS switches equals the estimation value of body diodes' conduction time with the lightest load.Simulations verify the accuracy of this estimation.Furthermore, power loss analysis is conducted with different LVS DC voltages in two directions.Power loss is much more when the working frequency is beyond main resonant frequency, because of high conduction losses and turn-off losses.Efficiency with a half-bridge configuration is a little higher than that with full-bridge configuration in both directions, due to less turn-off losses.The loss is cut by 49% with the use of a synchronous strategy, showing the advantage in improving efficiency.At last, experiments are conducted to validate the theoretical analysis above.ZVS feature, the effectiveness of hybrid full-bridge/half-bridge configuration, and the validity of proposed digital synchronous rectification strategy are all verified through experiments.With the help of ZVS + ZCS feature, high efficiency can be harvested in a wide load range.The full load efficiency is 95.9% in forward mode and 94.9% in backward mode with LVS DC voltage of 50 V.The maximum efficiency is 97.0% with a LVS DC voltage of 50 V and load of 2 kW.
UH represents HVS DC voltage, while UL represents LVS DC voltage.Power flows in both forward and backward mode are modulated with pulse frequency modulation (PFM).In forward mode, S1 & S4 and S2 & S3 run with 50% duty cycle, the rectifier switches S6 & S7 and S5 & S8 are driven by the SR signals.In backward mode, S6 & S7 and S5 & S8 run at 50% duty cycle, S1 & S4 and S2 & S3 don't work, diodes on HVS realize SR.

Figure 2 .
Figure 2. The current and voltage waveforms of CLTC multi-resonant converter: (a) forward mode; (b) backward mode.

Figure 2 .
Figure 2. The current and voltage waveforms of CLTC multi-resonant converter: (a) forward mode; (b) backward mode.

Figure 3 .
Figure 3. Equivalent circuits for each stage in forward mode: (a) Mode A; (b) Mode B; (c) Mode C.

Figure 3 .
Figure 3. Equivalent circuits for each stage in forward mode: (a) Mode A; (b) Mode B; (c) Mode C.

Figure 4 .
Figure 4. Equivalent circuits for each stage in backward mode: (a) Mode A; (b) Mode B; (c) Mode C.

Figure 4 .
Figure 4. Equivalent circuits for each stage in backward mode: (a) Mode A; (b) Mode B; (c) Mode C.

Figure 5 .
Figure 5. Voltage gain obtained by FHA model in forward mode: (a) whole frequency range; (b)f s < f r ; (c) f s ≥ f r .

Figure 6 .
Figure 6.Voltage gain obtained by FHA model in backward mode: (a) whole frequency range; (b) f s < f r ; (c) f s ≥ f r .

Figure 7 .Figure 8 .
Figure 7. Voltage gain curve of full-bridge CLTC converter at light load condition.(a) Around gain of 1.02; (b) around again of 2.04.

Figure 7 .
Figure 7. Voltage gain curve of full-bridge CLTC converter at light load condition.(a) Around gain of 1.02; (b) around again of 2.04.

Figure 7 .Figure 8 .
Figure 7. Voltage gain curve of full-bridge CLTC converter at light load condition.(a) Around gain of 1.02; (b) around again of 2.04.

Figure 8 .
Figure 8. Voltage gain curve of CLTC converter at light load condition.

Figure 9 .
Figure 9. Topology decomposition in forward mode without synchronous rectification strategy.

Figure 9 .
Figure 9. Topology decomposition in forward mode without synchronous rectification strategy.

Figure 10 .
Figure 10.Normalized estimated conduction time tSR/T2 in calculation and simulation.

Figure 10 .
Figure 10.Normalized estimated conduction time t SR /T 2 in calculation and simulation.

Figure 11 .
Figure 11.The power loss distribution with 5 kW and different LVS DC voltages: (a) forward mode; (b) backward mode.Figure 11.The power loss distribution with 5 kW and different LVS DC voltages: (a) forward mode; (b) backward mode.

Figure 11 .
Figure 11.The power loss distribution with 5 kW and different LVS DC voltages: (a) forward mode; (b) backward mode.Figure 11.The power loss distribution with 5 kW and different LVS DC voltages: (a) forward mode; (b) backward mode.

Figure 13 .
Figure 13.The power loss distribution and comparison with and without synchronous strategy.

Figure 12 .
Figure 12.The power loss distribution and comparison between full-bridge and half-bridge configuration with 200 W load: (a) forward mode; (b) backward mode.

Energies 2018 ,Figure 12 .
Figure 12.The power loss distribution and comparison between full-bridge and half-bridge configuration with 200 W load: (a) forward mode; (b) backward mode.

Figure 13 .
Figure 13.The power loss distribution and comparison with and without synchronous strategy.

Figure 13 .
Figure 13.The power loss distribution and comparison with and without synchronous strategy.

Figure 15
Figure15shows experiment results in forward mode.The t SR is 4.6 µs in Figure15awith working frequency of 60 kHz and load of 3.5 kW.The t SR is 4.5 µs with Equation (25) and 4.3 µs in the proposed synchronous rectification strategy, which is basically consistent with the experiment results.The accuracy of calculation and the effectiveness of proposed synchronous rectification strategy are verified through experiments.Figure15bshows the waveforms around main resonant frequency.The resonant current is quite close to sinusoidal wave.The power loss is lower because of smaller turn-off loss in this situation.Energies 2018, 11, 227 17 of 22
-t 3 ]: S 5 and S 8 are still on in this mode, D 1 and D 4 are off in this mode.ZCS of D 1 and D 4 is realized as i Cr1 and i ds14 become zero at t 2 .The LVS goes into secondary resonance with the frequency of f r2b .At t 3 , S 1 and S 4 are off and ready to go into dead-time duration.When working frequency is bigger than main resonant frequency, Mode C and ZCS of HVS diodes disappear like LLC.The turn-off currents increase largely in this situation.

Table 1 .
Parameters of the converter.

Table 1 .
Parameters of the converter.

Table 2 .
Efficiency comparison with load of 200 W.

Table 2 .
Efficiency comparison with load of 200 W.