Control of a Three-phase to Single-phase Back-to-back Converter for Electrical Resistance Seam Welding Systems

DC link back-to-back converters are widely used in industrial applications. This interest comes from their power factor unity capability on the utility grid and to maintain regulated output parameters, thanks to the decoupling between the grid and the load side. In this paper, a 150 KVA prototype of DC link back-to-back converter for electrical resistance seam welding applications is described. The focus of the paper is on the control strategy developed to absorb constant power from the three-phase utility grid. The key idea is to allow the voltage on the DC bus to vary in order to avoid the propagation at the input side of the pulsed power required by the load. An estimation procedure of the load parameters is presented too. The effectiveness of this control scheme has been proved by simulations and tests.


Introduction
Electrical resistance welding (ERW) systems are widely used in the metallurgical and automotive industry [1][2][3][4].This interest for ERW systems comes from their capability to make high-speed welding with good heat concentration, without additional materials, solvents, and shielding gas.This leads to weld with high productivity, low cost, and less pollution.The basic principle of an ERW system is to weld two materials using the heat generated by the passage of an electric current through the resistance formed by the contact between two metal surfaces [2].Resistance seam welding (RSEW) is a particular ERW process where copper electrodes are disc-shaped to allow continuous welding of materials, commonly round or rectangular steel tubing.The electrodes rotate as the material passes between them.This allows the electrodes to stay in constant contact with the material to make continuous welds.RSEW typically applies low voltages and high welding currents in the range of 100 A-100 kA [2].The welding current is one of the most important parameters of the welding process, as the amount of heat produced is proportional to its square.
In RSEW systems, single-phase high AC welding current is preferred compared to DC current used in resistance spot welding systems due to better electrode life performance, longer welding process, and the simplicity of use of the converter [3].To perform at the above current requirement for RSEW for RSEW power supply, a suitable high power converter is needed to feed a step-up current load transformer.The typical power converter topologies make use of an indirect voltage source configuration, made of a three-phase front-end diode rectifier with a DC-link capacitor, or thyristors with an inductor and capacitor (LC) power decoupling filter, and a pulse width modulated (PWM) singlephase inverter in both cases.However, both diode and thyristor topologies have the drawback to absorb a highly distorted current from the utility grid, and, in the case of thyristors, to draw reactive power and to create commutation line notching problems.Improvements in electromagnetic compatibility (EMC) standards proposes to solve those problems [5].Additional PFC (power factor correction) circuits can be added to solve this problem.However, the solution proposed in this paper is to make use of a front-end PWM voltage source rectifier.Although many studies in the literature have dealt with indirect AC-AC converters with PWM rectifiers, they mainly treat the case of threephase to three-phase conversion where constant power is transferred between the input and output side or single-phase to single-phase conversion [6][7][8][9][10][11].Given the current and the PFC requirements for RSEW welding systems, a three-phase boost rectifier has to be used back-to-back with a singlephase voltage source inverter.This results in a three-phase to single-phase back-to-back converter topology studied in this paper.The main drawback to be taken into account for this application is that load parameters can vary in a non-linear way during the welding process [12].This paper aims to propose a control strategy acting on the DC link voltage to absorb constant power from a threephase grid and to deliver regulated output current and frequency to the load even in case of large load variations.
The paper is organized as follows: Section 2 presents the system topology and its mathematical description.Section 3 shows the proposed control strategy and simulations results.Section 4 shows the experimental results, and conclusions are given in Section 5.

System Description
The converter schematic is shown in Figure 1.On the grid side there is a three-phase voltage source rectifier fed through coupling inductances.On the load side there is a single-phase, full bridge voltage source inverter.Both converters are controlled by PWM techniques.The DC link has been designed to allow a DC voltage variation between 650 V and 850 V, with a nominal value UCnom of 780 V.This choice allows for a variation range of the DC link large enough to guarantee the proper functioning of the boost voltage source rectifier [11].For studying the system, the load has been modeled by an equivalent resistance and inductor (RL) circuit.This model is suitable to represent the short-circuited transformer used for the preliminary tests presented in Sections 2 and 3.The behavior of the system with the real load will be presented in the Section 4.

Mathematical Description of the System
Since the goals in this paper are to control the power factor, to regulate the DC link capacitor voltage, as well as the output current, the equations derived in this section highlight the grid currents and the capacitor voltage.

Pulse Width Modulated Rectifier
Let us consider a three-phase utility grid.Using Figure 1, the three-phase variables can be expressed in the synchronous rotating coordinates as: (1) The real and reactive powers supplied from the source are given by: ( If the d-axis of the rotating reference frame is well aligned with the AC voltage vector so that u q = 0, the instantaneous real and reactive powers absorbed from the utility grid are given by: If only real power is transferred from the grid to the DC link (i q = 0), the power balance relationship between the AC input and DC output is given as:

Power Pulsation Compensation
In order to perform an effective power pulsation compensation, a power decoupling capacitor voltage command has to be established to compensate for power pulsation on the load side.Let us consider the system in a sinusoidal steady-state.The current and voltage on the output side can be expressed as: where U out and I out are the effective values of the output voltage and current, ω out is the output angular frequency, and ϕ out is the phase displacement between the two.The instantaneous power p out (t) on the load is given by: and the instantaneous active power p active_inst (t) on the load is: The instantaneous active power varies at two times the output current frequency.If the PFC rectifier is forced to absorb a constant power from the utility, the voltage variation on the DC link will follow the frequency of the instantaneous active power.As a matter of fact, assuming that the constant Energies 2017, 10, 133 4 of 15 power supplied by the utility is equal to the active power P active of the load, neglecting the losses on the rectifier and inverter, we have: From the power balance between the input and output, the power on the DC link capacitors can be expressed as: The voltage of the capacitor tank can be obtained by integrating Equation ( 9): where cst is an integration constant.Supposing that when t = 0, the voltage across the capacitor tank has its nominal value U Cnom , we can rewrite Equation (10) as: Equation ( 11) highlights the variation of the DC link voltage due to the single-phase load.Some studies have addressed this DC link voltage ripple issue by adding a buffer circuit into the DC link to decouple the power ripples [13], or by using a ripple port module for ripple cancellation purposes [14].However, using such solutions in our case will increase the number of components, the complexity, and the cost of the system.Moreover, given that, in our application, the output current frequency is allowed to vary within a range depending of the material to weld, many buffer circuits corresponding to each possible frequency of the output current would be necessary.In [15], it has been proposed to mitigate the propagation of the power fluctuation of a variable speed wind turbines on the utility side by allowing the DC link voltage to vary within a certain range.Such an approach will be used in this paper to compensate the power pulsation due to the single phase load.For that, Equation (11) provides a suitable DC link reference voltage to use.

Unity Power Factor Formulation
Power quality is performed when the total harmonic distortion (THD) generated by the converter at the point of common coupling is less than 5% with a power factor (PF) greater than 0.99 [16].The power factor calculation can be performed using Equation (12), where ϕ represents the phase displacement between the fundamental of the current and voltage: If the load parameters of the converter are constant and well-known, the PF requirement can be simply achieved by providing the appropriate current reference to the PFC rectifier.The most commonly used control strategy for PFC rectifier is the voltage-oriented control (VOC) [11].It is based on an external DC voltage control loop and an internal current decoupled control loop.The inner closed-loop current control is done in a rotating reference frame.The three-phase measured values are converted to an equivalent two-phase stationary system αβ and are then transformed to the rotating coordinate system dq using Clark and Park transformations.Proportional and integral (PI) regulators Energies 2017, 10, 133 5 of 15 are used on DC values i d and i q presented in Equation (1), to eliminate steady-state error.A unity power factor is obtained by forcing the current reference value i qref to be zero, while i dref is set to control the active power flow.The output signals from the PI controllers after dq to αβ transformation are used for switching signal generation by a space vector modulator (SVM).A SVM is chosen to generate the PMW rectifier command because it allows to extend the linear domain of about 15%.In the case of the converter studied here, unit power factor can be achieved by using the same approach and by setting the DC link voltage reference to follow Equation (11).

Control of the Output Current
The control of the output current is performed using a classical current loop.This output control loop is decoupled from the rectifier control loop due to the capacitor tank.The current flowing through the load inductor is measured and compared to its reference value.A PI controller uses the error signal to provide the voltage command which will be compared to the inverter carrier signal in order to generate the PWM commands for the inverter switches.

Proposed Estimation of Equivalent Load Parameter's Values
When load parameters vary, the reference current i d varies around its average value and the amplitude of the ripple is related to the gap between the preset values of the load parameters and their real values.The ripple of the reference current i d around its average value leads to a variable power absorption on the utility grid and increases the harmonic distortions of the grid current.Then, the control strategy has to be adapted to cope with those variations.
The relationship between the voltage across the capacitors and the phase displacement on the output side is known from Equation (11).Given that the phase displacement is directly related to the resistance and inductance of the load, it is possible to handle their variations by providing the appropriate DC bus voltage reference to the PFC rectifier.This requires a suitable estimation of the equivalent load parameters.
As previously mentioned, the load is modelled by the series connection of a resistance and an inductance.The value of these two parameters must be estimated.In order to evaluate the value of the resistance, the active power absorbed by the load can be used.The single-phase inverter output current and voltage are measured.Active power P active is evaluated each period and the actual value of resistance can be obtained using Equation (13): If the actual value of the resistance is known, the actual value of the inductance can be estimated using Ohm's law, as in Equation ( 14): The equivalent R, L estimation algorithm is shown in Figure 2. To optimize the digital signal processor (DSP) computational load, the proposed strategy will update the estimated parameters once each period.Given that the measures might be prone to noise, measurements are first filtered to reject any disturbances before being used in the estimation scheme.
each period.Given that the measures might be prone to noise, measurements are first filtered to reject any disturbances before being used in the estimation scheme.

Tuning of the Controllers
In order to eliminate the steady-state error, PI controllers are used at all control stages.The PI controller transfer function is given in the Equation (15) where Tn and Ti are the time constants of the integral correlation and the integral action, respectively: Using Equation (1), and taking into account the PWM modulator model, the current control loop can be equivalently represented by Figure 3b, where TPE represents the switching period and the sum of all of the parasitic process time constants.The DC link voltage is regulated using the active power carrying component of the grid current.Given Equation ( 4), the current flowing through the DC link capacitor can be expressed as: Using Equation ( 16), the DC link voltage control loop can be equivalently represented by Figure 3a.By using the same approach, the output current control loop can be represented by Figure 3c.Once the control loops are obtained, the coefficients of the controller can be designed using modulus and symmetrical optimum, such as that presented in [17].Table 1 summarizes the obtained controller parameters.

Tuning of the Controllers
In order to eliminate the steady-state error, PI controllers are used at all control stages.The PI controller transfer function is given in the Equation ( 15) where T n and T i are the time constants of the integral correlation and the integral action, respectively: Using Equation ( 1), and taking into account the PWM modulator model, the current control loop can be equivalently represented by Figure 3b, where T PE represents the switching period and the sum of all of the parasitic process time constants.The DC link voltage is regulated using the active power carrying component of the grid current.Given Equation ( 4), the current flowing through the DC link capacitor can be expressed as: Using Equation ( 16), the DC link voltage control loop can be equivalently represented by Figure 3a.By using the same approach, the output current control loop can be represented by Figure 3c.Once the control loops are obtained, the coefficients of the controller can be designed using modulus and symmetrical optimum, such as that presented in [17].Table 1.Proportional and integral (PI) controller's parameters.

Overview of the Control System
The block diagram of the whole structure of the controller is presented in the Figure 4.A closed loop phase locked loop (PLL) module has been added for the synchronization to the grid, such as that in [18].Table 1.Proportional and integral (PI) controller's parameters.

Control Section Open Loop Transfer Function T n T i Criterion Used
Grid current control loop

Overview of the Control System
The block diagram of the whole structure of the controller is presented in the Figure 4.A closed loop phase locked loop (PLL) module has been added for the synchronization to the grid, such as that in [18].

Overview of the Control System
The block diagram of the whole structure of the controller is presented in the Figure 4.A closed loop phase locked loop (PLL) module has been added for the synchronization to the grid, such as that in [18].

Simulations Results
Circuit parameters are presented in Table 2. Simulations are performed using PLECS© software [19].The active rectifier is controlled in the rotating frame dq as mentioned in the previous sections.A unit power factor is then obtained by forcing the current reference value i qref to be zero, while i dref is set to control the active power flow.5 presents a simulation where the load parameters are constant.In this simulation, the PFC rectifier has been set to follow the theoretical DC voltage ripples expressed in Equation ( 11) (Figure 5d).One can see in this figure that the pulsed power on the load side does not affect the feeder side.A constant power is supplied by the grid because the variations on the reference current i d shown in Figure 5b are very small (less than 3% between instants t = 0.16 s and t = 0.18 s) and the grid currents present regular amplitudes (Figure 5a).Output current is well regulated (Figure 5c) and the power factor calculated using Equation ( 12) is about 0.99 with a THD = 1.77% (Figure 5e).

Simulations Results
Circuit parameters are presented in Table 2. Simulations are performed using PLECS© software [19].The active rectifier is controlled in the rotating frame dq as mentioned in the previous sections.A unit power factor is then obtained by forcing the current reference value iqref to be zero, while idref is set to control the active power flow.5 presents a simulation where the load parameters are constant.In this simulation, the PFC rectifier has been set to follow the theoretical DC voltage ripples expressed in Equation ( 11) (Figure 5d).One can see in this figure that the pulsed power on the load side does not affect the feeder side.A constant power is supplied by the grid because the variations on the reference current id shown in Figure 5b are very small (less than 3% between instants t = 0.16 s and t = 0.18 s) and the grid currents present regular amplitudes (Figure 5a).Output current is well regulated (Figure 5c) and the power factor calculated using Equation ( 12) is about 0.99 with a THD = 1.77% (Figure 5e).

Step Change in the Output Current Reference
A second simulation shows the response of the controller with an output current reference step.Simulations results are presented in the Figure 6.At t = 0.18 s, the output current reference amplitude steps from 900 A to 1200 A. Good controller dynamics can be observed.

Step Change of Output Parameter Values
A third simulation shows the behavior of the controller with a step change of the load resistance and inductance.The left column of the Figure 7 presents the waveforms obtained without tracking the load parameter, while the right column of the Figure 7 shows the waveforms with the proposed control scheme, including an estimation of load variations.At the beginning of both simulations, the theoretical load resistance and inductance in the controller are equal to their actual circuit values.At t = 0.10 s, the load resistance is changed from R to 2.5R.At t = 0.183 s, the load inductance is changed from L to 2L, and at t = 0.275 s, the load resistance is changed from 2.5R to 0.8R.The actual and estimated resistance and inductance values are shown in Figure 7b,d, respectively.The estimation delay is, at most, one period of the output current.The choice to update the load parameters at the end of each period of the output current instead of making a sliding average is made to be as close as possible to the hardware implementation.In fact, the frequency of the output current can be set in a range of 5-80 Hz depending on the type of the material to weld.Making a sliding average at low

Step Change in the Output Current Reference
A second simulation shows the response of the controller with an output current reference step.Simulations results are presented in the Figure 6.At t = 0.18 s, the output current reference amplitude steps from 900 A to 1200 A. Good controller dynamics can be observed.

Step Change in the Output Current Reference
A second simulation shows the response of the controller with an output current reference step.Simulations results are presented in the Figure 6.At t = 0.18 s, the output current reference amplitude steps from 900 A to 1200 A. Good controller dynamics can be observed.

Step Change of Output Parameter Values
A third simulation shows the behavior of the controller with a step change of the load resistance and inductance.The left column of the Figure 7 presents the waveforms obtained without tracking the load parameter, while the right column of the Figure 7 shows the waveforms with the proposed control scheme, including an estimation of load variations.At the beginning of both simulations, the theoretical load resistance and inductance in the controller are equal to their actual circuit values.At t = 0.10 s, the load resistance is changed from R to 2.5R.At t = 0.183 s, the load inductance is changed from L to 2L, and at t = 0.275 s, the load resistance is changed from 2.5R to 0.8R.The actual and estimated resistance and inductance values are shown in Figure 7b,d, respectively.The estimation delay is, at most, one period of the output current.The choice to update the load parameters at the end of each period of the output current instead of making a sliding average is made to be as close as possible to the hardware implementation.In fact, the frequency of the output current can be set in a range of 5-80 Hz depending on the type of the material to weld.Making a sliding average at low

Step Change of Output Parameter Values
A third simulation shows the behavior of the controller with a step change of the load resistance and inductance.The left column of the Figure 7 presents the waveforms obtained without tracking the load parameter, while the right column of the Figure 7 shows the waveforms with the proposed control scheme, including an estimation of load variations.At the beginning of both simulations, the theoretical load resistance and inductance in the controller are equal to their actual circuit values.At t = 0.10 s, the load resistance is changed from R to 2.5R.At t = 0.183 s, the load inductance is changed from L to 2L, and at t = 0.275 s, the load resistance is changed from 2.5R to 0.8R.The actual and estimated resistance and inductance values are shown in Figure 7b,d, respectively.The estimation delay is, at most, one period of the output current.The choice to update the load parameters at the end of each period of the output current instead of making a sliding average is made to be as close as possible to the hardware implementation.In fact, the frequency of the output current can be set Energies 2017, 10, 133 10 of 15 in a range of 5-80 Hz depending on the type of the material to weld.Making a sliding average at low frequency might cause an overflow of the microcontroller's memory due to the sampling period.However, this update delay does not significantly affect the control scheme.
When the controller does not take into account the load variations (left column of Figure 7), grid currents present harmonic distortions and irregular amplitudes (Figure 7e,k), leading to fluctuating power supplied by the three phase grid.This results in a large ripple of the reference current i d around its mean value (Figure 7g).For example, the i d reference current's ripples between instants t = 0.32 s and t = 0.36 s is about 51.4%, leading to a power factor of about 0.90 with a THD = 38.91%.On the other hand, when the load parameters are estimated and are included in the calculation of the DC bus voltage reference (Figure 7j compared to Figure 7i), their variations do not affect grid currents.This leads to regular amplitudes of the latter (Figure 7f) and, hence, constant power is drawn from the grid.The i d reference current's ripples around its mean value between instants t = 0.32 s and t = 0.36 s is now about 4.6%, corresponding to a reduction of about 91% and resulting to a power factor of about 0.99 with a THD = 6.88%.The THD has, thus, been reduced by about 82%.This confirms the effectiveness of the proposed adaptive scheme.
Energies 2017, 10, 133 10 of 15 frequency might cause an overflow of the microcontroller's memory due to the sampling period.However, this update delay does not significantly affect the control scheme.When the controller does not take into account the load variations (left column of Figure 7), grid currents present harmonic distortions and irregular amplitudes (Figure 7e,k), leading to fluctuating power supplied by the three phase grid.This results in a large ripple of the reference current id around its mean value (Figure 7g).For example, the id reference current's ripples between instants t = 0.32 s and t = 0.36 s is about 51.4%, leading to a power factor of about 0.90 with a THD = 38.91%.On the other hand, when the load parameters are estimated and are included in the calculation of the DC bus voltage reference (Figure 7j compared to Figure 7i), their variations do not affect grid currents.This leads to regular amplitudes of the latter (Figure 7f) and, hence, constant power is drawn from the grid.The id reference current's ripples around its mean value between instants t = 0.32 s and t = 0.36 s is now about 4.6%, corresponding to a reduction of about 91% and resulting to a power factor of about 0.99 with a THD = 6.88%.The THD has, thus, been reduced by about 82%.This confirms the effectiveness of the proposed adaptive scheme.(k) (l)

Experimental Results
In order to verify the expected behavior of the control scheme, a full-scale prototype has been built.The specifications of the experimental setup are the same as in Table 2.The layout of the prototype is shown in Figure 8.This prototype consists of a capacitor tank designed for a voltage up to 900 VDC, a three-phase rectifier and a full bridge inverter both using Fuji insulated gate bipolar transistor's (IGBT) (6MBI450V-120-50) [20], a three-phase coupling inductance and a load.The control of the whole system shown in Figure 4 has been implemented on a single Texas Instruments TMS320F28335 "Delfino" microcontroller [21].Two series of tests are presented in the following sections.The first set of tests has been done on a full scale dummy load and the second set of tests has been done on a resistance seam welding system.

Tests on a Dummy Load
The dummy load used consists of a short-circuited high-power transformer with a 1:30 turn ratio.Figure 9a-c show the waveforms of a test performed at Iout = 848 A and Sout = 144 kVA.Two

Experimental Results
In order to verify the expected behavior of the control scheme, a full-scale prototype has been built.The specifications of the experimental setup are the same as in Table 2.The layout of the prototype is shown in Figure 8.This prototype consists of a capacitor tank designed for a voltage up to 900 VDC, a three-phase rectifier and a full bridge inverter both using Fuji insulated gate bipolar transistor's (IGBT) (6MBI450V-120-50) [20], a three-phase coupling inductance and a load.The control of the whole system shown in Figure 4 has been implemented on a single Texas Instruments TMS320F28335 "Delfino" microcontroller [21].Two series of tests are presented in the following sections.The first set of tests has been done on a full scale dummy load and the second set of tests has been done on a resistance seam welding system.

Experimental Results
In order to verify the expected behavior of the control scheme, a full-scale prototype has been built.The specifications of the experimental setup are the same as in Table 2.The layout of the prototype is shown in Figure 8.This prototype consists of a capacitor tank designed for a voltage up to 900 VDC, a three-phase rectifier and a full bridge inverter both using Fuji insulated gate bipolar transistor's (IGBT) (6MBI450V-120-50) [20], a three-phase coupling inductance and a load.The control of the whole system shown in Figure 4 has been implemented on a single Texas Instruments TMS320F28335 "Delfino" microcontroller [21].Two series of tests are presented in the following sections.The first set of tests has been done on a full scale dummy load and the second set of tests has been done on a resistance seam welding system.

Tests on a Dummy Load
The dummy load used consists of a short-circuited high-power transformer with a 1:30 turn ratio.Figure 9a-c show the waveforms of a test performed at Iout = 848 A and Sout = 144 kVA.Two

Tests on a Dummy Load
The dummy load used consists of a short-circuited high-power transformer with a 1:30 turn ratio.Figure 9a-c show the waveforms of a test performed at I out = 848 A and S out = 144 kVA.Two phases of the grid current and one phase of the grid voltage are presented in Figure 9a.The voltage (pink trace) and its corresponding current (blue trace) are perfectly synchronized.In this case, the power factor calculated using Equation ( 12) is about 0.99.Grid currents show regular amplitudes.Figure 9b shows the DC bus voltage for the same operating point as above.The ripple ratio of DC bus voltage is a little bit higher (2%) than the simulation results shown in Figure 5d.This is due to the losses on the inverter and to component tolerances.Figure 9c presents the harmonic spectrum of the grid current presented in Figure 9a (blue trace).One can denote a low harmonic content with a THD of about 9.69%.Figure 9d shows the output current at I out = 106 A, S out = 2.25 kVA.
Figure 10 presents waveforms plotted with samples recorded using the microcontroller to test the response of the controller with an output current reference step and the load parameter's estimation scheme.At t = 0.05 s, the amplitude of the output current reference steps from 450 A to 1200 A (exactly at the beginning of the output current period), and at t = 0.12 s the amplitude is changed from 1200 A to 450 A (generic instant within a period).Figure 10a,b present the load resistance and inductance estimations over time.A smooth transition occurs after the first step.A peak is observed on the output voltage (Figure 10d) after the second step.However, the controller effectively handles the instantaneous variations of the output current reference.Test results demonstrate the correct behavior of the proposed control strategy.
Energies 2017, 10, 133 12 of 15 phases of the grid current and one phase of the grid voltage are presented in Figure 9a.The voltage (pink trace) and its corresponding current (blue trace) are perfectly synchronized.In this case, the power factor calculated using Equation ( 12) is about 0.99.Grid currents show regular amplitudes.
Figure 9b shows the DC bus voltage for the same operating point as above.The ripple ratio of DC bus voltage is a little bit higher (2%) than the simulation results shown in Figure 5d.This is due to the losses on the inverter and to component tolerances.Figure 9c presents the harmonic spectrum of the grid current presented in Figure 9a (blue trace).One can denote a low harmonic content with a THD of about 9.69%.Figure 9d shows the output current at Iout = 106 A, Sout = 2.25 kVA.
Figure 10 presents waveforms plotted with samples recorded using the microcontroller to test the response of the controller with an output current reference step and the load parameter's estimation scheme.At t = 0.05 s, the amplitude of the output current reference steps from 450 A to 1200 A (exactly at the beginning of the output current period), and at t = 0.12 s the amplitude is changed from 1200 A to 450 A (generic instant within a period).Figure 10a,b present the load resistance and inductance estimations over time.A smooth transition occurs after the first step.A peak is observed on the output voltage (Figure 10d) after the second step.However, the controller effectively handles the instantaneous variations of the output current reference.Test results demonstrate the correct behavior of the proposed control strategy.

Welding Test with the Converter
The welding test has been performed on a functional RSEW system where its traditional power converter has been replaced by the prototype presented in Figure 8.The effective value of the output current required to perform a barrel weld was about 500 A. The whole welding system and the barrel welded when using the prototype as the power converter are presented at the Figure 11.The whole welding process is carried out in approximately 7 s. Figure 12 presents the estimated parameter's traces during the welding process.Figure 12a presents the fundamental of the output voltage and the output current traces during the welding process used for the output power estimation (a section between t = 1 s and t = 1.5 s). Figure 12b presents the estimated active power at the output of the converter, whereas Figure 12c,d present the estimated load resistance and inductance, respectively.From t = 0 s to t = 0.8 s, the system is in idle state.Output resistance and inductance preset values are about 0.132 Ω and 1.5 mH, respectively.From t = 0.8 s to t = 2.6 s, the converter enters into normal operation.The welding electrodes are joined, but without the barrel to weld.A current is flowing between the electrodes and a power of about 36 kW is delivered at the output of the converter.At t = 2.6 s, the barrel to weld begins to flow between the welding electrodes.The output power of the converter steps from 36 kW to 46.5 kW (Figure 12b) and, hence, a useful power of about 10 kW for the welding.The output resistance is estimated over time, in steps from

Welding Test with the Converter
The welding test has been performed on a functional RSEW system where its traditional power converter has been replaced by the prototype presented in Figure 8.The effective value of the output current required to perform a barrel weld was about 500 A. The whole welding system and the barrel welded when using the prototype as the power converter are presented at the Figure 11.

Welding Test with the Converter
The welding test has been performed on a functional RSEW system where its traditional power converter has been replaced by the prototype presented in Figure 8.The effective value of the output current required to perform a barrel weld was about 500 A. The whole welding system and the barrel welded when using the prototype as the power converter are presented at the Figure 11.The whole welding process is carried out in approximately 7 s. Figure 12 presents the estimated parameter's traces during the welding process.Figure 12a presents the fundamental of the output voltage and the output current traces during the welding process used for the output power estimation (a section between t = 1 s and t = 1.5 s). Figure 12b presents the estimated active power at the output of the converter, whereas Figure 12c,d present the estimated load resistance and inductance, respectively.From t = 0 s to t = 0.8 s, the system is in idle state.Output resistance and inductance preset values are about 0.132 Ω and 1.5 mH, respectively.From t = 0.8 s to t = 2.6 s, the converter enters into normal operation.The welding electrodes are joined, but without the barrel to weld.A current is flowing between the electrodes and a power of about 36 kW is delivered at the output of the converter.At t = 2.6 s, the barrel to weld begins to flow between the welding electrodes.The output power of the converter steps from 36 kW to 46.5 kW (Figure 12b) and, hence, a useful power of about 10 kW for the welding.The output resistance is estimated over time, in steps from The whole welding process is carried out in approximately 7 s. Figure 12 presents the estimated parameter's traces during the welding process.Figure 12a presents the fundamental of the output voltage and the output current traces during the welding process used for the output power estimation (a section between t = 1 s and t = 1.5 s). Figure 12b presents the estimated active power at the output of the converter, whereas Figure 12c,d present the estimated load resistance and inductance, respectively.From t = 0 s to t = 0.8 s, the system is in idle state.Output resistance and inductance preset values are about 0.132 Ω and 1.5 mH, respectively.From t = 0.8 s to t = 2.6 s, the converter enters into normal operation.The welding electrodes are joined, but without the barrel to weld.A current is flowing between the electrodes and a power of about 36 kW is delivered at the output of the converter.
Energies 2017, 10, 133 14 of 15 At t = 2.6 s, the barrel to weld begins to flow between the welding electrodes.The output power of the converter steps from 36 kW to 46.5 kW (Figure 12b) and, hence, a useful power of about 10 kW for the welding.The output resistance is estimated over time, in steps from 0.13 Ω to 0.18 Ω (Figure 12c) and the estimated output inductance, which was decreasing, steps from 1.58 mH to 1.61 mH (Figure 12d).One can observe that the output parameters vary when the welding starts and during the welding process.This justifies a suitable estimation of those parameters over time and their integration into the control scheme.
Energies 2017, 10, 133 14 of 15 0.13 Ω to 0.18 Ω (Figure 12c) and the estimated output inductance, which was decreasing, steps from 1.58 mH to 1.61 mH (Figure 12d).One can observe that the output parameters vary when the welding starts and during the welding process.This justifies a suitable estimation of those parameters over time and their integration into the control scheme.

Conclusions
This paper explores the control of a three-phase to single-phase back-to-back converter to achieve both a unit power factor and constant power on the utility grid and output regulated parameters for electrical resistance welding applications.The proposed control strategy is to vary the DC link voltage to manage the variations generated by the load, avoiding their propagation on the feeder side.A suitable estimation of the load parameters is also performed to handle the case of load variations.Simulation results proved that by allowing the DC link voltage to vary in a suitable manner, the requirement in terms of power factor can be achieved at the point of common coupling.Moreover, these simulation results have shown that taking into account the load variations in the control scheme can reduce the THD of grid currents by more than 80%.Tests have been carried out on a dummy load and on a real resistance seam welding machine.Both tests have confirmed good functioning of the estimation scheme and, hence, the effectiveness of the proposed control strategy.

Conclusions
This paper explores the control of a three-phase to single-phase back-to-back converter to achieve both a unit power factor and constant power on the utility grid and output regulated parameters for electrical resistance welding applications.The proposed control strategy is to vary the DC link voltage to manage the variations generated by the load, avoiding their propagation on the feeder side.A suitable estimation of the load parameters is also performed to handle the case of load variations.Simulation results proved that by allowing the DC link voltage to vary in a suitable manner, the requirement in terms of power factor can be achieved at the point of common coupling.Moreover, these simulation results have shown that taking into account the load variations in the control scheme can reduce the THD of grid currents by more than 80%.Tests have been carried out on a dummy load and on a real resistance seam welding machine.Both tests have confirmed good functioning of the estimation scheme and, hence, the effectiveness of the proposed control strategy.

Figure 1 .
Figure 1.Three-phase to single-phase converter schematic, with the resistance and inductor (RL) equivalent load.

Figure 1 .
Figure 1.Three-phase to single-phase converter schematic, with the resistance and inductor (RL) equivalent load.
Initialisation of DC bus voltage reference UcrefStartCalculation of the output active power Deduction of the actual values of R and L using (13) and (14) Update the reference value of DC link voltage Ucref using (11) New value of R or L obtained ?No Yes No Yes Measure of the output current and estimation of the fundamental of the output voltage with voltage command used in PWM generation End of the period of the output current ?

Figure 2 .
Figure 2. Flowchart of the R, L estimation algorithm.

Figure 2 .
Figure 2. Flowchart of the R, L estimation algorithm.

Figure 3 .
Figure 3. Equivalent representation of the control loops.(a) DC link voltage control loop; (b) the grid current control loop; and (c) the output current control loop.

Figure 3 .
Figure 3. Equivalent representation of the control loops.(a) DC link voltage control loop; (b) the grid current control loop; and (c) the output current control loop.

Figure 3 .
Figure 3. Equivalent representation of the control loops.(a) DC link voltage control loop; (b) the grid current control loop; and (c) the output current control loop.

Figure 4 .
Figure 4. Structure of the controller.Proportional and integral (PI) denotes proportional and integral controller.

Figure 4 .
Figure 4. Structure of the controller.Proportional and integral (PI) denotes proportional and integral controller.

Figure 6 .
Figure 6.Waveforms on the circuit with change in the reference of the output current.(a) Grid currents; (b) DC bus voltage.UCref = reference value (blue trace), UCre = real value (red trace); (c) The output current iout.

Figure 5 .
Figure 5. Waveforms on the converter with constant load where output power S out = 140 KVA.(a) Grid currents; (b) reference current i d in the dq frame; (c) output current i out ; (d) DC bus voltage.U Cre = real value (red trace), U Cref = reference value (blue trace); and (e) the harmonic spectrum of one of the grid currents.

Figure 5 .
Figure 5. Waveforms on the converter with constant load where output power Sout = 140 KVA.(a) Grid currents; (b) reference current id in the dq frame; (c) output current iout; (d) DC bus voltage.UCre = real value (red trace), UCref = reference value (blue trace); and (e) the harmonic spectrum of one of the grid currents.

Figure 6 .
Figure 6.Waveforms on the circuit with change in the reference of the output current.(a) Grid currents; (b) DC bus voltage.UCref = reference value (blue trace), UCre = real value (red trace); (c) The output current iout.

Figure 6 .
Figure 6.Waveforms on the circuit with change in the reference of the output current.(a) Grid currents; (b) DC bus voltage.U Cref = reference value (blue trace), U Cre = real value (red trace); (c) The output current i out .

Figure 7 .
Figure 7. Simulations results of a step change of load parameters.(a) Real and theoretical load resistance; (b) real and estimated load resistance; (c) real and theoretical load inductance; (d) real and estimated load inductance; (e) grid currents without estimation scheme; (f) grid currents with estimation scheme; (g) reference current id without estimation scheme; (h) reference current id with estimation scheme; (i) DC bus voltage reference and real DC bus voltage without the estimation scheme; (j) DC bus voltage reference and real DC bus voltage with the estimation scheme; (k) harmonic spectrum of one of the grid currents without the estimation scheme; and (l) harmonic spectrum of one of the grid currents with estimation scheme.

Figure 7 .
Figure 7. Simulations results of a step change of load parameters.(a) Real and theoretical load resistance; (b) real and estimated load resistance; (c) real and theoretical load inductance; (d) real and estimated load inductance; (e) grid currents without estimation scheme; (f) grid currents with estimation scheme; (g) reference current i d without estimation scheme; (h) reference current i d with estimation scheme; (i) DC bus voltage reference and real DC bus voltage without the estimation scheme; (j) DC bus voltage reference and real DC bus voltage with the estimation scheme; (k) harmonic spectrum of one of the grid currents without the estimation scheme; and (l) harmonic spectrum of one of the grid currents with estimation scheme.

Figure 7 .
Figure 7. Simulations results of a step change of load parameters.(a) Real and theoretical load resistance; (b) real and estimated load resistance; (c) real and theoretical load inductance; (d) real and estimated load inductance; (e) grid currents without estimation scheme; (f) grid currents with estimation scheme; (g) reference current id without estimation scheme; (h) reference current id with estimation scheme; (i) DC bus voltage reference and real DC bus voltage without the estimation scheme; (j) DC bus voltage reference and real DC bus voltage with the estimation scheme; (k) harmonic spectrum of one of the grid currents without the estimation scheme; and (l) harmonic spectrum of one of the grid currents with estimation scheme.

Figure 9 .
Figure 9. Test results: (a) Two phases of grid currents (blue and red), one phase of the grid voltage corresponding to blue current (pink).Vertical sensitivities: CH1 and CH2 = 50 A/div, CH3 = 250 V/div; and (b) DC bus voltage.Vertical sensitivity CH3 = 100 V/div; (c) Harmonic spectrum of one of the grid current (blue curve of the Figure 9a); and (d) the output current at 2.25 kVA.Vertical sensitivity CH1 = 50 A/div.

Figure 9 .
Figure 9. Test results: (a) Two phases of grid currents (blue and red), one phase of the grid voltage corresponding to blue current (pink).Vertical sensitivities: CH1 and CH2 = 50 A/div, CH3 = 250 V/div; and (b) DC bus voltage.Vertical sensitivity CH3 = 100 V/div; (c) Harmonic spectrum of one of the grid current (blue curve of the Figure 9a); and (d) the output current at 2.25 kVA.Vertical sensitivity CH1 = 50 A/div.

Figure 10 .
Figure 10.Waveforms on the prototype plotted with samples recorded in the digital signal processor (DSP).(a) Estimated resistance over time; (b) estimated inductance over time; (c) reference of the DC bus voltage (blue), real DC bus voltage (red); (d) the fundamental of the output voltage estimated; and (e) the output current.

Figure 11 .
Figure 11.Resistance seam welding system.(a) Whole welding system; and (b) a barrel welded with the prototype as the power converter.

Figure 10 .
Figure 10.Waveforms on the prototype plotted with samples recorded in the digital signal processor (DSP).(a) Estimated resistance over time; (b) estimated inductance over time; (c) reference of the DC bus voltage (blue), real DC bus voltage (red); (d) the fundamental of the output voltage estimated; and (e) the output current.

Figure 10 .
Figure 10.Waveforms on the prototype plotted with samples recorded in the digital signal processor (DSP).(a) Estimated resistance over time; (b) estimated inductance over time; (c) reference of the DC bus voltage (blue), real DC bus voltage (red); (d) the fundamental of the output voltage estimated; and (e) the output current.

Figure 11 .
Figure 11.Resistance seam welding system.(a) Whole welding system; and (b) a barrel welded with the prototype as the power converter.

Figure 11 .
Figure 11.Resistance seam welding system.(a) Whole welding system; and (b) a barrel welded with the prototype as the power converter.

Figure 12 .
Figure 12.Waveforms of the estimated output parameters during welding process.(a) Output current measured (blue trace) and fundamental of the output voltage estimated (red trace); (b) output active power; (c) estimated output resistance during welding process; and (d) estimated output inductance during welding process.

Figure 12 .
Figure 12.Waveforms of the estimated output parameters during welding process.(a) Output current measured (blue trace) and fundamental of the output voltage estimated (red trace); (b) output active power; (c) estimated output resistance during welding process; and (d) estimated output inductance during welding process.
Table 1 summarizes the obtained controller parameters.

Table 2 .
System parameters used in simulation and experimental setup.PFC: Power factor Correction.

Table 2 .
System parameters used in simulation and experimental setup.PFC: Power factor Correction.