0.5-V 281-nW Versatile Mixed-Mode Filter Using Multiple-Input/Output Differential Difference Transconductance Amplifiers

This paper presents a new low-voltage versatile mixed-mode filter which uses a multiple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multiple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed-mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology.


Introduction
Active analog blocks, such as the operational amplifier (OA) or the transconductance amplifier (TA), are essential components for electronic devices, communication systems, and sensor interfaces.These blocks typically use the standard two inputs (i.e., a single differential stage).However, it has been confirmed that the use of a block with multiple inputs can reduce the number of components, silicon area, and power dissipation of some applications by a factor of approximately k, where k is the number of TA inputs [1].Several applications based on this concept have been presented in [1][2][3][4].Some other examples of multiple-input blocks are the differential difference amplifier (DDA) [5][6][7][8][9], differential difference current conveyor (DDCC) [10,11], differential difference operational floating amplifier (DDOFA) [12], differential difference transconductance amplifier (DDTA) [13,14], and many others.All these blocks allow for more arithmetic operations due to their Sensors 2024, 24, 32 2 of 18 multiple-input capabilities and are therefore widely used in instrumentation amplifiers, signal conditioning, differential amplification, filters, and many other applications.Although these blocks can reduce an application's complexity and the number of blocks utilized, their internal structure is more complex than that of a standard two-input block.This is primarily due to the increased number of differential stages that are required to increase the number of inputs.The multiple-input MOS transistor (MI-MOST) provides a solution to avoid this problem and maintain a single differential stage [15][16][17].It can be used in any standard CMOS technology without constraints.The first experimental results of MI-MOST are presented in [15][16][17] and various applications based on MI-MOST are presented in [18][19][20][21][22][23][24].
Filters play an important role in electronic, telecommunication and control systems.They can be used to reduce harmonics and filter noise in an electronic system, to separate or select desired signals, to remove unwanted signals in telecommunication systems, or to reduce the noise component of measurement signals in a control system.There are five common filtering functions that can be classified, namely the low-pass filter (LPF), high-pass filter (HPF), band-pass filter (BPF), band-stop filter (BSF), and all-pass filter (APF).These filtering functions can be designed using passive and active components, called passive filters or active filters, respectively.Second-order filters (or biquad filters) can be used to realize high-order filters applied to a high-fidelity three-ways crossover loudspeaker network and to a phase-locked loop.
Using active device-based filters, second-order LPF, HPF, BPF, BSF and APF (five filter functions) can be provided in a single topology, creating the so-called universal filter.Circuits that can provide voltage-mode (VM) (input and output as voltage), current-mode (CM) (input and output as current), transadmittance-mode (TAM) (input as voltage and output as current) and transimpedance-mode (TIM) (input as current and output as voltage) transfer functions in the same circuit are classified as mixed-mode universal filters.In a perfect mixed-mode universal filter, each mode of the transfer function should provide five filter functions, therefore obtaining twenty filter functions in a single topology.In addition, perfect universal filters should have high input impedance and low output impedance if the input and output are in voltage forms and low input and high output impedance if the input and output are in current forms.
The OTA (operational transconductance amplifier) has been used to realize mixedmode universal filters [52][53][54][55][56][57][58][59][60].However, the circuits in [52,54,59] require passive or active components, the circuits in [53,56,57] do not provide twenty transfer functions, and the circuits in [52,53,58,60] require inverted input signals.It should be noted that the structure of active devices used in  is not designed for low-voltage low-power filters.Filters for such applications are in high demand, especially for biosignal and sensor signal processing.Many filters based on multiple-input DDTA have been presented [61][62][63][64][65][66][67][68].This paper presents a versatile mixed-mode filter using MIMO-DDTAs.The circuit has six input voltages, three input currents, three output voltages, and two output currents; as such, it offers 61 transfer functions of LPF, BPF, HPF, BSF, and APF in the same topology.The six input voltage terminals possess a high-impedance level, and the three output voltage nodes possess a low-impedance level, which is ideal for voltage-mode circuits.The two output current terminals also possess a high-impedance level which can be connected directly to loads without buffer circuit requirements.The natural frequency of the filters can also be controlled electronically.The proposed versatile mixed-mode filter uses a supply voltage of 0.5 V and 281 nW of power consumption.
The paper is organized as follows: Section 2 describes the multiple-input/output DDTA.Section 3 describes the application of the versatile mixed-mode filter and nonideality analysis.Section 4 presents the simulation results.Finally, the conclusion is given in Section 5.

Proposed DDTA Circuit with Multiple-Input and Multiple-Output
The electrical symbol of the proposed multiple-input/output differential-difference transconductance amplifier is shown in Figure 1.Its performance, in an ideal case, is described by Equation (1).The circuit possesses one low-impedance output w, which provides a difference of the sums of the voltages V y+ and V y− , applied to its non-inverting and inverting terminals, respectively.It further has a high-impedance output o, which provides a current, proportional to the voltage V w appearing at the w terminal.
Sensors 2024, 24, x FOR PEER REVIEW 3 of 18 for such applications are in high demand, especially for biosignal and sensor signal processing.Many filters based on multiple-input DDTA have been presented [61][62][63][64][65][66][67][68].This paper presents a versatile mixed-mode filter using MIMO-DDTAs.The circuit has six input voltages, three input currents, three output voltages, and two output currents; as such, it offers 61 transfer functions of LPF, BPF, HPF, BSF, and APF in the same topology.The six input voltage terminals possess a high-impedance level, and the three output voltage nodes possess a low-impedance level, which is ideal for voltage-mode circuits.The two output current terminals also possess a high-impedance level which can be connected directly to loads without buffer circuit requirements.The natural frequency of the filters can also be controlled electronically.The proposed versatile mixed-mode filter uses a supply voltage of 0.5 V and 281 nW of power consumption.
The paper is organized as follows: Section 2 describes the multiple-input/output DDTA.Section 3 describes the application of the versatile mixed-mode filter and non-ideality analysis.Section 4 presents the simulation results.Finally, the conclusion is given in Section 5.

Proposed DDTA Circuit with Multiple-Input and Multiple-Output
The electrical symbol of the proposed multiple-input/output differential-difference transconductance amplifier is shown in Figure 1.Its performance, in an ideal case, is described by Equation (1).The circuit possesses one low-impedance output w, which provides a difference of the sums of the voltages Vy+ and Vy−, applied to its non-inverting and inverting terminals, respectively.It further has a high-impedance output o, which provides a current, proportional to the voltage Vw appearing at the w terminal.The CMOS structure of the proposed circuit is shown in Figure 2. The circuit consists of two blocks, a multiple-input differential-difference amplifier (MI-DDA) and a multipleoutput transconductance amplifier (MO-TA).The CMOS structure of the proposed circuit is shown in Figure 2. The circuit consists of two blocks, a multiple-input differential-difference amplifier (MI-DDA) and a multipleoutput transconductance amplifier (MO-TA).
The MI-DDA can be seen as a two-stage internal OTA, operating in a unity-gain feedback configuration.The first gain stage is formed by the transistors M 1 -M 12 , M 14 , M 15 , while the second stage is formed by the transistors M 13 and M 16 .The capacitance C C is used for frequency compensation.The first stage can be seen as a current-mirror OTA, with a differential amplifier M 1 -M 10 and a set of current mirrors M 5 -M 12 , M 6 -M 11 , M 14 -M 15 , acting as a differential to a single output converter.
The input stage is based on a non-tailed bulk-driven differential pair M 1 -M 4 , which behaves as a differential amplifier with high CMRR and PSRR performances, while also being able to operate at extremely low supply voltages [69], even lower than the threshold voltages of the used MOS transistors.In order to increase the voltage gain, a partial positive feedback (PPF) is applied.The PPF is created by two cross-coupled transistor pairs: M 7 -M 8 and M 9 -M 10 .The cross-coupled pairs generate negative conductances that partially compensate for the conductances of the diode-connected transistors M 2A,B for the "upper" pair, and M 5 , M 6 for the "lower" pair.Therefore, the resulting conductances increase at the drains of these transistors, and, consequently, the first stage transconductance and voltage gain also increase.In particular, the upper pair increases the voltage gain from the bulk terminals to the gates of M 1A,B [70], while the lower pair increases the current gains of the current mirrors M 5 -M 12 and M 6 -M 11 [71].The combination of two PPF circuits decreases the overall sensitivity of the transconductance gain of the first stage to transistor mismatch [63].This achieves a larger voltage gain while maintaining relatively low sensitivity of the input stage and avoiding problems with frequency compensation of the DDA.The MI-DDA can be seen as a two-stage internal OTA, operating in a unity-gain feedback configuration.The first gain stage is formed by the transistors M1-M12, M14, M15, while the second stage is formed by the transistors M13 and M16.The capacitance CC is used for frequency compensation.The first stage can be seen as a current-mirror OTA, with a differential amplifier M1-M10 and a set of current mirrors M5-M12, M6-M11, M14-M15, acting as a differential to a single output converter.
The input stage is based on a non-tailed bulk-driven differential pair M1-M4, which behaves as a differential amplifier with high CMRR and PSRR performances, while also being able to operate at extremely low supply voltages [69], even lower than the threshold voltages of the used MOS transistors.In order to increase the voltage gain, a partial positive feedback (PPF) is applied.The PPF is created by two cross-coupled transistor pairs: M7-M8 and M9-M10.The cross-coupled pairs generate negative conductances that partially compensate for the conductances of the diode-connected transistors M2A,B for the "upper" pair, and M5, M6 for the "lower" pair.Therefore, the resulting conductances increase at the drains of these transistors, and, consequently, the first stage transconductance and voltage gain also increase.In particular, the upper pair increases the voltage gain from the bulk terminals to the gates of M1A,B [70], while the lower pair increases the current gains of the current mirrors M5-M12 and M6-M11 [71].The combination of two PPF circuits decreases the overall sensitivity of the transconductance gain of the first stage to transistor mismatch [63].This achieves a larger voltage gain while maintaining relatively low sensitivity of the input stage and avoiding problems with frequency compensation of the DDA.
In order to realize a differential to difference function without duplicating the input stage, the multiple inputs were realized using the so-called multiple-input BD MOS transistors [15].The symbol and the implementation of the devices are shown in Figure 3a,b, respectively.A passive capacitive voltage divider is applied to the bulk terminal of the MOS transistor, thus creating a multiple-input device.The large resistors RMOSi, used to bias the bulk terminal for DC, are realized using two minimum-size MOS transistors operating in a cut-off region, as shown in Figure 3c.In order to realize a differential to difference function without duplicating the input stage, the multiple inputs were realized using the so-called multiple-input BD MOS transistors [15].The symbol and the implementation of the devices are shown in Figure 3a,b, respectively.A passive capacitive voltage divider is applied to the bulk terminal of the MOS transistor, thus creating a multiple-input device.The large resistors R MOSi , used to bias the bulk terminal for DC, are realized using two minimum-size MOS transistors operating in a cut-off region, as shown in Figure 3c.The MI-DDA can be seen as a two-stage internal OTA, operating in a unity-gain feedback configuration.The first gain stage is formed by the transistors M1-M12, M14, M15, while the second stage is formed by the transistors M13 and M16.The capacitance CC is used for frequency compensation.The first stage can be seen as a current-mirror OTA, with a differential amplifier M1-M10 and a set of current mirrors M5-M12, M6-M11, M14-M15, acting as a differential to a single output converter.
The input stage is based on a non-tailed bulk-driven differential pair M1-M4, which behaves as a differential amplifier with high CMRR and PSRR performances, while also being able to operate at extremely low supply voltages [69], even lower than the threshold voltages of the used MOS transistors.In order to increase the voltage gain, a partial positive feedback (PPF) is applied.The PPF is created by two cross-coupled transistor pairs: M7-M8 and M9-M10.The cross-coupled pairs generate negative conductances that partially compensate for the conductances of the diode-connected transistors M2A,B for the "upper" pair, and M5, M6 for the "lower" pair.Therefore, the resulting conductances increase at the drains of these transistors, and, consequently, the first stage transconductance and voltage gain also increase.In particular, the upper pair increases the voltage gain from the bulk terminals to the gates of M1A,B [70], while the lower pair increases the current gains of the current mirrors M5-M12 and M6-M11 [71].The combination of two PPF circuits decreases the overall sensitivity of the transconductance gain of the first stage to transistor mismatch [63].This achieves a larger voltage gain while maintaining relatively low sensitivity of the input stage and avoiding problems with frequency compensation of the DDA.
In order to realize a differential to difference function without duplicating the input stage, the multiple inputs were realized using the so-called multiple-input BD MOS transistors [15].The symbol and the implementation of the devices are shown in Figure 3a,b, respectively.A passive capacitive voltage divider is applied to the bulk terminal of the MOS transistor, thus creating a multiple-input device.The large resistors RMOSi, used to bias the bulk terminal for DC, are realized using two minimum-size MOS transistors operating in a cut-off region, as shown in Figure 3c.Assuming 1/ωC Bi << R MOSi , the voltage V b at the bulk terminal of the MI-BD-MOS transistor can be expressed as: where n is the number of inputs and β i is the voltage gain of the input capacitive divider: Note that with equal C Bi , β i = 1/n.The open-loop voltage gain of the DDA can be expressed as: where the coefficients m 1 and m 2 are the ratios of the absolute values of the negative and positive conductances in a lower and upper PPF circuit, respectively [62]: Note that the above coefficients should always be lower than unity to maintain circuit stability.In the proposed design, m 1 = m 2 = 0.5.This increased the voltage gain by 12 dB, thus compensating for the gain loss introduced by the input capacitive divider (approximately 10 dB) while maintaining the overall circuit sensitivity to transistor mismatch at a relatively low level.
The second block creating the MIMO-DDTA is the multiple output transconductance amplifier.The circuit can be seen as a current-mirror linear OTA.Note that a version of the MI-TA with one positive output was presented and verified experimentally in [18].Here, a second, inverting output has been added, thus increasing the circuit universality.Transistors M 1 , M 2 and M 11 , M 12 realize an input differential stage.The transistors M 11 and M 12 operate in a triode region and extend the linear range of the structure.The circuit can be seen as a BD version of the Krummenacher and Joehl transconductor [72], operating in weak inversion.Thanks to the BD approach, the linear range of the circuit is extended η = g m1,2 /g mb1,2 times, as compared with its gate-driven (GD) counterpart.In order to obtain optimum linearity, the following condition should be met [18]: where W and L are the MOS transistor channel width and length, respectively.Assuming unity current gain of all current mirrors, the circuit transconductance is given by: where n p is the subthreshold slope factor, U T is the thermal potential and I set is the biasing current.Note that the circuit transconductance is proportional to this current.In order to increase the DC voltage gain of the structure while not limiting its output voltage range, all current mirrors are based on self-cascode transistors.Consequently, the DC voltage gain from the input to the differential output is equal to: Thanks to the self-cascode technique, it is possible to compensate for the gain loss associated with the application of the BD technique.In practice, a voltage gain of around 40 dB can be obtained.

Versatile Mixed-Mode Filter
Figure 4 shows the proposed versatile mixed-mode universal filter employing four MIMO-DDTAs and two grounded capacitors.Using (1) and nodal analysis, the output voltages V o1 , V o2 , V o3 and the output currents I o1 , I o2 can be given by: Sensors 2024, 24, 32 6 of 18 ) ) ) =

𝑉 = •
From ( 10)-( 16), the variant filtering functions can be determined and are show Table 1.The proposed mixed-mode universal filter can offer LP, HP, BP, BS, and AP fi ing functions of VM, CM, TAM, and TIM in the same topology.Thanks to the mu inputs of the DDTA, the VM, CM, and TIM can offer non-inverting and inverting tra functions of LP, HP, BP, BS, and AP filters, and the VM and TAM can also offer differe transfer functions of LP, HP, BP, BS, and AP filters.Thus, the proposed mixed-mode can provide 61 transfer functions in a single topology.Thanks to the multiple outpu the DDTA, such as DDTA4, the proposed filter utilizes a minimum number of used DD while offering inverting and non-inverting transfer functions of LP, HP, BP, BS, an filters of CM.From ( 10)-( 16), the variant filtering functions can be determined and are shown in Table 1.The proposed mixed-mode universal filter can offer LP, HP, BP, BS, and AP filtering functions of VM, CM, TAM, and TIM in the same topology.Thanks to the multiple inputs of the DDTA, the VM, CM, and TIM can offer non-inverting and inverting transfer functions of LP, HP, BP, BS, and AP filters, and the VM and TAM can also offer differential transfer functions of LP, HP, BP, BS, and AP filters.Thus, the proposed mixed-mode filter can provide 61 transfer functions in a single topology.Thanks to the multiple outputs of the DDTA, such as DDTA 4 , the proposed filter utilizes a minimum number of used DDTAs while offering inverting and non-inverting transfer functions of LP, HP, BP, BS, and AP filters of CM.The input signals V 1 to V 6 are connected to the high-impedance terminals of the DDTA; thus, the voltage signals can be applied without any buffer circuit requirements.The output signals V o1 to V o3 are connected to the low-impedance terminals of the DDTA, which offers a cascadable output for the voltage-mode filter structures.The output signals I o1 and I o2 are connected to the high-impedance terminals of the DDTA, which offers a cascadable output for the current-mode filter structures.However, in the case of CM, the inputs I 1 to I 3 require additional circuits, such as multiple-output current followers or multiple-output current mirrors, to create three identical current signals from the single original current signal.It is clear that the proposed filter is exempt from inverting-type input signal and input matching conditions for realizing all filtering functions both in the case of voltage and current signals.

Operation Mode
Filtering Function Input Output Non-inverting Non-inverting Non-inverting Non-inverting HP Non-inverting

Operation Mode Filtering Function Input Output
The voltage gain g m3 /g m4 of the filtering functions can be obtained if the output V o1 is used.In the case of TAM, the inputs V 1 to V 6 are converted to output currents by g m3 ; in the case of TIM, the input currents I 1 to I 3 are converted to output voltages by g m4 .
The natural frequency (ω o ) and the quality factor (Q) can be given by: It should be noted that the parameter ω o can be controlled electronically by g m2 and g m3 and the parameter Q can be given by C 2 /C 1 .

Non-Ideality Analysis
Taking the tracking errors and the non-ideal transconductance of the MIMO-DDTA into account, the characteristics of the MIMO-DDTA can be rewritten as: where α j+ =1-ε j+v and ε j+v (|ε j+v |≪ 1) denote the voltage tracking error from non-inverting terminals (i.e., V y+1 , V y+2 ) to the w-terminal (i.e., V w ) of the j-th DDTA, α j− =1-ε j-v and ε j-v (|ε j-v |≪ 1) denote the voltage tracking error from inverting terminals (i.e., V y−1 , V y−2 ) to the w-terminal (i.e., V w ) of the j-th DDTA, and g mnj is the non-ideal transconductance gain of the j-th DDTA.The non-ideal transconductance g mnj of the j-th DDTA at a frequency near the cut-off frequency can be expressed by [59]: where µ j = 1⁄ω gmj , ω gmj denotes the first pole frequency of the j-th g m .Using (19), the denominator of ( 10)-( 16) can be modified as: Using ( 20), (21) becomes: The tracking errors and the non-ideal effect of the transconductance of the DDTA can be made negligible by satisfying the following condition: The modified natural frequency (ω on ) and the modified quality factor (Q n ) can be expressed as: To consider the parasitic impedances that affect the proposed mixed-mode filter, the parasitic capacitance C o and parasitic conductance g o (g o = 1/R o , R o is the output resistance) at the o-terminal of the DDTA are considered while the parasitic impedances at the y-and w-terminals are neglected.Considering Figure 4, the parasitic capacitances C o1 , C o4 and parasitic conductances g o1 , g o4 are parallel with C 1 and the parasitic capacitances C o2 , C o4 , and parasitic conductances g o2 , g o4 are parallel with C 2 .C o1 , C o2 , C o4 are, respectively, the parasitic capacitances at the o-terminal of DDTA 1 , DDTA 2 , DDTA 4 , and g o1 , g o2 , g o4 are, respectively, the parasitic conductances at the o-terminal of DDTA 1 , DDTA 2 , DDTA 4 .The parasitic capacitances can be neglected by appropriately choosing values such that C 1 ≫ C o4 + C o4 , C 2 ≫ C o2 + C o4 , g m2 ≫ g o1 + g o4 , and g m3 ≫ g o2 + g o4 .

Simulation Results
The circuit was designed and simulated using the Cadence Virtuoso System Design Platform using 0.18 µm CMOS technology from TSMC.The voltage supply was ±250 mV (0.5 V) and the bias voltage V B1 = −100 mV.The transistor aspect ratios are included in Table 2.It is worth noting that the only increase in chip area is due to the input capacitor C B = 0.5 pF, so the total input capacitance of the proposed MIMO-DDTA is 3 pF.This value is acceptable for integration.
Selected simulation results for the MIMO-DDTA are shown in Figures 5 and 6. Figure 5 shows the simulated results of the DC transfer characteristic of the MI-DDA V w versus V y+1 and of the MO-TA I o+ , I o− versus V w with various I set .The extended linearity of operation despite the low supply voltage is observed.
Figure 6 shows the impedances frequency characteristics of the MIMO-DDTA with I set = 4 nA: (a) Z y , Z o+, Z o− and (b) Z W .At low frequency, the impedance of Z y = 29.5 GΩ, Z o+ = Z o− = 2.1 GΩ and Z w = 876 Ω.All these values are suitable for the proposed filter application.For the filter application, for cutoff frequency 220 Hz and for Iset = 4 nA (gm = 27.7 nS) the Equation (17) has been used to calculate the value of capacitors C1 = C2 = 20 pF.The frequency responses of the gain and phase for the differential input VM, non-inverting CM, TAM and TIM filter with Iset1-4 = 4 nA are shown in Figure 7.The simulated cutoff frequency was 211 Hz, which is closed to the calculated one.This slight deviation in the cutoff frequency can be easily corrected by adjusting the setting current.The power consumption of the filter was 281 nW.For the filter application, for cutoff frequency 220 Hz and for Iset = 4 nA (gm = 27.7 nS) the Equation (17) has been used to calculate the value of capacitors C1 = C2 = 20 pF.The frequency responses of the gain and phase for the differential input VM, non-inverting CM, TAM and TIM filter with Iset1-4 = 4 nA are shown in Figure 7.The simulated cutoff frequency was 211 Hz, which is closed to the calculated one.This slight deviation in the cutoff frequency can be easily corrected by adjusting the setting current.The power consumption of the filter was 281 nW.For the filter application, for cutoff frequency 220 Hz and for I set = 4 nA (g m = 27.7 nS) the Equation (17) has been used to calculate the value of capacitors C 1 = C 2 = 20 pF.The frequency responses of the gain and phase for the differential input VM, non-inverting CM, TAM and TIM filter with I set1-4 = 4 nA are shown in Figure 7.The simulated cutoff frequency was 211 Hz, which is closed to the calculated one.This slight deviation in the cutoff frequency can be easily corrected by adjusting the setting current.The power consumption of the filter was 281 nW.The frequency responses of LP, HP, BP, BS, and AP gains and phases for VM are shown in Figure 8.The wide tunability of the filter is achieved by varying the setting current Iset1-4 = (0.5, 1, 2, 4) nA, where the cutoff frequency was (28,56,112,211) Hz, respectively.
(a) (  The frequency responses of LP, HP, BP, BS, and AP gains and phases for VM are shown in Figure 8.The wide tunability of the filter is achieved by varying the setting current I set1-4 = (0.5, 1, 2, 4) nA, where the cutoff frequency was (28,56,112,211)    Monte Carlo (MC) analysis was used to perform the statistical analysis to estimate the parametric yield and generate information about the performance characteristics of the differential input VM filter.The gains frequency responses of LP, HP, BP, BS, and AP with 200 runs MC are shown in Figure 9.The curves are overlapping or close to each other.Gain ( Monte Carlo (MC) analysis was used to perform the statistical analysis to estimate the parametric yield and generate information about the performance characteristics differential VM filter.The gains frequency responses of LP, HP, BP, BS, and AP with 200 runs MC are shown in Figure 9.The curves are overlapping or close to each other.Monte Carlo (MC) analysis was used to perform the statistical analysis to estimate the parametric yield and generate information about the performance characteristics of the differential input VM filter.The gains frequency responses of LP, HP, BP, BS, and AP with 200 runs MC are shown in Figure 9.The curves are overlapping or close to each other.The process, voltage, and temperature (PVT) corners were also used to confirm the robustness of the design.The process transistor corners were fast-fast, fast-slow, slow-fast, and slow-slow.The process MIM capacitor corners were fast-fast and slow-slow.The voltage supply corners were = ±10% (V DD -V SS ) and the temperature corners were −20 • C and 70 • C. The results for the gains frequency responses of LP, HP, BP, BS, and AP with PVT are shown in Figure 10.The curves are again overlapping or close to each other, which confirms the robustness of the filter design.In addition, thanks to the tunability of the filter, any deviation in the cutoff frequency can be easily adjusted by the setting current.
Sensors 2024, 24, x FOR PEER REVIEW 13 of 18 The process, voltage, and temperature (PVT) corners were also used to confirm the robustness of the design.The process transistor corners were fast-fast, fast-slow, slowfast, and slow-slow.The process MIM capacitor corners were fast-fast and slow-slow.The voltage supply corners were = ±10% (VDD-VSS) and the temperature corners were −20 °C and 70 °C.The results for the gains frequency responses of LP, HP, BP, BS, and AP with PVT are shown in Figure 10.The curves are again overlapping or close to each other, which confirms the robustness of the filter design.In addition, thanks to the tunability of the filter, any deviation in the cutoff frequency can be easily adjusted by the setting current.The transient response of the VM LPF with an applied input sinusoidal signal Vin-pp = 200 mV@10 Hz is shown in Figure 11a.The spectrum of the output signal is shown in Figure 11b, where the total harmonic distortion (THD) of 0.23% is indicated.The transient response of the VM LPF with an applied input sinusoidal signal V in-pp = 200 mV@10 Hz is shown in Figure 11a.The spectrum of the output signal is shown in Figure 11b, where the total harmonic distortion (THD) of 0.23% is indicated.The THD for the VM LPF with different peak-to-peak input signal values @ 10 Hz is shown in Figure 12.The 1% THD is achieved for Vin-pp = 300 mV.The output voltage noise for the VM LPF is shown in Figure 13.The root-mean-square (RMS) output noise integrated in the bandwidth of 1 to 211 Hz was 130 µV; thus, the dynamic range (DR) of the VM LPF filter is 58.23 dB @ 1% THD.The proposed versatile mixed-mode filter was compared with the previously reported filters in [29,32,45,51,[59][60][61] as shown in Table 3.Compared with these previous works, the proposed filter offers the most transfer functions of the five standard filtering functions and the lowest voltage supply.Compared with [29,32], the proposed filter offers electronic tuning capability of the natural frequency; compared with [59-61], the proposed filter uses fewer active devices.The filters in [32,45,51] apply the input signal via capacitor and/or resistor, the structure in [45] does not provide five standard filtering functions of The THD for the VM LPF with different peak-to-peak input signal values @ 10 Hz is shown in Figure 12.The 1% THD is achieved for V in-pp = 300 mV.The output voltage noise for the VM LPF is shown in Figure 13.The root-mean-square (RMS) output noise integrated in the bandwidth of 1 to 211 Hz was 130 µV; thus, the dynamic range (DR) of the VM LPF filter is 58.23 dB @ 1% THD.The THD for the VM LPF with different peak-to-peak signal values @ 10 Hz is shown in Figure 12.The 1% THD is for Vin-pp = 300 mV.The output voltage noise for the shown in Figure 13.The root-mean-square (RMS) output noise integrated in the bandwidth of 1 to 211 Hz was 130 µV; thus, the dynamic range (DR) of the VM LPF filter is 58.23 dB @ 1% THD.The proposed versatile mixed-mode filter was compared with the previously reported filters in [29,32,45,51,[59][60][61] as shown in Table 3.Compared with these previous works, the proposed filter offers the most transfer functions of the five standard filtering functions and the lowest voltage supply.Compared with [29,32], the proposed filter offers electronic tuning capability of the natural frequency; compared with [59-61], the proposed filter uses fewer active devices.The filters in [32,45,51] apply the input signal via capacitor and/or resistor, the structure in [45] does not provide five standard filtering functions of The THD for the VM LPF with different peak-to-peak input signal values @ 10 Hz is shown in Figure 12.The 1% THD is achieved for Vin-pp = 300 mV.The output voltage noise for the VM LPF is shown in Figure 13.The root-mean-square (RMS) output noise integrated in the bandwidth of 1 to 211 Hz was 130 µV; thus, the dynamic range (DR) of the VM LPF filter is 58.23 dB @ 1% THD.The proposed versatile mixed-mode filter was compared with the previously reported filters in [29,32,45,51,[59][60][61] as shown in Table 3.Compared with these previous works, the proposed filter offers the most transfer functions of the five standard filtering functions and the lowest voltage supply.Compared with [29,32], the proposed filter offers electronic tuning capability of the natural frequency; compared with [59-61], the proposed filter uses fewer active devices.The filters in [32,45,51] apply the input signal via capacitor and/or resistor, the structure in [45] does not provide five standard filtering functions of The proposed versatile mixed-mode filter was compared with the previously reported filters in [29,32,45,51,[59][60][61] as shown in Table 3.Compared with these previous works, the proposed filter offers the most transfer functions of the five standard filtering functions and the lowest voltage supply.Compared with [29,32], the proposed filter offers electronic tuning capability of the natural frequency; compared with [59-61], the proposed filter uses fewer active devices.The filters in [32,45,51] apply the input signal via capacitor and/or resistor, the structure in [45] does not provide five standard filtering functions of VM, CM, TAM, and TIM, and the filters in [45,51] require input matching conditions for realizing some filtering functions.Note: MIMO = multiple-input multiple-output, MISO = multiple-input single-output.

Conclusions
This paper presents a 0.5 V, 281 nW versatile mixed-mode universal filter using MIMO-DDTAs.The MIMO-DDTA is used to realize a versatile mixed-mode universal filter that offers many transfer functions in the same topology.To realize variant transfer functions such as LPF, HPF, BPF, BSF, and APF of VM, CM, TAM, and TIM, inverted input signal requirement is absent.The natural frequency can be electronically controlled.The VM filter offers high-input impedance and low-output impedance, and the CM filter offers high-output impedance.For the VM LP filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion.The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm CMOS technology from TSMC.The simulation results, including Monte-Carlo and PVT corners, confirm the functionality of the design.
The input signals V1 to V6 are connected to the high-impedance termin the DDTA; thus, the voltage signals can be applied without any buffer circuit req ments.The output signals Vo1 to Vo3 are connected to the low-impedance terminals o DDTA, which offers a cascadable output for the voltage-mode filter structures.The ou signals Io1 and Io2 are connected to the high-impedance terminals of the DDTA, whic fers a cascadable output for the current-mode filter structures.However, in the ca CM, the inputs I1 to I3 require additional circuits, such as multiple-output current fo ers or multiple-output current mirrors, to create three identical current signals from single original current signal.It is clear that the proposed filter is exempt from inver type input signal and input matching conditions for realizing all filtering functions in the case of voltage and current signals.

Figure 5 .Figure 5 .
Figure 5.The DC transfer characteristics of the MIMO-DDTA: (a) V w versus V y+1 and (b) I o+ , I o− (dashed line) versus V w with various I set .

Figure 6 .
Figure 6.The impedances frequency characteristics of the MIMO-DDTA: (a) Z y , Z o+, Z o− and (b) Z W .

Figure 7 .
Figure 7.The frequency characteristics of gains for the VM (a), CM (b), TAM (c), and TIM (d).

Figure 7 .
Figure 7.The frequency characteristics of gains for the VM (a), CM (b), TAM (c), and TIM (d).

Figure 11 .
Figure 11.The transient response of the VM LPF (a) and the spectrum of the output signal (b).

Figure 12 .
Figure 12.The THD of the VM LPF with different peak-to-peak input voltages @ 10 Hz.

Figure 13 .
Figure 13.The output voltage noise of the VM LPF.

Figure 11 .
Figure 11.The transient response of the VM LPF (a) and the spectrum of the output signal (b).

Figure 11 .
Figure 11.The transient response of the VM LPF (a) and the spectrum of the output signal (b).

Figure 12 .
Figure 12.The THD of the VM LPF with different peak-to-peak input voltages @ 10 Hz.

Figure 13 .
Figure 13.The output voltage noise of the VM LPF.

Figure 12 .Figure 11 .
Figure 12.The THD of the VM LPF with different peak-to-peak input voltages @ 10 Hz.

Figure 12 .
Figure 12.The THD of the VM LPF with different peak-to-peak input voltages @ 10 Hz.

Figure 13 .
Figure 13.The output voltage noise of the VM LPF.

Figure 13 .
Figure 13.The output voltage noise of the VM LPF.

Table 1 .
Obtaining variant filtering functions of the proposed versatile mixed-mode filter.

Table 2 .
Transistor aspect ratios of the MIMO-DDTA.Vy+1 and of the MO-TA Io+, Io− versus Vw with various Iset.The extended linearity of operation despite the low supply voltage is observed.

Table 3 .
Comparison of the proposed filter's properties with those of mixed-mode universal filters.