A Detailed dSPACE-Based Implementation of Modulated Model Predictive Control for AC Microgrids

Microgrids represent a promising energy technology, because of the inclusion in them of clean and smart energy technologies. They also represent research challenges, including controllability, stability, and implementation. This article presents a dSPACE-control-platform-based implementation of a fixed-switching-frequency modulated model predictive control (M2PC) strategy, as an inner controller of a two-level, three-phase voltage source inverter (VSI) working in an islanded AC microgrid. The developed controller is hierarchical, as it includes a primary controller to share the load equally with the other power converter with its own local modulated predictive-based controller. All details of the implementation are given for establishing the dSPACE-based implementation of the control on a dSPACE ds1103 control platform, using MATLAB/Simulink for the controller design, I/O implementation and configuration with the embedded dSPACE’s real-time interface in Simulink, and then using the ControlDesk software for monitoring and testing of the real plant. The latter consists of the VSI operating with LCL filters, and sharing an RL load with a paralleled VSI with exactly the same controller. Finally, the obtained experimental waveforms are shown, with our respective conclusions representing this work, which is a very valuable tool for helping microgrid researchers implement dSPACE-based real-time simulations.


Introduction
Around the world, there has been a marked increase in the spread of distributed energy resources (DERs) in electrical distribution grids. One of the main drivers of this increase has been the inclusion of more renewable energy that may be available, scattered across several territories, allowing these DERs to be close to the demand centres (loads). This has brought benefits, such as the improved reliability of electricity provision, reduced costs, increased safety against physical and cyber hazards, assimilation of renewable energy, and a decrease in the carbon footprint [1]. According to the International Energy Agency, as supporting technologies improve, develop, and become more cost-effective, it is expected that DERs will continue to experience the increasing pace of incorporation [2].
In addition to the expansion of DERs, with renewable energy, microgrid conceptualisation has had a very positive impact on the effective control of DERs in electrical distribution networks. These novel types of power systems allow for improved reliability laboratory using these dSPACE control platforms, real systems, experimental setup of power converters, power filters, and loads. Amp. Implementing MPC-based control is well-documented, addressing the theoretical aspects. For example, in the work developed by [21], the authors implemented an FS-MPC strategy for a three-level NPC inverter fixing the operational switching frequency. Experimental implementation of the control was carried out, using a dSPACE ds1103 control platform with a Spartan 3 FPGA connected via the I/O bus expansion that is available in the dSPACE control platform. Although the authors provided extensive and valuable details of the implementation, a detailed step-by-step implementation in the Simulink environment was not included in the manuscript. In the work of [29], an FS-MPC was implemented, to control two voltage source converters in an experimental implementation of an isolated AC microgrid. To validate the results, the author used a dSPACE MicroLabBox ds1202 control platform, without giving detailed step-by-step implementation within the control platform. When working with real-time microgrid implementations with two or more power converters, dSPACE control platforms may have limitations. Nevertheless, in the work developed by [30], a single dSPACE ds1103 control platform was used, to control two power converters: here, proportional-integral (PI) control was used as an inner controller, and to generate the three-phase PWM pulses for each converter; the authors explained the use of the Simulink blocks, which are available in the dedicated library of the software, but did not provide further details of the Simulink model to implement the controller in the dSPACE platform. In [31], the authors implemented a modified modulated MPC (M 3 PC) strategy for a grid-connected converter, using a dSPACE ds1104 platform; however, while the authors provided the experimental parameters, they did not explain further the implementation in the dSPACE control platform.

REAL-TIME
In the specialised market of HIL control platforms, other control platforms are available, in addition to dSPACE control platforms. Their use is well-documented; however, as with dSPACE platforms, no further details of the implementation are given. For example, in a renewable-energy-based AC microgrid, the authors of [32] established an MPC strategy without any proportional-integral-differential (PID) regulator: to do so, the authors used MATLAB/Simulink and the Opal OP5700 real-time laboratory test platform (RT-LAB).
Step-by-step details for the implementation were not provided. Another implementation of an M 2 PC strategy applied to LCL-filtered grid-tied inverters, using a different HIL control platform, was developed in [33]. The authors implemented hardware-in-the-loop validation, emulating the power converter, the LCL filter, and the grid using the Typhoon HIL 402 hardware-in-the-loop. Again, several valuable theoretical details were provided, but no detailed implementation using the HIL platform was included.
Beyond the application of HIL platforms to predictive control applied to microgrids, there are publications related to their application to the control of power systems and distributed generation, which provide details on the implementation of the controller and the system. For example, in the work developed by the authors in [25], the real-time simulation of a complete isolated grid was included in the simulation software environment RT-LAB of the Opal-RT platform. The construction process in MATLAB/Simulink was described, though without graphic evidence, and more details would have been useful for the reader. The implementation of a nonlinear controller using Lyapunov function for a DFIG on the dSPACE 1104 control platform was carried out by the authors in [27], in which an explanation of the dSPACE 1104 platform technical characteristics was provided, along with the inclusion of the complete control system as a Simulink model for the dSPACE 1104 real-time interface platform.
Due to the lack of well-documented and detailed step-by-step microgrid HIL implementation of M 2 PC as inner-controller of a two-level, three-phase voltage source inverter (VSI), sharing a RL load with power sharing algorithms (droop control with virtual impedance), in a dSPACE control platform, this article looks to become a valuable and useful tool for microgrid researchers interested in implementation of these kinds of controllers. The focus, as mentioned, is on the real-time implementation of microgrids using dSPACE-based experimental setups for proper and high-impact scientific results.
In this way, this article presents a dSPACE-control-platform-based implementation of an M 2 PC strategy as an inner controller of a two-level, three-phase VSI operating in an islanded AC microgrid. The developed controller works as a hierarchical controller, as it includes a primary controller for equal sharing of the load power with the other power converter, with its own local modulated-predictive-based controller. All the details of the implementation are provided, for establishing the dSPACE-based validation of the control in a dSPACE ds1103 control platform, using MATLAB/Simulink for the controller design, I/O implementation, and configuration with the embedded dSPACE's real-time interface (RTI) in Simulink, then using the ControlDesk software for monitoring and testing of the real plant. The VSI operates with LCL filters, and shares an RL load with another VSI with exactly the same controller. Here, it is important to mention that this work provides details of the implementation of previous published work by the same authors in [34], where comparisons with other works of simulated and experimental results were widely addressed.
The academic contribution of this paper is to provide a detailed description of the implementation of the M 2 PC strategy with the power-sharing outer loop for the dSPACE control platform. As noted, most of the previously published works refer to the theoretical aspects, but provide only a brief explanation of the implementation of the control strategies in the different available HIL platforms: dSPACE; Opal-RT; and Typhoon HIL, among others. Additionally, the contribution to the researchers of predictive control applications to power converters and microgrids, where even the inclusion of C code for the predictive controller, and the inclusion of dead-times in the FPGA, are valuable for helping building real-time implementations for dSPACE platforms.
Finally, this work, in Section 2, explains in detail all the components of the real plant, the hardware setup, where the two-level, three-phase VSI used is explained, with the LCL filters and the RL load, explaining the semiconductors used in the power converter, the development of the printed circuit board (PCB) for the LCL filter, and the necessary model of the system to develop the M 2 PC scheme. Additionally, here, the dSPACE ds1103 control platform used is explained, with an emphasis on its features, which are used to implement the controller. Then, in Section 3, the whole process of implementing the modulated model predictive controller in the real-time interface (RTI) of the dSPACE ds1103 control platform is explained, considering the controller programming, the implementation of dead-times for safe commutation of the VSI, the inclusion of power sharing controllers of the RL load, and the testing and monitoring process of simulation in real time, to obtain proper results. The results of the experimental implementation are provided in Section 4, and are discussed in Section 5. Finally, the paper concludes with Section 6, which includes a summary Table of State-of-the-Art developments on hardware-in-theloop and real-time simulation platforms applied to control power converters, microgrids, and distributed generation ( Table 3). In addition, the code of the M 2 PC-based controller, and of the implementation of dead-times in the FPGA board, are provided in the Appendix to this paper (Appendix A).

Experimental System Description
In Figure 2, the general concept of the dSPACE-based setup applied to an isolated AC microgrid is depicted: it can be seen that the microgrid is made up of two power converters, which are interfacing DGs (controllable voltage sources). In this case, each power converter had a decentralised controller that worked independently. Figure 2 shows that, specifically for this work, the inner controller for each VSI was controlled by the dSPACE ds1103 control platform. The advantages of working with the dSPACE control platform lie in its ability to work in a MATLAB/Simulink environment. All the controller programming was built in Simulink, using the dSPACE's Simulink libraries to interface the software side with the hardware side, as can be seen in Figure 2.

Description of the Power Converter
The converter implemented was a DC-AC power converter, consisting of three legs, each with two power switches, MOSFETs. In Figure 3, the two-level, three-phase VSI is shown.  Figure 3. Two-level three-phase VSI connected through an output LCL filter that is linked to an AC microgrid with a line impedance Z o analysed in [35]. source voltage, V DS , value of 600V [36]. In Table 1  The inclusion of the LCL filters is based on the need to filter the power from the 204 voltage source to the rest of the AC microgrid. Therefore, the components of the LCL filter 205 for each phase are determined as L f , C f , and L g , which are the filter inductance, the filter 206 capacitance, and the grid inductance, respectively.

207
The developed LCL filter that exerts the coupling of the VSI with the rest of the is-208 landed AC microgrid, is shown in Figure 5.

209
The size of the LCL filter was taken from a filter developed previously in the Labora-210 tory of Renewable Energy and Electrical Conditioning (LERAE) but with a greater capaci-211 tance to improve the control of the capacitor voltage ( Figure 5).

212
The LCL filter was developed using the PCB shown in Figure 6.

213
The parameters considered for the LCL filter are: 214 Figure 3. Two-level, three-phase VSI connected through an output LCL filter linked to an AC microgrid with a line impedance Z o , as analysed in [34].
The implemented VSI was built and designed as a PCB, as can be seen in Figure 4. VSIs are commonly found operating in AC microgrids, and, in this case, with LCL filters at the output terminals ( Figure 3), to decrease switching harmonics, allowing for operation in grid-forming mode and control of the capacitor voltage of the LCL filters [29].

Switches Characteristics
The switches included in the implemented two-level, three-phase VSI were metaloxide-semiconductor field-effect transistors (MOSFETs) of the model STF22N60M6, with a drain-source voltage, V DS , value 600 V [35]. In Table 1, the electrical ratings of the MOSFETs are shown: Table 1. MOSFET STF22N60M6 electrical ratings [35].

LCL Filter
The inclusion of the LCL filter was based on the need to filter the power from the voltage source to the rest of the AC microgrid. Therefore, the components of the LCL filter for each phase were determined as L f , C f , and L g , which were the filter inductance, the filter capacitance, and the grid inductance, respectively. The developed LCL filter, which exerted the coupling of the VSI with the rest of the islanded AC microgrid, is shown in Figure 5. The size of the LCL filter was taken from a filter developed previously in the Laboratory of Renewable Energy and Electrical Conditioning (LERAE), but with a greater capacitance to improve the control of the capacitor voltage ( Figure 5).
The LCL filter was developed using a PCB, as shown in Figure 6. The parameters considered for the LCL filter were: In order to model the behaviour of the LCL filter, the model was developed according to the details provided in Section 2 of [34]: system description. The discrete model of the LCL filter is shown as follows: with (k) as the present time, (k + 1) as the next sampling time, and x as the state vector Taking into account that the sampling period was T s , the discrete matrices A d , B d , and E d were explained as [33,34,36]: and and with A, B, and E as the continuous matrices of the state space model in continuous time of the LCL filter, developed in previous work published in [34].

RL Load
The setup developed to establish the AC microgrid included a shared three-phase RL load, depicted in Figure 7, that constituted the rest of the AC microgrid.
The three-phase RL load had the following experimental parameters: • R l = 10 Ω; • L l = 10 mH.

dSPACE ds1103 Control Platform
The dSPACE ds1103 control platform is particularly configured to develop highspeed multivariate digital controllers and real-time simulations in several disciplines. The dSPACE ds1103 operates in complete real time for advanced applications, and considers the inclusion of a slave DSP subsystem based on the TMS320F240 DSP Texas Instruments microcontroller [37].
The specific interface connector panels of the dSPACE ds1103 platform provide easy access to all input and output signals of the dSPACE ds1103 control platform [37]: • The CP1103 connector panel provides useful connections between the ds1103 control platform and other equipment that will be connected to it; • In addition to the connector panel, the dSPACE ds1103 considers additional connectors and a panel with an array of LEDs showing the states of the digital signals.
The dSPACE ds1103 includes two different types of analogue-to-digital converter (ADC) for the analogue input channels [37]: • Four ADCs with four multiplexed input signals each, from ADCH1 to ADCH16; • Four parallel (non-multiplexed) ADCs with one input signal each, from ADCH17 to ADCH20.
In this implementation, the ADCs were used to connect multiple current clamps and differential voltage probes, to obtain readings with which to establish the control of the VSI. The ADCs that were used corresponded to those that were multiplexed.
Additionally, dSPACE ds1103, with its slave DSP, provides I/O with pins with several signals: among them, three-phase space vector PWM signals, which were used in this implementation as the modulator of the modulated model predictive controller [37].

Experimental Complete Setup
All the components described above were put together in the laboratory, to form the experimental setup shown in Figure 8. This experimental setup was used to obtain the experimental results that verified the implementation of the M 2 PC applied to the islanded AC microgrid. In addition to all the components already described, the dSPACE ds1103 control platform can be seen in Figure 8, being the device where the controller was implemented. In addition, the FPGA was included in the experimental setup. The FPGA will be explained later in this paper.

The Modulated Model Predictive Controller
The theoretical concept of the fixed-switching-frequency M 2 PC is depicted in the block diagram of Figure 9. This control is exerted to every VSI operating in the islanded AC microgrid, and enables every VSI to be controlled independently of any other external device or communication link.  Figure 9. Block diagram of the modulated model predictive control scheme for a two-level threephase LCL-filtered VSI in islanded AC microgrid explained in [35].
The details of this M 2 PC scheme shown in Figure 9 are widely developed and ex-272 plained in the previous published work by the same authors in [35].  The establishment of the M 2 PC algorithm is realised in the Simulink environment of 276 the dSPACE ds1103 platform that implements the model of the LCL filter, described in de-277 tail in [35]. Then, the cost function (CF) is implemented in this algorithm to be minimised 278 using the predictions obtained from the mathematical model of the system. Once the latter 279 is fulfilled, the sector with its adjacent vectors to obtain the duty cycles that are introduced 280 in the space vector modulation (SVM). Then, the multiobjective CF is as follows [35]: 281 Figure 9. Block diagram of the modulated model predictive control scheme for a two-level, threephase LCL-filtered VSI in islanded AC microgrid, explained in [34].
The details of this M 2 PC scheme shown in Figure 9 were widely developed and explained in the previous published work by the same authors in [34].

Modulated Model Predictive Control
The establishment of the M 2 PC algorithm is realised in the Simulink environment of the dSPACE ds1103 platform that implements the model of the LCL filter, described in detail in [34]. Then, the cost function (CF) is implemented in this algorithm, to be minimised using the predictions obtained from the mathematical model of the system. When the latter is fulfilled, the sector with its adjacent vectors obtains the duty cycles that are introduced in the space vector modulation (SVM). Then, the multi-objective CF is as follows [34]:  [38]; therefore, the dynamics of the inductor current L g are taken into account, to ensure a precise power supply from the distributed generator.
The CF from Equation (5) is included in the controller, which will be explained later in this manuscript, and is shown in the Appendix A.1.
To fix the switching frequency to be obtained as the output of the VSI, a modulator stage is included, using an SVM [34].
For each sector of the SVM, S j , of the valid switching states of the two-level, threephase VSI, it is mandatory to obtain the prediction of the capacitor voltage vectors for the next sampling time, using the discrete-time model of the LCL filter. Then, these predictions are independently evaluated in the CF of Equation (5) [34].
Subsequently, the following set of equations has to be solved, to obtain the duty cycles for each sector of the SVM [39]: where d 0 is the duty cycle of a zero vector that is evaluated only once.
To find the value of K, the set of equations of (6) has to be worked out, providing, as a result, the duty cycles for each vector: From the equations in (7), the new cost function, which is evaluated at every sampling time, T s , is defined as: A new CF is defined in Equation (8), in which the obtained vectors which minimise it are applied to the VSI at the next sampling period. When the duty cycles have been obtained, and the optimal vectors to be applied have been chosen, the switching pattern is utilised, for the two active vectors and the two zero vectors to be used [34,39].
This implementation is configured in the dSPACE ds1103 control platform, using the concept shown in Figure 2. To create the SVM with the dSPACE ds1103, its slave DSP, that is I/O available, is used.
Embedded in the MATLAB/Simulink environment, the dSPACE's Simulink library contains a block called 'DS1103SL_DSP_PWMSV', which generates the three-phase space vector PWM with original and inverted outputs and, if needed, a variable deadband ( Figure 10) [28]. The Simulink block DS1103SL_DSP_PWMSV, shown in Figure 10, generates space vector PWM signals that are used to implement the SVM in the controller. Thus, the parameters from the M 2 PC scheme are t 1 and t 2 , as follows [28]: with t p as the value of the period. These parameters from the modulated model predictive controller embedded in the 'S-Function Builder' block are sent to the DS1103SL_DSP_PWMSV block shown in Figure 10.
The space vector determines the sector and the values t 1 and t 2 of the corresponding right (t 1 ) and left (t 2 ) vectors. The expression t 1 /t p denotes the duty cycle of the right vector in the corresponding sector, while t 2 /t p denotes the duty cycle of the left vector. The sector, which is in the range from 1 to 6, is defined by reflecting the space vector onto the plane determined by the basic space vectors. The values t 1 and t 2 are defined by the projection of the space vector onto the two adjacent basic space vectors [37].
To make the fixed switching frequency work at the desired frequency, in Figure 11, it can be seen that there is a multiplier for the controller outputs, fixing the switching frequency at 20 kHz (0.00005) (see Table 2). Figure 11. View of the output of the controller, with t 1 and t 2 entering into the DS1103SL_DSP_PWMSV block in the dSPACE's Simulink environment.
In Figure 11, it can be seen that the weighting factors λ i o and λ v f -referred to as k 1 and k 2 , respectively, in the Simulink model-included in the CF of Equation (5), are introduced to the controller in the 'S-Function Builder' block.
The modulated model predictive controller is embedded into the 'S-Function Builder' block, which can be seen in Figure 11. Inside this block, the S-function can be built to operate as the controller for the Simulink model for the fixed-switching-frequency M 2 PC.
The complete code of the fixed-switching-frequency modulated model predictive controller is included in Appendix A.1.

Droop Control and Virtual Impedance
To establish the power sharing among the two VSIs of the RL load, the opposite droop equations are considered, as detailed in [34]: where E re f and ω re f are the reference voltage amplitude and frequency used to obtain v re f , which is introduced to the virtual impedance loop in the following equation, as a virtual resistive loop, R v [34]: and with E nom and ω nom as the nominal voltage amplitude and frequency, respectively. To calculate P cal and Q cal , the following equations are used [34]: The equations referring to the droop control and the implementation of the virtual impedance loop, (10)- (12), are implemented in the Simulink model for the dSPACE ds1103 platform, as shown in Figures 12 and 13.   The computing of the instantaneous active and reactive power shown in Equations (13) and (14) are implemented in the Simulink model for the dSPACE ds1103 platform.

Analogue-to-Digital Converters
To get VSI readings on the Simulink dSPACE ds1103 platform, the available ADCs were used. Current clamps and differential voltage probes were connected to the dSPACE ds1103 platform through these ADCs. As explained previously, the dSPACE platform had multiplexed and non-multiplexed ADCs. In Figure 14, on the left side, the ADC Simulink blocks can be seen. The name of the block corresponds to 'DS1103MUX_ADC_CONX' where 'CONX' refers to the number of the analogue-to-digital converter. In addition, only multiplexed ADCs were used to obtain currents and voltages readings. Taking into account Figure 14, the ADCs used to obtain these readings were as follows: • ADCH1 and ADCH2, for i f a and i f b , respectively; • ADCH3 and ADCH4, for i oa and i ob , respectively; • ADCH13 and ADCH14, for v f ab and v f bc , respectively; • ADCH15 for v dc .
Looking closely at Figure 14, it can be observed that only two phases of the filter current, i f abc , of the output current, i oabc , and of the capacitor voltage, v f abc , were measured. Thus, the reading of the missing phase was obtained by subtracting the measurements of the other two phases.

Interruption from the Slave DSP
In the slave DSP of the dSPACE ds1103, an interruption is available almost over the entire PWM period. The PWM interrupt (from slave to master) is triggered by the falling edge of the active-low synchronisation interrupt signal [37].
To make this slave DSP's interruption available to the real-time simulation in the dSPACE ds1103's Simulink, the Simulink block 'DS1103SLAVE_PWMINT' has to be added as can be seen in Figure 15. Alternatively, the interruption can come from an external source, and be available for real-time simulation.
In this work, the interruption came from the slave DSP of the dSPACE ds1103 platform, as shown in the general scheme from Figure 21.

Frequency Reference
Considering that this microgrid is decoupled from the main grid, it is not necessary to use a phase-locked loop (PLL) strategy: that is, the operating frequency can be arbitrarily determined.
For the implementation of the system, 50 Hz is set as the operating frequency; therefore, the argument of currents and voltages-that is, the operating angle θ re f -appears when integrating the angular speed according to what is shown in Equation (15). To generate θ re f in the dSPACE ds1103, Equation (16) has to be considered. In Equation (16), θ re f (k) tends to infinity; therefore θ re f (k) has to be restarted (taking 0 as the value) each time it reaches the value of 2π. This is shown in Figure 16.

FPGA
To complement the dSPACE ds1003 control platform, and connected via its I/O bus, an Atlys FPGA is included. This corresponds to a control board based on an Xilinx Spartan-6 FPGA ( Figure 21).
The internal clock of the Atlys FPGA corresponds to the 100 MHz CMOS oscillator [40]. Additionally, the Atlys FPGA includes a Pmod port expansion, which allows the connection of the Digilent Vmod module interface board to interface additional peripheral modules to the Atlys FPGA [40,41].
The VmodMIB shown in Figure 17 includes a VHDCI peripheral board connector and four HDMI and five 12-pin Pmod connectors [41]. As shown in Figure 21, several digital connections-the signals from the space vector PWM from the slave DSP of the dSPACE ds1103 control platform-are conducted through these expansion modules in the Atlys FPGA, to be processed, and the dead-times added for safe commutation of the VSI. In this FPGA platform, the safe commutation of the VSI was implemented, to protect the two-level, three-phase VSI at the instant of switching. Thus, dead-times were programmed into the FPGA system. The latter was due to the fact that the codification of S 1 , S 2 , S 3 , S 4 , S 5 , and S 6 into the new signals S a , S b , and S c , did not guarantee, by itself, avoiding short-circuit in any of the power converter legs.
The concept of 'dead-time' consists in opening both switches of one power converter's leg at the moment that a change in the value of the signal S a , S b , or S c occurs. This opening of the switches is generated during a time instant 'T m '. The application of the dead-time to the commutation of the switches S 1 and S 4 can be seen in Figure 18.  Then, the dead-time, T m , added to the safe commutation of the VSI corresponds to 417 1µs (microseconds).

418
In the Appendix A.2, a code subsection is shown for the addition of dead-time in the 419 Atlys FPGA, in this case, for the first leg of the two-level three-phase VSI. Once the Simulink model is developed with everything which is required to estab-422 lish the fixed-switching-frequency M 2 PC, the Simulink model has to be compiled to build 423 a '.sdf' file which is required to implement the model into the dSPACE's ControlDesk 424 control software.

425
In this ControlDesk it is possible to adjust the gains for the ADCs coming from the 426 current clamps and the differential voltage probes to make proper readings and control of 427 the two-level three-phase VSI. Then, the dead-time, T m , added to the safe commutation of the VSI corresponds to 1 µs (microseconds).
In Appendix A.2, a code subsection is shown for the addition of dead-time in the Atlys FPGA-in this case, for the first leg of the two-level, three-phase VSI.

dSPACE Control Desk
Once the Simulink model is developed, with everything required to establish the fixed-switching-frequency M 2 PC, the Simulink model has to be compiled, to build a '.sdf' file, in order to implement the model into the dSPACE's ControlDesk control software.
In this ControlDesk software (Figure 19), it is possible to adjust the gains for the ADCs coming from the current clamps and the differential voltage probes, to make proper readings and to control the two-level, three-phase VSI. From the ControlDesk software, the real-time simulation can be controlled, to go online, start measuring, and have graphical and numerical control of the relevant variables for the developed real-time simulation.

Complete Model
In this subsection, the dSPACE's Simulink model, which is built into the '.sdf' file with all its components, is shown in Figure 20.
In the model shown in Figure 20, the interruption comes from the slave DSP that is contained in the dSPACE ds1130 control platform. Furthermore, the slave DSP generates the SVM using the Simulink block DS1103SL_DSP_PWMSV, as seen in Figure 20. These signals are sent to the Atlys FPGA, to add the dead-times for the final commutation signals to be sent through the optimal module, using optical fibre for each MOSFET switch of the two-level, three-phase VSI (Figure 21).
Filter currents, i f abc , and output currents, i oabc , are measured, using Fluke i30 and Fluke i310 current clamps. These current clamps are connected to the ADC panel of the dSPACE ds1103 (see Figure 21), and are interfaced into the Simulink model with the MUX ADC blocks, which can be seen in Figure 20. All gains are adjusted according to the resolution of every current clamp under use.
Similarly, the voltages of the system (v f abc , and v dc ) are measured using the differential voltage probes, Elditest GE8115 and PICO TA043. The voltage measurements are introduced through the available ADCs in the control panel of the dSPACE ds11003. As in the current case, these ADCs are interfaced with the Simulink model by the 'MUX ADC blocks', which can be seen in Figure 20. All gains are adjusted according to the resolution of every differential probe in use (see Figure 20).
However, every ADC entering through the correspondent 'MUX ADC' block into the Simulink model, requires a gain of an additional factor x10, that must be multiplied by every current clamp or differential voltage probe that obtains the current and voltage measurements, respectively.
As mentioned previously, for the measurements of the filter and output current, plus the capacitor voltages, only two phases are measured, and the c phase is calculated by subtracting the other two; the latter considering a balanced system. This can be clearly seen in Figures 20 and 21. However, every ADC entering through the correspondent 'MUX ADC' block into 452 the Simulink model, requires a gain of an additional factor x10 that must be multiplied 453 by every current clamp or differential voltage probe that obtains the current and voltage 454 measurements, respectively.

455
As mentioned previously, for the measurements of the filter and output current, plus 456 the capacitor voltages, only two phases are measured, and the c phase is calculated by 457 subtracting the other two; the latter considering a balanced system. This can be clearly 458 seen in Figures 20 and 21.  460 In this section, the experimental results are included. The complete theoretical expla-461 nation of this work is developed extensively in a previous published work by the same 462 authors in [35]. 463 Here, only the experimental results are included, as they are the result of the real-464 time simulation or hardware-in-the-loop, but using the real system of the LCL-filtered 465 two-level three-phase voltage source inverter. The complete setup was previously shown 466 in Figure 8. Its parameters and those used to implement the control are shown in Table 2. 467 Figure 21. General concept of the establishment of the two-level, three-phase VSI setup controlled by a dSPACE ds1103 control platform plus an Atlys FPGA.

Experimental Waveforms
In this section, the experimental results are included. The complete theoretical explanation of this work is developed extensively in a previous published work by the same authors, in [34].
Here, only the experimental results are included, as they were the result of the realtime simulation or hardware-in-the-loop, but using the real system of the LCL-filtered two-level, three-phase voltage source inverter. The complete setup was previously shown in Figure 8. Its parameters, and those used to implement the control, are shown in Table 2. Table 2. Experimental parameters used in [34].

Parameter
Value The waveforms obtained are shown in the oscilloscope-drawn view of Figure 22. These output currents were obtained after the LCL filter, and their shape looks perfectly sinusoidal, showing that proper results were obtained. Additionally, in Figure 22, the capacitor voltage of the phase a, v f a is shown, with similar features. Figure 22. Experimental waveforms appeared in [34]: oscilloscope vista of the output currents, i oa , i ob , i oc , and capacitor voltage, v f a of the two-level, three-phase VSI in the AC microgrid.
In Figure 23, the waveforms for the capacitor voltage phase a and the output currents can be seen. Additionally, their respective THD analyses are included.

Experimental Waveforms
The experimental waveforms obtained using the real-time interface of the dSPACE ds1103 control platform are shown in Figures 22 and 23. Although the experimental waveforms obtained were analysed in the previous published work in [34], some necessary discussion is included here.
Referring to the waveforms for the capacitor voltage of the phase a, v f a : • The capacitor voltage for phase a, v f a , in Figures 22 and 23a, was controlled as expected, but the presence of resonant noise can be seen. Resonance is known to be an inherent problem with LCL filters. As mentioned earlier in this article, the use of LCL filters was based on the availability of equipment in the laboratory; therefore, from these designs, the size of the capacitor had to be increased, from 1 µF to 11 µF, because, experimentally, an excess of resonance appeared; • This resonance was produced by the parasitic components in the filters and in the semiconductor components (MOSFETs) of the experimental setup. Additionally, the fact that, as a contributor to this resonance in the capacitor voltage waveform, the delay provided by the drivers and the elements of the trigger pulse appeared; • As shown in Figure 23b, the THD value was ≈ 6.6%, and was within the established standard deviation limits of 519-2014; • The THD of the capacitor voltage, v f a , the harmonics spectrum, was not spread across the frequencies, as mentioned earlier as the main drawback of not fixing the frequency.
Referring to the waveforms for the output currents, i oabc : • The waveforms of the output currents, i oabc , are shown in Figure 23c; • Spectra analysis is shown in Figure 23d, in which it can be seen that the low-frequency harmonics in the currents (500 Hz) may have been occasioned by the unbalance among the LCL filters and the RL load; • The harmonics content was in the proximity of the limits of the 51st harmonics, with the currents having less distortion (≈2.8%), with attenuated high frequencies, by the filter inductances and the microgrid system.
Finally, the obtained experimental waveforms clearly show that application of the fixed-switching-frequency M 2 PC scheme controlled the LCL-filtered two-level, three-phase VSI, obtaining proper waveforms for the capacitor voltages and the output currents, while allowing a balance in the whole microgrid system.

dSPACE Implementation
In this work, the implementation of a modulated model predictive control of a twolevel, three-phase VSI in an islanded AC microgrid using a dSPACE ds1103 control platform was explained, step-by-step, in detail.
The two-level, three-phase VSI was developed in the laboratory, with a PCB especially designed for that purpose. The switches used were described, to facilitate understanding of their features, which may affect the implementation of the control of the power converters embedded in the experimental islanded AC microgrid.
In the outputs of each phase of the VSI, LCL filters were included, to ease the filtering of the harmonics of the obtained currents, and to project an eventual future experimental development for on-grid AC microgrids. The experimental characteristics of the LCL filters were described, as well as those of the PCB bases for the construction of the LCL filter developed in the laboratory. The mathematical discrete model was briefly described, to give context to the implementation of the modulated model predictive controller for the real-time simulation in the dSPACE ds1103 control platform. The RL load was characterised by providing its parameters, and pinpointing its location in the experimental setup. In this way, it was explained that the setup considered this shared load by the two paralleled-VSIs.
In order to better explain the implementation of this dSPACE-based AC microgrid, the technical features of the dSPACE ds1103 control platform were described, providing details of the internal microcontrollers (slave DSP), the connectors that were used for the implementation of the M 2 PC, and the ADCs that were used for obtaining the measurements of the filter and output currents, the capacitor voltages, and the DC-link voltage. A very important aspect of the dSPACE ds1103 control platform, which was essential to implementing the M 2 PC, was the possibility of using the space vector PWM signals generated by the internal slave DSP microcontroller. These signals were then introduced into the Atlys FPGA platform for final processing, by adding dead-times for safe commutation of the power converter.
The implementation of the controller was deployed in the real-time interface of the dSPACE ds1103 control platform, which allowed the use of MATLAB/Simulink with real equipment, the experimental setup of the islanded AC microgrid. A brief explanation of the fundamentals of the M 2 PC was provided, considering the cost function to be minimised, where the control objectives were defined (in this case, output currents and capacitor voltages). Then, the modulator was briefly explained, also, showing that using the SVM and its active vectors that form every SVM sector was evaluated in the cost function for every sampling time. Then, the calculation of the duty cycles for each sector of the SVM was explained, and then evaluated in the new cost function. At this point, it was explained how the SVM was implemented in the dSPACE-based AC microgrid, using space vector PWM from the internal slave DSP of the dSPACE ds1103. In addition, it was explained where to obtain these signals for the controller implementation, by using the available library for the ds1103 slave DSP in Simulink. Then, the inputs of the SVM were explained, as they were the outputs of the model-predictive stage. The complete Simulink for the M 2 PC was shown, paying attention to the relevant blocks that allowed for interaction between the real equipment and the software-simulated environment.
Continuing with the explanation of the controller implementation, the code for the M 2 PC, and an illustration of how this code was embedded in the Simulink model, as the S-Function embedded in the Simulink model, were fully included in Appendix A.1 of this paper.
Referring to power sharing control, the droop control and virtual impedance were briefly explained, and their modelling in the Simulink model were shown and explained.
The use of the available ADCs was explained, describing how to include them in the Simulink model, and how their distribution was used to obtain the filter and output currents, the capacitor voltages, and the DC voltage.
The slave DSP interruption used in this real-time simulation was explained, showing the Simulink block that allowed it to be available for the implementation of the realtime simulation.
The method used to determine the frequency reference in the Simulink model was explained, showing that, as the AC microgrid operated off-grid, a phase-locked loop algorithm was not needed.
A crucial part of the implementation was the determination of the dead-times to be included in the commutation signals that went to the real plant, the two-level, threephase VSI. This was the process that was carried out in the FPGA, and the details of its programming are given in detail in Appendix A.2, where the code for the addition of dead-times for the first leg of the VSI is shown.
The dSPACE developers included a complete software platform for testing and monitoring dSPACE real-time systems simulations. This ControlDesk software uses a file that is compiled from the Simulink model described at the outset. This software platform allowed the complete control and monitoring of the relevant variables for this implementation. Gains for the several ADCs used were able to be adjusted, to find proper measurements of the filter and output currents, and for the capacitor voltages and DC voltage. Additionally, the graphical environment allowed for proper visualisation of the functioning of the control for the input and output variables relevant to this implementation.
The obtained experimental waveforms were included in the paper, to show that the experimental implementation of the modulated model predictive control for the two-level, three-phase voltage source inverter in a dSPACE-based AC microgrid is completely feasible, including power sharing control with the droop control loop and with the added virtual resistive impedance.

Conclusions
This article seeks to contribute relevant information on the process of implementing an experimental islanded AC microgrid with two-level, three-phase voltage source inverters, LCL filters, and sharing an RL load, using a real-time simulation as the modulated model predictive controller. The implementation of the controller was realised on the real-time interface available for the dSPACE ds1103 control platform and its internal slave DSP microcontroller.
The fixed-switching frequency had a value of 20 kHz; a value that did not present any problem for the dSPACE ds1103 control platform, and did not cause any overrun problem to it.
The MATLAB/Simulink working environment was quite simple to use, and the inclusion of the RTI dSPACE libraries was essential to implementing the modulated model predictive controller.
There is a lack of fully documented hardware-in-the-loop implementations and realtime simulations of power converters, microgrids, and distributed generation.
Real-time simulation and hardware-in-the-loop control platforms will continue to play a very relevant role in prototyping and testing in several engineering fields. In particular, for power converters, microgrids and distributed generation will continue to allow researchers to implement and test several systems architectures, and several advanced control strategies.