A Compact and Efficient Boost Converter in a 28 nm CMOS with 90 mV Self-Startup and Maximum Output Voltage Tracking ZCS for Thermoelectric Energy Harvesting

There are increasing demands for the Internet of Things (IoT), wearable electronics, and medical implants. Wearable devices provide various important daily applications by monitoring real-life human activities. They demand low-cost autonomous operation in a miniaturized form factor, which is challenging to realize using a rechargeable battery. One promising energy source is thermoelectric generators (TEGs), considered the only way to generate a small amount of electric power for the autonomous operation of wearable devices. In this work, we propose a compact and efficient converter system for energy harvesting from TEGs. The system consists of an 83.7% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive maximum power point tracking (A-MPPT) and indirect zero current switching (I-ZCS) controllers for efficient operation. The startup circuit is realized using a gain-boosted tri-state buffer, which achieves 69.8% improved gain at the input VIN = 200 mV compared to the conventional approach. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider, achieving 95.2% tracking efficiency. To address the challenge of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on a new concept of maximum output voltage tracking (MOVT). The integrated circuit (IC) is fabricated using a 28 nm CMOS in a compact chip area of 0.03 mm2. The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. Measured results show successful startup operation at an ultralow input, VIN = 90 mV. A peak conversion efficiency of 85.9% is achieved for the output of 1.07 mW.


Introduction
Recent interest in renewable energy sources is significantly increasing with rising environmental pollution and energy costs. Extensive research has been conducted to explore new methods to conserve power and harvest clean energy. Because of the increasing number of low-power devices such as the Internet of Things (IoT), wearable electronics, and medical implants, energy harvesting from renewable sources is an urgent research topic [1]. Among them, wearable devices provide important daily applications by monitoring various human activities. Diverse examples of wearable devices have been proposed, which include electronic skin, wristbands, watches, smart clothing, virtual reality (VR) headsets, and artificial intelligence (AI) hearing aids [2]. These devices demand low-cost autonomous operation with miniaturized form factors; the demands are challenging to satisfy using a rechargeable batteries. One promising energy source for wearable electronics is thermoelectric generators (TEGs), which convert an omnipresent temperature gradient into electrical energy via the Seebeck effect [3,4]. It is considered that TEGs are the only way to generate a small amount of electric power for the autonomous operation of wearable devices. Because energy conversion can be performed using a solid-state material without moving elements, TEGs are suitable for long-term operation. Under a relatively small temperature gradient, however, TEG generates a low source voltage (V S ), which cannot be used to supply the devices directly. For example, commercially available TEGs generate V S between 10 mV and 30 mV for a 1 • C temperature difference [5]. Therefore, a DC-DC converter is required to boost the input to a suitable output.
Various techniques have been explored to realize efficient DC-DC converters using maximum power point tracking (MPPT) methods [6][7][8][9]. The authors of [6] configure the switching frequency based on the internal resistor (R S ) of the TEG and the inductor value. However, the frequency of the on-chip clock generator can fluctuate due to process, voltage, and temperature (PVT) variations. This necessitates an adaptive MPPT controller based on a voltage-controlled oscillator (VCO) to tune the switching frequency [7]. The work conducted in [8] utilizes a hill-climbing MPPT controller that senses the output current of the converter, which charges algorithm capacitors to track V S for handling the input range from 5 µW to 10 mW. The work conducted in [9] uses transformer-based methods for a dual-stage boost converter to increase conversion efficiency to 81.5%.
The switched capacitor (SC)-based approach offers the advantage of on-chip integration and low-voltage operation [10][11][12]. The gate-boosted charge pump operates with an input voltage of 100 mV [10]. Another work [11] utilized a voltage doubler as a negative charge pump to reduce the on-resistance of the load-side switch. Additionally, a fully integrated SC converter used a 220 mV input to generate a 1.9 V output [12]. However, previous works have the drawback of large system sizes; for example, the algorithm capacitor in [8] requires a 7.6 mm 2 silicon area. Other works have bulky implementations, such as a transformer of 1.8 mm 2 size [9], a sizeable on-chip capacitor of 2.31 mm 2 [10], and three inductors [13]. The SC-based converter shows relatively low efficiencies, for example, 33% [10], 52% [11], and 37.4% [12].
Because V S can be smaller than the threshold voltage (V TH ) of transistors, a selfstartup method is required for the initial step-up of the supply voltage. The startup temporarily provides power for the main converter until it can be self-sustained. Various methods have been investigated. These methods include using a mechanical switch to initiate the converter [6], utilizing an off-chip transformer [9], using on-chip inductors [10], and pre-charging the output capacitor using an external battery [14]. However, these techniques often demand bulky implementations, which can be impractical for low-cost sensor nodes and IoT applications. The works [15,16] use the switched branches for inductor sharing between the startup and main converter; however, the switching increases the system complexity.
The discontinuous conduction mode (DCM), commonly used for low-power DC-DC converters, should suppress the reverse current through the inductor. The high-side switch is opened when the inductor current I IND is close to zero for zero current switching (ZCS). One method to implement ZCS is using a diode [17]; however, this approach is unsuitable for low-voltage design due to diode voltage drop. For efficiency reasons, a transistor switch is typically used with a ZCS controller. A previous work on a ZCS controller used a comparator to detect the voltage [18]. Another approach is to use digital circuits to detect current zero crossing indirectly using the inductor voltage [19]. The digital quantization of inductor voltage needs to select fine pulse width for the ZCS operation. However, the linear scaling used to modulate the pulse width becomes inefficient for low V IN . To handle the issue, a fine delay stage is used [20], which sets the pulse width suitable to open the high-side switch; however, the ZCS controller uses an external supply to realize fine delay. In addition, appropriate measurement delay is not addressed [21].
To overcome the issues mentioned above, we propose a compact and efficient DC-DC converter system realized in the 28 nm CMOS technology. The integrated system consists of an 85.9% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive MPPT (A-MPPT) and indirect ZCS (I-ZCS) controllers for efficient operation. The startup circuit is realized using a ring-oscillator- based charge pump, which enhances gain using a tri-state buffer for ultralow voltage operation. The tri-state buffer achieves a 69.8% gain improvement over a single buffer at V IN = 200 mV. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider for fractional open circuit voltage (FOCV) operation. To address the challenges of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on maximum output voltage tracking (MOVT). The fabricated integrated circuit (IC) is realized in a compact chip area of 0.03 mm 2 . The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. The measured results show a peak tracking efficiency of 95.2% and a conversion efficiency of 85.9%. The end-to-end efficiency of 83.7% is achieved using R S = 8 Ω and V S = 280 mV.
This paper is organized as follows. Section 2 describes the system design. Section 3 presents the circuit implementation. Section 4 presents the measured results, and Section 5 draws the conclusion. Figure 1 shows the block diagram of the proposed system. It mainly consists of a boost converter and a self-startup circuit. The boost converter includes an A-MPPT controller, an I-ZCS controller, a voltage detector (VD), an oscillator, and four power switches (M N1 , M N2 , M P1 , and M P2 ). M N1 , used for self-startup, is a low threshold voltage (LVT) transistor. High threshold voltage (HVT) transistors are used for the switches of the boost converter (M N2 , M P1 , and M P2 ), which reduces the leakage current compared to the standard threshold voltage (SVT) transistor. Super-low threshold voltage (SLVT) transistors are used for the startup circuit to reduce the minimum input V IN to the system. The oscillator consists of a ramp generator, pulse generator, biasing resistor R OSC , and capacitor C OSC . The ramp voltage V RAMP is compared with a reference V REF to generate the clock signal Φ OSC for the A-MPPT controller. The TEG is modeled using V S and R S . An input capacitor C IN is used to buffer the converter's input V IN . A single inductor L = 100 µH is shared between the startup and boost converter without extra switches.

Proposed System
To overcome the issues mentioned above, we propose a compact and efficient DC-DC converter system realized in the 28 nm CMOS technology. The integrated system consists of an 85.9% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive MPPT (A-MPPT) and indirect ZCS (I-ZCS) controllers for efficient operation. The startup circuit is realized using a ring-oscillator-based charge pump, which enhances gain using a tri-state buffer for ultralow voltage operation. The tri-state buffer achieves a 69.8% gain improvement over a single buffer at VIN = 200 mV. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider for fractional open circuit voltage (FOCV) operation. To address the challenges of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on maximum output voltage tracking (MOVT). The fabricated integrated circuit (IC) is realized in a compact chip area of 0.03 mm 2 . The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. The measured results show a peak tracking efficiency of 95.2% and a conversion efficiency of 85.9%. The end-to-end efficiency of 83.7% is achieved using RS = 8 Ω and VS = 280 mV. This paper is organized as follows. Section 2 describes the system design. Section 3 presents the circuit implementation. Section 4 presents the measured results, and Section 5 draws the conclusion. Figure 1 shows the block diagram of the proposed system. It mainly consists of a boost converter and a self-startup circuit. The boost converter includes an A-MPPT controller, an I-ZCS controller, a voltage detector (VD), an oscillator, and four power switches (MN1, MN2, MP1, and MP2). MN1, used for self-startup, is a low threshold voltage (LVT) transistor. High threshold voltage (HVT) transistors are used for the switches of the boost converter (MN2, MP1, and MP2), which reduces the leakage current compared to the standard threshold voltage (SVT) transistor. Super-low threshold voltage (SLVT) transistors are used for the startup circuit to reduce the minimum input VIN to the system. The oscillator consists of a ramp generator, pulse generator, biasing resistor ROSC, and capacitor COSC. The ramp voltage VRAMP is compared with a reference VREF to generate the clock signal ΦOSC for the A-MPPT controller. The TEG is modeled using VS and RS. An input capacitor CIN is used to buffer the converter's input VIN. A single inductor L = 100 µH is shared between the startup and boost converter without extra switches.   the TEG to the output V OUT level required to power IoT devices. To extract the maximum power from the TEG, the A-MPPT controller continuously adjusts the on-time of the pulse Φ N2 for M N2 . Then, the input impedance R IN is adjusted to match R S , and the maximum power point (MPP) voltage V MPP tracks half of V S . The I-ZCS controller provides the pulse Φ P2 to control the on-time of M P2 when L discharges. The M P2 is turned off at a suitable time to prevent the current backflow from V OUT . Figure 2 shows the waveform of the converter. When VIN is supplied to the startup circuit, it generates an output pulse ΦS,OUT (=ΦN1) for MN1. During the on-time of MN1, L is charged when VIN is as low as 90 mV. During the off-time of MN1, stored energy in L keeps charging the storage capacitor CDD through MP1. During the startup, the supply voltage VDD gradually increases to 700 mV. The VD monitors VDD. When VDD reaches 700 mV, it generates the disable signal VDIS, which stops the oscillation of the startup circuit and enables the boost converter. The boost converter raises the tens of mV generated by the TEG to the output VOUT level required to power IoT devices. To extract the maximum power from the TEG, the A-MPPT controller continuously adjusts the on-time of the pulse ΦN2 for MN2. Then, the input impedance RIN is adjusted to match RS, and the maximum power point (MPP) voltage VMPP tracks half of VS. The I-ZCS controller provides the pulse ΦP2 to control the on-time of MP2 when L discharges. The MP2 is turned off at a suitable time to prevent the current backflow from VOUT.

Self-Startup Circuit
Ring oscillators are widely used to generate the clock for the startup circuit; however, the operation is limited mainly by two reasons. Firstly, when VDD reduces, it is difficult to sustain the oscillation with the decreased gain of the inverter. Secondly, the output swing needed to drive the subsequent stage is reduced. These limitations can significantly impede the low-voltage startup [22]. Figure 3 shows the proposed self-startup circuit using a gain-boosted tri-state buffer. It consists of six stages, in which the output of the fifth stage is feedback to the first stage. The inset shows the schematic of the unit stage. It comprises two inverters, INV1 (transistors N1 and P1) and INV2 (transistors N2 and P2). They are realized using SLVT transistors to reduce the startup voltage further. The INV2 works as a tri-state buffer, which provides additional gain to reduce the input for the startup. VEN is enabled by the input, and the startup circuit generates ΦS,OUT. When disabled, it keeps a high impedance state. The voltage gain AV1 of a single inverter can be expressed [22] where the effective transconductance gm,eff1 is the transconductance sum of N1 and P1. The gds,N1 and gds,P1 are the output conductance of N1 and P1, respectively. In the proposed gainboosted buffer, the input VBuf,in is fed to the gate of the two inverters. The buffer output VBuf,out is taken from the output of INV2. The output of INV1 is connected to the source of the P2, which is amplified by the gain (AV1VIN) of INV1. Then, it is increased to (1 + AV1)VIN.

Self-Startup Circuit
Ring oscillators are widely used to generate the clock for the startup circuit; however, the operation is limited mainly by two reasons. Firstly, when V DD reduces, it is difficult to sustain the oscillation with the decreased gain of the inverter. Secondly, the output swing needed to drive the subsequent stage is reduced. These limitations can significantly impede the low-voltage startup [22]. Figure 3 shows the proposed self-startup circuit using a gain-boosted tri-state buffer. It consists of six stages, in which the output of the fifth stage is feedback to the first stage. The inset shows the schematic of the unit stage. It comprises two inverters, INV1 (transistors N 1 and P 1 ) and INV2 (transistors N 2 and P 2 ). They are realized using SLVT transistors to reduce the startup voltage further. The INV2 works as a tri-state buffer, which provides additional gain to reduce the input for the startup. V EN is enabled by the input, and the startup circuit generates Φ S,OUT . When disabled, it keeps a high impedance state. The voltage gain A V1 of a single inverter can be expressed [22] as where the effective transconductance g m,eff1 is the transconductance sum of N 1 and P 1 . The g ds,N1 and g ds,P1 are the output conductance of N 1 and P 1 , respectively. In the proposed gain-boosted buffer, the input V Buf,in is fed to the gate of the two inverters. The buffer output V Buf,out is taken from the output of INV2. The output of INV1 is connected to the source of the P 2 , which is amplified by the gain ( of the tri-state buffer, which can be written as where g m,P2, and g m,N2 are the transconductance of P 2 and N 2 , respectively. Using a similar method to that used to derive Equation (1), we obtain the gain A V2 of the gain-boosted buffer as where g ds,N2, and g ds,P2 are the output conductance of N 2 and P 2 , respectively. The result shows an enhanced gain of the tri-state buffer. Because AV1 > 1, VBuf,in is amplified by the effective transconductance gm,eff2 of the tri-state buffer, which can be wri en as where gm,P2, and gm,N2 are the transconductance of P2 and N2, respectively. Using a similar method to that used to derive Equation (1), we obtain the gain AV2 of the gain-boosted buffer as where gds,N2, and gds,P2 are the output conductance of N2 and P2, respectively. The result shows an enhanced gain of the tri-state buffer.  Figure 4a shows the transfer characteristics of the single-and tri-state buffers for three VIN. The tri-state buffer shows steeper slopes, indicating increased gain. The gain is calculated by taking the derivative of VBuf,out. Figure 4b shows the gain comparison using VIN = 100 mV. The result indicates that the tri-state buffer achieves a 21.2% gain improvement. Figure   Because AV1 > 1, VBuf,in is amplified by the effective transconductance gm,eff2 of the tri-state buffer, which can be wri en as where gm,P2, and gm,N2 are the transconductance of P2 and N2, respectively. Using a similar method to that used to derive Equation (1), we obtain the gain AV2 of the gain-boosted buffer as where gds,N2, and gds,P2 are the output conductance of N2 and P2, respectively. The result shows an enhanced gain of the tri-state buffer.  Figure 4a shows the transfer characteristics of the single-and tri-state buffers for three VIN. The tri-state buffer shows steeper slopes, indicating increased gain. The gain is calculated by taking the derivative of VBuf,out. Figure 4b shows the gain comparison using VIN = 100 mV. The result indicates that the tri-state buffer achieves a 21.2% gain improvement. Figure 4c Figure 5 shows the equivalent circuit of the startup for loss analysis. The resistive power loss PR,startup of the startup circuit can be expressed as   Figure 5 shows the equivalent circuit of the startup for loss analysis. The resistive power loss P R,startup of the startup circuit can be expressed as

Loss Analysis for Startup
where R 0 consists of the inductor parasitic resistance R IND (= 120 mΩ) and the resistance R N1 of M N1 . The switching loss P SW,startup can be expressed as where f St is the switching frequency of the startup circuit. V G,N1 and C G,N1 are the gate voltage and capacitance of M N1 , respectively. The power consumption P Q,startup of the startup circuit is 60 nW using V S = 150 mV and R S = 18 Ω. The total loss P T,startup is the sum of P R,startup , P SW,startup , and P Q,startup . Using the input power P IN , we obtain the efficiency η startup of the startup circuit as   Figure 5 shows the equivalent circuit of the startup for loss analysis. The resistive power loss PR,startup of the startup circuit can be expressed as

Loss Analysis for Startup
where R0 consists of the inductor parasitic resistance RIND (= 120 mΩ) and the resistance RN1 of MN1. The switching loss PSW,startup can be expressed as where fSt is the switching frequency of the startup circuit.   Figure 6b shows that ηstartup decreases when VIN increases for a given RIN. Figure  6c shows that PR,startup decreases slightly with RIN, which is mainly determined by VIN. Figure 6d shows that ηstartup increases with RIN while decreasing with VIN, which is a ributed to increased PR,startup. In summary, increasing VIN leads to elevated PR,startup and reduced ηstartup. Increasing RIN results in reduced PR,startup and improved ηstartup.   Figure 6b shows that η startup decreases when V IN increases for a given R IN . Figure 6c shows that P R,startup decreases slightly with R IN , which is mainly determined by V IN . Figure 6d shows that η startup increases with R IN while decreasing with V IN , which is attributed to increased P R,startup . In summary, increasing V IN leads to elevated P R,startup and reduced η startup . Increasing R IN results in reduced P R,startup and improved η startup .  Figure 7 shows the equivalent circuit of the converter for loss analysis. The resis power loss PR,boost of the boost converter can be wri en as

Loss Analysis for Boost Converter
where is the average inductor charging current when MN2 is on, and is the erage discharging current when MP2 is on (MN2 is off). RN2 and RP2 are the on-resistan of MN2 and MP2, respectively. In the typical boost converter, we can neglect the loss of with the condition of ( ≫ ). The switching loss PSW,boost can be expressed as   Figure 7 shows the equivalent circuit of the converter for loss analysis. The resistive power loss P R,boost of the boost converter can be written as

Loss Analysis for Boost Converter
where I CHA is the average inductor charging current when M N2 is on, and I DIS is the average discharging current when M P2 is on (M N2 is off). R N2 and R P2 are the on-resistances of M N2 and M P2 , respectively. In the typical boost converter, we can neglect the loss of M P2 with the condition of (I CHA I DIS ). The switching loss P SW,boost can be expressed as where f S is the switching frequency, and we use the approximated relationship of V DD ≈ (V OUT -V TH,P2 ). Here, V TH,P2 = 0.52 V is the threshold voltage of M P2 . C G,N2 and C G,P2 are the gate capacitance of M N2 and M P2 , respectively. C PAR = 21 pF is the parasitic capacitance. We obtain P SW,boost = 200 nW using f S = 8 kHz, and V DD = 0.9 V. The quiescent power P Q,boost of the boost converter is 420 nW. The total power loss P T,boost of the boost converter is the sum of P R,boost , P SW,boost , and P Q,boost . The synchronization and leakage losses are neglected to simplify the analysis. Then, we obtain the end-to-end efficiency η EE of the boost converter as where P Max = (V S ) 2 /(4R S ) is the maximum available power from the source, and P OUT = (V OUT ) 2 /R L is the output power with the load resistance R L .    Figure 8 shows the calculated η EE as a function of R S for different V S using the switch parameters shown in Table 1. When R S is reduced, increased I CHA and P R,boost reduces η EE . The η EE improves with increasing R S for a given V S . For R S = 8 Ω and V S = 300 mV, η EE increases to 89.3%. Beyond the maximum point, increasing R S reduces η EE by the decreased P Max . Figure 7. Equivalent circuit of the boost converter for loss analysis. CIN = 20 nF, RIND = 0.12 Ω, CL = 0.5 μF, and RL = 500 kΩ. Figure 8 shows the calculated ηEE as a function of RS for different VS using the switch parameters shown in Table 1. When RS is reduced, increased CHA ̅̅̅̅̅̅ and PR,boost reduces ηEE.
The ηEE improves with increasing RS for a given VS. For RS = 8 Ω and VS = 300 mV, ηEE increases to 89.3%. Beyond the maximum point, increasing RS reduces ηEE by the decreased PMax.   Figure 9a shows the schematic of the A-MPPT controller. It consists of a capacitorbased FOCV sampler, a comparator CM1, a counter, a programmable delay controller (PDC), and logic gates. In the FOCV technique, VMPP ≈ (αMPPVOC) is obtained using the sampled open-circuit voltage VOC (≈VS) and a source-dependent coefficient αMPP, where αMPP = 0.5 is used for the TEG. The capacitive divider (CM1 and CM2) generates VMPP. When Φ1 is high (Φ2 is low), switch MM1 is turned on, and VOC is stored in CM2. When Φ2 is high (Φ1 is low), switch MM2 is turned on. The stored charge in CM2 is shared with CM1. Then, the voltage VMPP across CM2 becomes half of VOC. CM1 compares VIN against VMPP, which decides the direction of the up/down counter. The counter output sets the delay of the PDC, and the on-time tN2 of ΦN2 is adjusted by the capacitor array in the PDC.   Figure 9a shows the schematic of the A-MPPT controller. It consists of a capacitorbased FOCV sampler, a comparator CM1, a counter, a programmable delay controller (PDC), and logic gates. In the FOCV technique, V MPP ≈ (α MPP V OC ) is obtained using the sampled open-circuit voltage V OC (≈V S ) and a source-dependent coefficient α MPP , where α MPP = 0.5 is used for the TEG. The capacitive divider (C M1 and C M2 ) generates V MPP . When Φ 1 is high (Φ 2 is low), switch M M1 is turned on, and V OC is stored in C M2 . When Φ 2 is high (Φ 1 is low), switch M M2 is turned on. The stored charge in C M2 is shared with C M1 . Then, the voltage V MPP across C M2 becomes half of V OC . CM1 compares V IN against V MPP , which decides the direction of the up/down counter. The counter output sets the delay of the PDC, and the on-time t N2 of Φ N2 is adjusted by the capacitor array in the PDC.

Adaptive MPPT Controller
The R IN of the DCM operation can be expressed [9] as where we vary t N2 to adjust R IN while keeping f S constant. To facilitate the MPPT operation, the oscillator frequency f OSC , which is higher than f S , is used to update t N2 . This method is different from a previous approach [23], which adjusts t N2 after evaluating V MPP rather than choosing between different V MPP values. Figure 9b shows the simulated waveforms of the MPPT operation. In the beginning, V IN increases to V OC by the sampling operation. Using the output of CM1, the A-MPPT controller adjusts t N2 to vary R IN for tracking the V IN changes occurring between two consecutive V MPP values. The A-MPPT controller consumes 430 nW at V DD = 900 mV. The RIN of the DCM operation can be expressed [9] as where we vary tN2 to adjust RIN while keeping fS constant. To facilitate the MPPT operation, the oscillator frequency fOSC, which is higher than fS, is used to update tN2. This method is different from a previous approach [23], which adjusts tN2 after evaluating VMPP rather than choosing between different VMPP values. Figure 9b shows the simulated waveforms of the MPPT operation. In the beginning, VIN increases to VOC by the sampling operation. Using the output of CM1, the A-MPPT controller adjusts tN2 to vary RIN for tracking the VIN changes occurring between two consecutive VMPP values. The A-MPPT controller consumes 430 nW at VDD = 900 mV. Figure 10 shows the flowchart further explaining the MPPT operation. The operation is based on the approximately linear relationship between VOC and VMPP. By leveraging this relationship, tN2 is adjusted to control RIN and VIN. In the case of (VIN < VMPP), tN2 is decreased to increase RIN and VIN. Conversely, tN2 increases to reduce RIN. The proposed approach is simple since it requires measurements of only VOC, even during temperature variations. Figure 11 shows the schematic of CM1. It is based on a PMOS differential input pair and is biased, using IBIAS = 5 nA. The power consumption of CM1 is 40 nW at VDD = 0.9 V.  Figure 10 shows the flowchart further explaining the MPPT operation. The operation is based on the approximately linear relationship between V OC and V MPP . By leveraging this relationship, t N2 is adjusted to control R IN and V IN . In the case of (V IN < V MPP ), t N2 is decreased to increase R IN and V IN . Conversely, t N2 increases to reduce R IN . The proposed approach is simple since it requires measurements of only V OC , even during temperature variations. Figure 11 shows the schematic of CM1. It is based on a PMOS differential input pair and is biased, using I BIAS = 5 nA. The power consumption of CM1 is 40 nW at V DD = 0.9 V.     Figure 12a shows the schematic of the I-ZCS controller. It comprises a comparator CM2, a counter, a PDC, sampling capacitors (C1,2,3), and logic gates. The CM2 compares the current average output VOUT,AVG(n) against the previous output VOUT,AVG(n−1), which is obtained via the low pass filter (RZ, CZ). The CM2 outputs the up/down signal ΦU/D for the counter, followed by the PDC that generates the adjustable delay ΦP2 for MP2. Using the 6b output Φ6b, PDC either increases or decreases the on-time tP2 of ΦP2. The PDC used for the I-ZCS controller has a similar structure to the one used in the A-MPPT controller. The ΦN2 is input to the PDC to set the starting reference for ΦP2 since the on-time of ΦN2 is used for inductor charging, while the on-time of ΦP2 is used for inductor discharging. At the end of discharging, the ZCS operation is performed.

Indirect ZCS Controller
Using the waveform of IIND, we can derive the expression for the change ΔtP in terms of output change ΔVOUT = [VOUT,AVG(n) − VOUT,AVG(n−1)] as where ΔtP2 is the difference between the current tP2(n) and the previous tP2(n − 1). The derivation of the above relation is shown in Appendix A. The nomenclature used for the acronyms and symbols of this paper are listed in Appendix B. The working principle of the I-ZCS controller is based on MOVT. VOUT is maximized when optimal tP2 is set for ZCS. In either case, when IIND falls to zero before or after MP2 is switched off, the non-optimal ZCS operation reduces VOUT; when there is perfect inductor zero crossing, VOUT is maximized. One advantage of an I-ZCS operation is that no IIND sensor is needed. The tN2 of ΦN2 is determined by the A-MPPT controller, depending on the source impedance RS. The tN2 Figure 11. Schematic of the comparator. Figure 12a shows the schematic of the I-ZCS controller. It comprises a comparator CM2, a counter, a PDC, sampling capacitors (C 1,2,3 ), and logic gates. The CM2 compares the current average output V OUT,AVG (n) against the previous output V OUT,AVG (n−1), which is obtained via the low pass filter (R Z , C Z ). The CM2 outputs the up/down signal Φ U/D for the counter, followed by the PDC that generates the adjustable delay Φ P2 for M P2 . Using the 6-b output Φ 6b , PDC either increases or decreases the on-time t P2 of Φ P2 . The PDC used for the I-ZCS controller has a similar structure to the one used in the A-MPPT controller. The Φ N2 is input to the PDC to set the starting reference for Φ P2 since the on-time of Φ N2 is used for inductor charging, while the on-time of Φ P2 is used for inductor discharging. At the end of discharging, the ZCS operation is performed. does not have a direct effect on the I-ZCS controller since it is independently determined before the ZCS operation. Waveforms for explaining I-ZCS operation are also shown. When VOUT,AVG(n) is greater than VOUT,AVG(n−1), the positive difference (ΔVOUT > 0) performs down-counting with low ΦU/D. The PDC reduces the number of active delay capacitance, decreasing the pulse width of tP2. Conversely, the opposite condition (ΔVOUT < 0) performs up-counting to increase tP2. Then, ΦU/D switches between high and low until it reaches the steady state, when VOUT is maximized by optimal ZCS operation. One drawback of this approach is that VOUT is not fully regulated, which can be handled using additional regulators commonly used for various power supplies.  Figure 12b shows the logic operation to generate VOUT,AVG(n − 1). After ΦN2 is turned off, ΦP2 turns on MP2. The output ΦQ is kept high until ΦP2 becomes high. With a high transition of ΦP2, the output ΦQ of the J/K flip-flop becomes low. When ΦP2 becomes low, ΦNOR becomes high, which allows C2 to be charged from C1. When ΦNOR changes to low

Indirect ZCS Controller
where ∆t P2 is the difference between the current t P2 (n) and the previous t P2 (n − 1). The derivation of the above relation is shown in Appendix A. The nomenclature used for the acronyms and symbols of this paper are listed in Appendix B. The working principle of the I-ZCS controller is based on MOVT. V OUT is maximized when optimal t P2 is set for ZCS. In either case, when I IND falls to zero before or after M P2 is switched off, the non-optimal ZCS operation reduces V OUT ; when there is perfect inductor zero crossing, V OUT is maximized. One advantage of an I-ZCS operation is that no I IND sensor is needed. The t N2 of Φ N2 is determined by the A-MPPT controller, depending on the source impedance R S . The t N2 does not have a direct effect on the I-ZCS controller since it is independently determined before the ZCS operation. Waveforms for explaining I-ZCS operation are also shown. When V OUT,AVG (n) is greater than V OUT,AVG (n−1), the positive difference (∆V OUT > 0) performs down-counting with low Φ U/D . The PDC reduces the number of active delay capacitance, decreasing the pulse width of t P2 . Conversely, the opposite condition (∆V OUT < 0) performs up-counting to increase t P2 . Then, Φ U/D switches between high and low until it reaches the steady state, when V OUT is maximized by optimal ZCS operation. One drawback of this approach is that V OUT is not fully regulated, which can be handled using additional regulators commonly used for various power supplies. Figure 12b shows the logic operation to generate V OUT,AVG (n − 1). After Φ N2 is turned off, Φ P2 turns on M P2 . The output Φ Q is kept high until Φ P2 becomes high. With a high transition of Φ P2 , the output Φ Q of the J/K flip-flop becomes low. When Φ P2 becomes low, Φ NOR becomes high, which allows C 2 to be charged from C 1 . When Φ NOR changes to low due to the rising Φ P2 , the voltage V C2 across C 2 is transferred to C 3 , generating V OUT,AVG (n − 1). Figure 13 Figure 14a shows the micrograph of the converter IC fabricated using a 28 nm CMOS process in an area of 0.03 mm 2 . The IC is mounted on a test board using the chip-on-board (COB) technique. Figure 14b shows the experimental setup for the converter characterization. A digital meter (DMM6500) is used for measuring the current. The DC power supply emulates the TEG source from 0.1 V to 0.4 V. The commercial TEG source is also used for testing [24].  Figure 14a shows the micrograph of the converter IC fabricated using a 28 nm CMOS process in an area of 0.03 mm 2 . The IC is mounted on a test board using the chip-on-board (COB) technique. Figure 14b shows the experimental setup for the converter characteriza-tion. A digital meter (DMM6500) is used for measuring the current. The DC power supply emulates the TEG source from 0.1 V to 0.4 V. The commercial TEG source is also used for testing [24].  Figure 14a shows the micrograph of the converter IC fabricated using a 28 nm CMOS process in an area of 0.03 mm 2 . The IC is mounted on a test board using the chip-on-board (COB) technique. Figure 14b shows the experimental setup for the converter characterization. A digital meter (DMM6500) is used for measuring the current. The DC power supply emulates the TEG source from 0.1 V to 0.4 V. The commercial TEG source is also used for testing [24].  Figure 15 shows the measured waveform of the oscillator. When VRAMP is higher than VREF = 600 mV, ΦOSC is triggered high. The measured frequency of ΦOSC is 44.4 kHz. Figure  16a shows the measured transient result of the self-startup. Using VIN = 250 mV and RS = 20 Ω, VDD is increased to 700 mV, which is enough to enable the boost converter. The steady state is reached after 2 sec. Using the commercial TEG having VIN = 200 mV, VDD is increased to 600 mV, and the steady state is reached after 5 sec. These results demonstrate the successful operation of the self-startup. We further characterize the startup circuit using reduced VIN. Figure 16b shows the measured result, in which VIN = 90 mV is increased  Figure 15 shows the measured waveform of the oscillator. When V RAMP is higher than V REF = 600 mV, Φ OSC is triggered high. The measured frequency of Φ OSC is 44.4 kHz. Figure 16a shows the measured transient result of the self-startup. Using V IN = 250 mV and R S = 20 Ω, V DD is increased to 700 mV, which is enough to enable the boost converter. The steady state is reached after 2 sec. Using the commercial TEG having V IN = 200 mV, V DD is increased to 600 mV, and the steady state is reached after 5 sec. These results demonstrate the successful operation of the self-startup. We further characterize the startup circuit using reduced V IN . Figure 16b shows the measured result, in which V IN = 90 mV is increased to V DD = 650 mV. The result shows that the gain-boosted tri-state buffer effectively reduces the minimum startup voltage.     Figure 17 shows the measured waveforms of the converter. The experiment is p formed using VIN = 250 mV and RS = 20 Ω. When ΦN2 is high, L is charged. When ΦN triggered to low, the energy stored in L is transferred to the output. When VIND reaches ground, ΦP2 becomes high to turn off MP2 via the I-ZCS controller. The ringing is cau by the LC resonance when MP2 is turned off. Overall capacitance, including CL, forms onance with L, and the amplitude is decayed by the path loss.  Figure 17 shows the measured waveforms of the converter. The experiment is performed using V IN = 250 mV and R S = 20 Ω. When Φ N2 is high, L is charged. When Φ N2 is triggered to low, the energy stored in L is transferred to the output. When V IND reaches the ground, Φ P2 becomes high to turn off M P2 via the I-ZCS controller. The ringing is caused by the LC resonance when M P2 is turned off. Overall capacitance, including C L , forms resonance with L, and the amplitude is decayed by the path loss.   Figure 18a shows the measured tracking efficiency η MPPT = (P IN /P Max ) as a function of V S . The results show that η MPPT > 93% is achieved in the V S range from 135 mV to 300 mV, with the peak η MPPT of 95.2%. Figure 18b shows the measured conversion efficiency η CONV = (P OUT /P IN ) as a function of P OUT . P OUT is changed from 77 µW to 1.28 mW by varying R L . The peak η CONV = 85.9% is achieved for P OUT = 1.07 mW. Figure 19 shows the measured η EE = (P OUT /P Max ) of the converter as a function of V S for different R S . Because P Max is reduced, η EE decreases with increasing R S . The result shows that peak η EE = 83.7% is achieved using R S = 8 Ω and V S = 280 mV.  Figure 18a shows the measured tracking efficiency ηMPPT = (PIN/PMax) as a function of VS. The results show that ηMPPT > 93% is achieved in the VS range from 135 mV to 300 mV, with the peak ηMPPT of 95.2%. Figure 18b shows the measured conversion efficiency ηCONV = (POUT/PIN) as a function of POUT. POUT is changed from 77 µW to 1.28 mW by varying RL. The peak ηCONV = 85.9% is achieved for POUT = 1.07 mW. Figure 19 shows the measured ηEE = (POUT/PMax) of the converter as a function of VS for different RS. Because PMax is reduced, ηEE decreases with increasing RS. The result shows that peak ηEE = 83.7% is achieved using RS = 8 Ω and VS = 280 mV.   Table 2 shows the comparison with previous works using the boost converter for energy harvesting [25][26][27][28][29][30][31][32]. Our approach introduces a novel technique for self-startup using the tri-state buffer, distinguishing it from the studies conducted in [26,29], which relied on   Figure 18a shows the measured tracking efficiency ηMPPT = (PIN/PMax) as a function of VS. The results show that ηMPPT > 93% is achieved in the VS range from 135 mV to 300 mV, with the peak ηMPPT of 95.2%. Figure 18b shows the measured conversion efficiency ηCONV = (POUT/PIN) as a function of POUT. POUT is changed from 77 μW to 1.28 mW by varying RL. The peak ηCONV = 85.9% is achieved for POUT = 1.07 mW. Figure 19 shows the measured ηEE = (POUT/PMax) of the converter as a function of VS for different RS. Because PMax is reduced, ηEE decreases with increasing RS. The result shows that peak ηEE = 83.7% is achieved using RS = 8 Ω and VS = 280 mV.   Table 2 shows the comparison with previous works using the boost converter for energy harvesting [25][26][27][28][29][30][31][32]. Our approach introduces a novel technique for self-startup using the tri-state buffer, distinguishing it from the studies conducted in [26,29], which relied on Figure 19. Measured end-to-end efficiency of the converter as a function of V S for different R S . R L = 4.7 kΩ. Table 2 shows the comparison with previous works using the boost converter for energy harvesting [25][26][27][28][29][30][31][32]. Our approach introduces a novel technique for self-startup using the tri-state buffer, distinguishing it from the studies conducted in [26,29], which relied on a single buffer. Notably, the proposed self-startup circuit achieves a minimum startup voltage of 90 mV, outperforming all the works except [30]. Furthermore, our proposed A-MPPT and I-ZCS controllers achieve a relatively high conversion efficiency of 85.9%. In comparison, the efficiencies observed in [25,28,32] are 74.5%, 75.0%, and 25.0%, respectively. In addition, our compact design has the smallest chip area (0.03 mm 2 ) among the works, including ICs implemented using the same technology node of a 28 nm CMOS [31,32]. The result shows that our work effectively handles the previous issue of bulky implementations. Consequently, our research provides practical and efficient solutions for low-cost wearable electronics and IoT applications.

Conclusions
In this paper, we propose a compact and efficient boost converter in a 28 nm CMOS for thermoelectric energy harvesting. For self-startup, we use a gain-boosted tri-state buffer in a ring oscillator to achieve a 90 mV minimum startup. A comparison with the single inverter shows that the proposed tri-state buffer achieves a 69.8% improvement in the DC gain. To extract the maximum power from the TEG, we use a FOCV-based A-MPPT controller. To remove the current sensor required by the conventional approach, we propose an I-ZCS controller to achieve an efficient DCM operation. The converter is fabricated in a 28 nm COMS process realized in a compact area of 0.03 mm 2 . The measured data show a successful I-ZCS operation using the proposed MOVT technique. Using the A-MPPT controller, the converter achieves a peak tracking efficiency of 95.2%. The converter delivers the output power of 1.07 mW with a peak conversion efficiency of 85.9%. Using the proposed techniques, TEG energy harvesting can be realized in a compact system. These characteristics are suitable for various applications, including wearable electronics, medical implants, and IoT devices.
where IP ≈ VIN(tN2/L) denotes the peak current. Using the voltage across the inductor at tP2, we obtain another expression for the peak current IP: (A2) Figure A1. Inductor current waveform of the boost converter.
The average current is obtained by integrating the current within the switching cycle and is equivalent to calculating areas A1 and A2. Using (A2), area A2 is obtained as The average current is obtained by integrating the current within the switching cycle and is equivalent to calculating areas A 1 and A 2 . Using (A2), area A 2 is obtained as Then, the output current I OUT can be expressed as where f S is the switching frequency. Using the I OUT expression of (A4), we obtain the output resistance R OUT as Rearranging (A5) for t P2 , we obtain For the present state, we use the discharging time as t P2 (n) and the average output as V OUT,AVG (n). Similarly, for the previous state, we use t P2 (n−1) and V OUT,AVG (n−1). Then, we obtain Subtracting (A8) from (A7), we obtain where ∆t P2 = t P2 (n)− t P2 (n−1). Assuming V OUT (n) ≈ V OUT,AVG (n−1) under a small-signal operation and (V OUT V IN ) for the boost converter, we can simplify (A9) as where ∆V OUT = V OUT,AVG (n) − V OUT,AVG (n−1). Using (A1) and (A2), we obtain the expression for t P2 as Using (A10) and (A11), we obtain (A12)

Appendix B
The nomenclature used in this paper are listed below. Power consumption of boost converter V OUT,AVG (n) Current average output voltage V OUT,AVG (n − 1) Previous average output voltage