An Ultra-Low-Cost RCL-Meter

An ultra-low-cost RCL meter, aimed at IoT applications, was developed, and was used to measure electrical components based on standard techniques without the need of additional electronics beyond the AVR® micro-controller hardware itself and high-level routines. The models and pseudo-routines required to measure admittance parameters are described, and a benchmark between the ATmega328P and ATmega32U4 AVR® micro-controllers was performed to validate the resistance and capacitance measurements. Both ATmega328P and ATmega32U4 micro-controllers could measure isolated resistances from 0.5 Ω to 80 MΩ and capacitances from 100 fF to 4.7 mF. Inductance measurements are estimated at between 0.2 mH to 1.5 H. The accuracy and range of the measurements of series and parallel RC networks are demonstrated. The relative accuracy (ar) and relative precision (pr) of the measurements were quantified. For the resistance measurements, typically ar, pr < 10% in the interval 100 Ω–100 MΩ. For the capacitance, measured in one of the modes (fast mode), ar < 20% and pr < 5% in the range 100 fF–10 nF, while for the other mode (transient mode), typically ar < 20% in the range 10 nF–10 mF and pr < 5% for 100 pF–10 mF. ar falls below 5% in some sub-ranges. The combination of the two capacitance modes allows for measurements in the range 100 fF–10 mF (11 orders of magnitude) with ar < 20%. Possible applications include the sensing of impedimetric sensor arrays targeted for wearable and in-body bioelectronics, smart agriculture, and smart cities, while complying with small form factor and low cost.


Introduction
The Internet of Things (IoT) entails a network of physical objects-'things'-that are embedded with sensors, electronics, software, etc. for the purpose of communicating with other devices over the Internet. Caused by the sheer number of things connected in this way, these data-acquisition devices obviously need to be of low-cost and fulfill certain tasks: sensing, electronic processing and connecting to the Internet. Impedimetric sensor arrays are an emerging field of study that is concerned with sense, processing and casting the measured data to the Internet [1][2][3]. Typical applications are wearable and in-body electronics [4][5][6][7][8] and plants and smart agriculture [9][10][11][12][13]. A common aspect shared between different devices is that the electronic interfaces for detection, processing and connection to the Internet are mainly carried out by separate external systems specifically optimized for each of these functions. While designing a system with specific units may often be advantageous to enhance the overall performance of the device, it also leads to higher manufacturing cost. For example, most biosensors feature a transduction mechanism to couple the physical and/or chemical changes in the system under measurement to the electronic circuitry of the measuring device. The latter is specifically optimized for the sensing interface and is followed by an analog-to-digital conversion unit (ADC). In the most usual scenario, the end Port P A1 : low output Port P A0 : pull-up input

Analog I/O Operation Modes
The AVR ® micro-controller family provides access to several digital and analog ports with input and output (I/O) functionalities. Both digital and analog I/O ports share a common control unit design, often called "General Digital I/O" [26,27]. In this work, the digital I/O ports (PDN) are labeled by an alpha-numerical code, denoted by the letter "D" proceeded by the port bit number "N", while the analog I/O ports (PAN) are represented by the letter "A". The analog ports have exclusive access to the alternate functions, featuring an I/O source-measuring unit (SMU) and an analog-to-digital converter (ADC) unit. By default, P AN ports can be configured into four distinct operation modes: (mode 1) floating input; (mode 2) pull-up input; (mode 3) low voltage output; (mode 4) high voltage output. Each operation mode shares the same basic electrical structure, consisting of the supply voltage source (V S ), common ground (GND), a stray capacitance (C pin ) and location of the I/O port (P An ) for the SMU and ADC unit. By default, vs. is equal to the reference voltage (V REF ). Figure 1 shows the equivalent circuit that describes each analog I/O port operation mode and was adapted from references [26,27]. Operation modes 1 and 2, shown in Figure 1a,b, respectively, share the same internal circuitry components to form a highimpedance input port due to the presence of the analog input resistance (R AIN ). C pin is also included in parallel with R AIN to account for the stray capacitance. The unique difference between operation mode 1 and 2 is the state of the internal pull-up resistance (R pu ), which is connected to an internal bias voltage. In the case of operating mode 1, the R pu is inactive, leading to a floating input configuration, while in the case of operation mode 2, the R pu sets a SMU configuration. This aspect will be further explored to implement the RCLmeter. Operation modes 3 and 4, shown in Figure 1c,d, relate to the "General Digital I/O" functions. Operation mode 3 consists of a floating and impedance low output configuration, and the operation mode 4 consists of a voltage source (V S ), thus forcing a high output configuration. In the absence of load impedance connected to P AN , the configuration of the operation mode 4 sinks current through the parallel RC network formed by the output resistance (R out ) and C pin . Table 1 shows the typical values of the internal components of the I/O ports [26,27]. Table 1. Typical values of the operational voltage of the circuits (V S ), the ADC unit, the internal circuitry to each I/O port and the TTL unit to each AVR ® micro-controller [26,27].

TTL Unit
ATmega328P ATmega32U4 5 10 1023 100 600 32 24 −0.5-1.5 3.0-5.5 −0.5-0.9 1.9-5.5 The R pu and C pin values listed in Table 1 are representative values. In case of the R pu , both micro-controller datasheets [26,27] characterize the range of R pu between 20 kΩ to 50 kΩ, and solely for the purpose of the ADC unit it refers a typical reference input resistance (R REF ) value of 32 kΩ. As for the C pin , the micro-controller datasheets [26,27] do not provide a typical value; only a conceptual component is shown in the equivalent circuits of the analog input circuitry representing the overall stray capacitance (also named C pin ). Therefore, the typical stray capacitance listed in Table 1 considers all capacitive sources in the internal analog input circuitry, such as: (i) the sampling and holder capacitance (C S/H ), approximately equal to 14 pF and (ii) the input capacitance (C i ) of each I/O pin, approximately equal to 10 pF. Both C S/H and C i are grounded; therefore, it is assumed that the parallel of both C i C S/H is the minimum value of C pin and is approximately equal to C pin ∼ = C i C S/H ∼ = 24 pF.
In practical terms, the operation mode of each port available on an AVR ® microcontroller must be configured according to the pseudo-code described in Figure 1 through a low-level instruction set, which is not a user-friendly environment. However, Arduino ® Sensors 2022, 22, 2227 5 of 26 has developed an integrated development environment (IDE) platform with support of high-level C++ functions such as pinMode() and digitalWrite(), an easy and user-friendly method to configure the ports. Figure 1 describes the C++ code required to properly configure each operation mode. In the following sections, it will be shown how the four different configurations for the ports may be used to build an RCL bridge. First, it is shown how to measure isolated resistors, capacitors and inductors, and then how to measure combinations of resistors and capacitors in series or parallel.

Recording Circuit
The recording circuit to measure resistances, capacitances and inductances, either isolated or in series and parallel is composed of the same internal components by setting two I/O ports with alternate functions, namely P A0 and P A1 ports configured for pull-up input (mode 1) and low output (mode 3), respectively, and as described in Section 2.2. Figure 1f shows the equivalent circuit resulting from the combination of the internal circuitry of each I/O port bridged by a load impedance (Z LOAD ). In the following Sections 2.4-2.8, the equivalent circuit shown in Figure 1f is detailed by replacing Z LOAD with resistance, capacitance and inductance, either isolated or in series and parallel.

Measurements of an Isolated Load Resistance (R-Meter)
Considering that in the equivalent circuit shown in Figure 1f, Z LOAD is composed of an isolated load resistance (R LOAD ), the pull-up resistor (R pu ) at port P A0 drives a current source that will sink through the parallel resistance path (R P ) formed by the analog input resistance (R AIN ) and the sum of the load and output resistances (R LOAD + R out ). Thus, for circuit analysis purposes, in Figure 2a, a reduction of the entire equivalent circuit to a voltage divider circuit is shown. In Figure 2a, the variable N A0 is introduced as the digital counterpart of the analog variable V A0, where N A0 = N max ·(V A0 /V S ) . The stray capacitances (C pin ) were neglected from the equivalent circuit, since on DC measurements, the capacitances behave as open circuit. In addition, to avoid interference of any stray capacitance, the procedure is to implement a reasonable delay time (say 1 ms) after setting the port P A0 to operation mode 2 (pullup input). This procedure assures that the stray capacitances are open circuit (t τ = R T C pin ). Using C pin = 25 pF and R pu = 32 kΩ, one obtains τ < 1 µs. has developed an integrated development environment (IDE) platform with support high-level C++ functions such as pinMode() and digitalWrite(), an easy and user-friend method to configure the ports. Figure 1 describes the C++ code required to properly co figure each operation mode. In the following sections, it will be shown how the four d ferent configurations for the ports may be used to build an RCL bridge. First, it is show how to measure isolated resistors, capacitors and inductors, and then how to measu combinations of resistors and capacitors in series or parallel.

Recording Circuit
The recording circuit to measure resistances, capacitances and inductances, eith isolated or in series and parallel is composed of the same internal components by setti two I/O ports with alternate functions, namely PA0 and PA1 ports configured for pull-u input (mode 1) and low output (mode 3), respectively, and as described in Section 2 Figure 1f shows the equivalent circuit resulting from the combination of the internal c cuitry of each I/O port bridged by a load impedance (ZLOAD). In the following sections 2 to 2.8, the equivalent circuit shown in Figure 1f is detailed by replacing ZLOAD with r sistance, capacitance and inductance, either isolated or in series and parallel.

Measurements of an Isolated Load Resistance (R-Meter)
Considering that in the equivalent circuit shown in Figure 1f, ZLOAD is composed an isolated load resistance (RLOAD), the pull-up resistor (Rpu) at port PA0 drives a curre source that will sink through the parallel resistance path (RP) formed by the analog inp resistance (RAIN) and the sum of the load and output resistances (RLOAD + Rout). Thus, f circuit analysis purposes, in Figure 2a, a reduction of the entire equivalent circuit to voltage divider circuit is shown. In Figure 2a, the variable NA0 is introduced as the digi counterpart of the analog variable VA0, where NA0 = ⌊Nmax⸱(VA0/VS)⌋. The stray capacitanc (Cpin) were neglected from the equivalent circuit, since on DC measurements, the capa tances behave as open circuit. In addition, to avoid interference of any stray capacitan the procedure is to implement a reasonable delay time (say 1 ms) after setting the port P to operation mode 2 (pullup input). This procedure assures that the stray capacitances a open circuit (t ≫ τ = RTCpin). Using Cpin = 25 pF and Rpu = 32 kΩ, one obtains τ < 1 µs. In Figure 2a, VA0 is the measured voltage at port PA0 and is given by: where RP is given by RAIN || (RLOAD + Rout), and vs. is equal to the reference voltage sour (VREF). Solving the voltage divider Equation (1), RLOAD is found as: Set port P A0 to INPUT PULLUP Set port P A1 to LOW OUTPUT Sample port P A0 : NA0 measures V A0 R LOAD is given by Eq.(2) Pseudo-code: In Figure 2a, V A0 is the measured voltage at port P A0 and is given by: where R P is given by R AIN || (R LOAD + R out ), and vs. is equal to the reference voltage source (V REF ). Solving the voltage divider Equation (1), R LOAD is found as: where K is an auxiliary variable used to shorten the length of Equation (2). All the parameters described in Equation (2) are known values, and are available on the datasheet of the micro-controller. The pseudo-code for a routine to measure R LOAD is described in Figure 2b.

Measurements of an Isolated Load Capacitance (C-Meter)
Two methodologies are reported in this section: (i) fast acquisition mode, which is based on the immediate response of the C LOAD charging cycle, and (ii) transient acquisition mode, based on measuring the charging time until a threshold voltage is reached. It is essential that prior to initiating measurements of C LOAD , all capacitive components are fully discharged. A typical procedure to discharge all capacitances is achieved by configuring the operation mode of the two I/O ports in use to low output (mode 3) and waiting, for example, a period of ∆t ≥ 1 ms.

Fast Acquisition Mode of an Isolated Load Capacitance
As an exception to all other methods presented in this manuscript, the fast acquisition mode to measure an isolated load capacitance (C LOAD ) uses a different internal circuitry. Therefore, Figure 3a shows the equivalent circuit resulting from the combination of the internal circuitry of two I/O ports, P A0 and P A1 , bridged by a pure load capacitance (C LOAD ). Essentially, the port P A1 is set in high output (mode 4) and links the voltage source (V S ) to the C LOAD terminal behaving as an input current source (i S ), and the port P A0 is set to floating input (mode 1), consisting of a measuring unit that links the input current to the ground through a high impedance resistor (R AIN ). Both the P A1 and P A0 ports consider the leakage current path to the ground through a stray capacitance (C pin ). However, the C pin located at P A1 can be neglected, since the characteristic time constant (τ A1 ) of P A1 is τ A1 = R out C pin ∼ = 15 ns, and therefore, because the fastest clock cycle (τ clk ) of the micro-controllers in use are approximately equal to τ clk ≈ 5τ A1 , after a single clock cycle the voltage in port P A1 (V A1 ) is stationary. where K is an auxiliary variable used to shorten the length of Equation (2). All the param eters described in Equation (2) are known values, and are available on the datasheet of t micro-controller. The pseudo-code for a routine to measure RLOAD is described in Figu 2b.

Measurements of an Isolated Load Capacitance (C-Meter)
Two methodologies are reported in this section: (i) fast acquisition mode, which based on the immediate response of the CLOAD charging cycle, and (ii) transient acquisitio mode, based on measuring the charging time until a threshold voltage is reached. It essential that prior to initiating measurements of CLOAD, all capacitive components a fully discharged. A typical procedure to discharge all capacitances is achieved by confi uring the operation mode of the two I/O ports in use to low output (mode 3) and waitin for example, a period of Δt ≥ 1 ms.

Fast Acquisition Mode of an Isolated Load Capacitance
As an exception to all other methods presented in this manuscript, the fast acquisitio mode to measure an isolated load capacitance (CLOAD) uses a different internal circuitr Therefore, Figure 3a shows the equivalent circuit resulting from the combination of t internal circuitry of two I/O ports, PA0 and PA1, bridged by a pure load capacitance (CLOA Essentially, the port PA1 is set in high output (mode 4) and links the voltage source (VS) the CLOAD terminal behaving as an input current source (iS), and the port PA0 is set to floa ing input (mode 1), consisting of a measuring unit that links the input current to t ground through a high impedance resistor (RAIN). Both the PA1 and PA0 ports consider t leakage current path to the ground through a stray capacitance (Cpin). However, the C located at PA1 can be neglected, since the characteristic time constant (τA1) of PA1 is τA1 RoutCpin ≅ 15 ns, and therefore, because the fastest clock cycle (τclk) of the micro-controlle in use are approximately equal to τclk ≈ 5τA1, after a single clock cycle the voltage in po PA1 (VA1) is stationary. For circuit analysis purposes, assuming all capacitances are fully discharged at t instant t = 0, all capacitances are shorted and all currents flow through the capacitive pat In these circumstances, the circuit analysis is simpler considering that at t = 0 the curre Set port P A0 to INPUT Set port P A1 to HIGH OUTPUT Sample port P A0 : NA0 measures V A0 C LOAD is given by Eq.(4) For circuit analysis purposes, assuming all capacitances are fully discharged at the instant t = 0, all capacitances are shorted and all currents flow through the capacitive path. In these circumstances, the circuit analysis is simpler considering that at t = 0 the current path flow exclusively through the capacitive path (C T ) formed by the load (C LOAD ) and stray (C pin ) capacitors in series, given by C T = C LOAD C pin /(C LOAD + C pin ). This allows the reduction of the entire equivalent circuit to a voltage divider, as shown in Figure 3b, and is only valid for measuring the impulse response. Thus, V A0 must be read immediately after defining P A0 to floating input and P A1 to high output.

Pseudo-code:
One approach to find the load capacitance is through the analysis of the charge level (Q) of the circuit. Since both C LOAD and C pin are in series, the charge level must be equal in both capacitances (Q LOAD = Q pin ), thus allowing the expression of V A0 as: where the solution given by Equation (3) assumes Q LOAD = C LOAD (V S − V A0 ) and Q pin = C pin V A0 . Rearranging (3), C LOAD is found as: The size of C pin is made available through the datasheet of the micro-controller, and is typically 25 pF, while vs. is equal to the reference voltage source (V REF ), and V A0 is the measured voltage at port P A0 . Thus, all parameters are known, and C LOAD can be determined. Lastly, the fast acquisition mode methodology is limited by the size of the C pin , such that, if V A0 → N max , the maximum range of (4) is an asymptote with C LOAD → ∞. Therefore, an approximation to determine the range of measurable C LOAD is: where the total range is obtained for 1 ≤ N A0 < N max − 1. The pseudo-code for a routine to measure C LOAD through the fast acquisition mode is described in Figure 3c.

Transient Acquisition Mode of an Isolated Load Capacitance
As pointed out before, the fast-acquisition mode methodology has limitations for large capacitances, thus requiring a different measurement strategy, namely monitoring the transient during the charging cycle of a C LOAD bridging the ports P A0 and P A1 in the equivalent circuit shown in Figure 1f. The stray capacitances (C pin ) are not larger than some tens of pico-Farads (pF) and can therefore be neglected.
The remaining circuit analysis is simpler and is preferably done using the impedance analysis. Figure 4a shows the impedance representation of the equivalent circuit, where Z in represents the impedance due to the pull-up resistance (R pu ) at the input port P A0 , and Z out is the output impedance formed by the parallel RC network between the analog input resistance (R AIN ) and the series RC network (Z LOAD + R out ). Z LOAD is the impedance representation of the load capacitance (C LOAD ). Therefore, an estimation of C LOAD is obtained using the step response of the impedance divider circuit shown in Figure 4b, which is given by: where R T is the total resistance path contributing for the potential difference on the capacitance terminals given by R T = R AIN || R pu + R out . Thus, C LOAD can be found at any time t by rearranging Equation (6) to: where t is the time since starting the charging of the capacitance. All parameters in Equation (7) are known except for the time (t). Thus, to find the C LOAD value, the elapsed time (∆t) must be determined, since t = 0 until a threshold voltage (V th ) is reached. For instance, solving Equation (6) with t = τ allows the definition of V th = (1 − e −1 )V S and therefore solves Equation (7). The elegant procedure for testing V th makes use of the built-in transistor-transistor logic (TTL) unit to monitor V A0 by setting the TTL unit high voltage threshold (V IH ) to the V th (V th = V IH ), allowing not only the avoidance of the computation of the V th , but also the enhancement of the accuracy of the measurement. In practical terms, the elapsed time (∆t) since C LOAD initiates the charging cycle (t = 0) until the TTL unit changes to the logical state high '1' (V A1 ≥ V IH ) must be measured, as well as proceeding to the reading of V A0 using the ADC unit (N A0 ). Then, C LOAD is found by replacing V A0 and t by the measured values of N A0 and ∆t in Equation (7). Figure 4c depicts the voltage step response of the impedance divider circuit. The highlighted region delimited between the voltage level V IH and vs. represents the operation region where the TTL logic unit changes of logic state low '0' to high '1'. For reference, Table 1 includes the typical values of V IH for the ATmega328P and ATmega32U4 micro-controllers.
Sensors 2022, 22, x FOR PEER REVIEW solving Equation (6) with t = τ allows the definition of Vth = (1 − e −1 )VS and therefore Equation (7). The elegant procedure for testing Vth makes use of the built-in tran transistor logic (TTL) unit to monitor VA0 by setting the TTL unit high voltage thre (VIH) to the Vth (Vth = VIH), allowing not only the avoidance of the computation of th but also the enhancement of the accuracy of the measurement. In practical term elapsed time (Δt) since CLOAD initiates the charging cycle (t = 0) until the TTL unit ch to the logical state high '1' (VA1 ≥ VIH) must be measured, as well as proceeding reading of VA0 using the ADC unit (NA0). Then, CLOAD is found by replacing VA0 an the measured values of NA0 and Δt in Equation (7). Figure 4c depicts the voltage st sponse of the impedance divider circuit. The highlighted region delimited betwe voltage level VIH and vs. represents the operation region where the TTL logic unit ch of logic state low '0' to high '1'. For reference, Table 1 includes the typical values of V the ATmega328P and ATmega32U4 micro-controllers. Additionally, the transient acquisition mode methodology is limited by the c teristic time constant (τ) of the circuit, such that if τ → 0, the charging velocity (dv the CLOAD increases to proportions where high temporal resolution is required to me the NA0 accurately, since NA0 → Nmax just before the first reading is taken, causing the unit to overflow. An approximation of the ranging limits of the transient acquisition is given by: where in Equation (8) the lower and upper resolution of the ADC unit (NA0) are s assuming 1 ≤ NA0 ≤ Nmax − 1. Using the typical values provided in Table 1, the detection of the interface assuming the fastest reading of the ADC unit could be achieved aft clock-cycle (Δt = 62.5 ns). Then, the minimum range of the transient acquisition m varies between 214 fF ≤ Cmin ≤ 392 fF with 22.4 kΩ ≤ Rpu ≤ 41.6 kΩ. Nevertheless, the i of the stray capacitances (Cpin) was neglected, and therefore such a range is merely ative, since Cpin ≫ Cmin. As for the maximum range of the transient acquisition metho maximum Δt is limited by the size of the unsigned long variables given by Δt = (2 32 1 µs ≅ 4295 s. Thus, the maximum range corresponds to a battery-like storage unit than a capacitor, as it is some hundreds of farads. The pseudo-code of a routine to pe Set port P A0 and P A1 to LOW OUTPUT Wait 1 millisecond: delay (1) Set port P A0 to INPUT PULLUP Read timer: TS measures microseconds do Sample digital port P A0 : NA0 measures V A0 while (NA0 == 0) Read timer: TE measures microseconds Sample port P A0 : NA0 measures V A0 Determine elapsed time (Δt): T = TE -TS C LOAD is given by Eq. (7): Replace V A0 by NA0 t by T Additionally, the transient acquisition mode methodology is limited by the characteristic time constant (τ) of the circuit, such that if τ → 0, the charging velocity (dv/dt) of the C LOAD increases to proportions where high temporal resolution is required to measure the N A0 accurately, since N A0 → N max just before the first reading is taken, causing the ADC unit to overflow. An approximation of the ranging limits of the transient acquisition mode is given by:

Pseudo-code:
where in Equation (8) the lower and upper resolution of the ADC unit (N A0 ) are solved assuming 1 ≤ N A0 ≤ N max − 1. Using the typical values provided in Table 1, the detection limit of the interface assuming the fastest reading of the ADC unit could be achieved after one clock-cycle (∆t = 62.5 ns). Then, the minimum range of the transient acquisition method varies between 214 fF ≤ C min ≤ 392 fF with 22.4 kΩ ≤ R pu ≤ 41.6 kΩ. Nevertheless, the impact of the stray capacitances (C pin ) was neglected, and therefore such a range is merely indicative, since C pin C min . As for the maximum range of the transient acquisition method, the maximum ∆t is limited by the size of the unsigned long variables given by ∆t = (2 32 − 1) × 1 µs ∼ = 4295 s. Thus, the maximum range corresponds to a battery-like storage unit rather than a capacitor, as it is some hundreds of farads. The pseudo-code of a routine to perform the measurement of C LOAD through the transient acquisition mode is described in Figure 4c.

Measurements of a Serial RC Network (RC-Meter Mode)
Considering that in the equivalent circuit shown in Figure 1f, Z LOAD is composed by a series RC network, the strategy to extract C LOAD and R LOAD resembles the previously described techniques to measure a pure resistor in Section 2.4 and a pure capacitor through the transient acquisition mode in Section 2.5.2. However, the TTL-based technique used to determine C LOAD cannot guarantee that a TTL transition will occur in the transient response of the circuit, since the voltage V A0 might start at a value above the TTL threshold (V IH ). Instead, the monitoring process of the transient response must be carried out exclusively using the analog functions available on the AVR ® micro-controller ports. First, the C LOAD must be completely discharged, which requires defining both ports P A0 and P A1 to low output configuration for a reasonable time, and then defining P A0 to a highimpedance SMU, while maintaining P A1 as low output. For the sake of simplicity, the stray capacitances (C pin ) are neglected, which is allowed if they are not larger than some tens of pico-farads (pF).
With C LOAD fully discharged, after setting the port P A0 to a high-impedance SMU (t = 0), a voltage step is applied on the serial RC circuit. Since C LOAD is empty, it behaves as a short-circuit, which results in an equivalent circuit, as shown in Figure 2a, thus allowing the extraction of the R LOAD value through use of the technique described in Section 2.4 to measure a pure resistor (note that the port configuration is the same). The measured voltage (V A0 ) at the instant t = 0 defines an offset voltage (V R ). For any instant t > 0, C LOAD starts to accumulate charge, and the same circuit analysis described in Section 2.5.2 applies to determine the transient dynamics of the voltage step response. For t → ∞, C LOAD is fully charged and behaves as an open circuit, thus forcing the current to flow exclusively through the analog input resistance (R AIN ), as represented in Figure 1f by the current path 'i R '. Thus, considering the influence of the charging current (i L ) due to the series R LOAD , an estimation of C LOAD is obtained using the step response of the equivalent circuit shown in Figure 1f that is given by: where V R is the offset voltage due to the series R LOAD , V REF is the new reference voltage of the circuit given by V REF = vs. − V R , τ is the characteristic time constant of the equivalent circuit given by the τ = R T C LOAD and R T is the total resistance path contributing to the potential difference on the capacitance terminals given by R T = R AIN || R pu + R LOAD + R out . Thus, C LOAD can be found at any time t by rearranging Equation (9) to: where t is the time that takes charges to accumulate in the capacitance. Figure 5a illustrates the transient response to a voltage step expressed by Equation (10), where the highlighted region consists of the offset voltage (V R ) due to the bridge of ports P A0 and P A1 with the serial RC network. As for the reading capacitance voltage level (V C ) it is determined when t = τ = R T C LOAD , and is given by . Therefore, all parameters in Equation (10) are known except for the time (t). To extract C LOAD , a routine to determine the elapsed time (∆t) until the measured voltage (V A1 ) is greater than or equal to V C (V A0 ≥ V C ) must be implemented. Figure 5b depicts the pseudo-code of a routine to implement the measurement of a serial RC network. In practical terms, C LOAD is found by replacing in Equation (10) V R with the measured value of N A0 at t = 0 (N R ), vs. with the maximum resolution of the ADC unit (N max ) and V A0 and t with the measured value of N A0 and ∆t after V A0 ≥ V C , respectively.

Measurements of a Parallel RC Network (RC-Meter Mode)
Considering that in the equivalent circuit shown in Figure 1f, ZLOAD is composed of a parallel RC network (CLOAD║RLOAD), the strategy to extract CLOAD and RLOAD resembles the previously described technique in Section 2.6, although it must be noted that the change of the load capacitance (CLOAD) from serial mode to parallel mode causes RLOAD to saturate at the reference voltage (VF = VR) level when t → ∞ and the voltage offset is null at t = 0. Thus, the step response of the equivalent circuit shown in Figure 1f is given by: where VF is given by the expression of VR that is defined in Equation (9), τ is the characteristic time constant of the equivalent circuit given by τ = RTCLOAD and RT is the total resistance path given by RT = (RAIN || Rpu) || (RLOAD + Rout). Figure 6a illustrates the transient response to a voltage step expressed by Equation (11). For t → ∞, CLOAD is fully charged and behaves as an open circuit, forcing the current (iL) represented in the equivalent circuit shown in Figure 1f to flow exclusively through the RLOAD to the ground. Therefore, the extraction of RLOAD is analytically indeterminate, unless an approximation is made, such as, considering for any period (Δt) larger than five times the characteristic time constant (τ) (Δt > 5τ), Equation (11) is approximately equal to ) ≈ 0.993 shows that the approximation has a maximum error of 0.7% when determining the RLOAD value. Thereby, assuming for any Δt > 5τ the plateau VA0 = VF is reached, the RLOAD value is obtained using the technique described in Section 2.4 to measure a pure resistor, replacing in Equation (2) VA0 by VF, where VF is the measured voltage for any instant Δt > 5τ. The next step is to determine the CLOAD value through the arrangement of Equation (11) with τ = RTCLOAD by: where t is any instant of the step-response and VA0 the correspondent measured voltage. The determination of VF is critical to find both CLOAD and RLOAD values. The simplest approach to find VF using the transient response to a voltage step is to define the maximum characteristic time constant (τmax) to measure. In these circumstances all parameters are (a) Set port P A0 and P A1 to LOW OUTPUT Wait 1 millisecond: delay (1) Set port P A0 to INPUT PULLUP Sample port P A0 : VR measures V A0 Read timer: TS measures microseconds Define stop condition:

Measurements of a Parallel RC Network (RC-Meter Mode)
Considering that in the equivalent circuit shown in Figure 1f, Z LOAD is composed of a parallel RC network (C LOAD R LOAD ), the strategy to extract C LOAD and R LOAD resembles the previously described technique in Section 2.6, although it must be noted that the change of the load capacitance (C LOAD ) from serial mode to parallel mode causes R LOAD to saturate at the reference voltage (V F = V R ) level when t → ∞ and the voltage offset is null at t = 0. Thus, the step response of the equivalent circuit shown in Figure 1f is given by: where V F is given by the expression of V R that is defined in Equation (9), τ is the characteristic time constant of the equivalent circuit given by τ = R T C LOAD and R T is the total resistance path given by R T = (R AIN || R pu ) || (R LOAD + R out ). Figure 6a illustrates the transient response to a voltage step expressed by Equation (11). For t → ∞, C LOAD is fully charged and behaves as an open circuit, forcing the current (i L ) represented in the equivalent circuit shown in Figure 1f to flow exclusively through the R LOAD to the ground. Therefore, the extraction of R LOAD is analytically indeterminate, unless an approximation is made, such as, considering for any period (∆t) larger than five times the characteristic time constant (τ) (∆t > 5τ), Equation (11) is approximately equal to shows that the approximation has a maximum error of 0.7% when determining the R LOAD value. Thereby, assuming for any ∆t > 5τ the plateau V A0 = V F is reached, the R LOAD value is obtained using the technique described in Section 2.4 to measure a pure resistor, replacing in Equation (2) V A0 by V F , where V F is the measured voltage for any instant ∆t > 5τ. The next step is to determine the C LOAD value through the arrangement of Equation (11) with τ = R T C LOAD by: where t is any instant of the step-response and V A0 the correspondent measured voltage. The determination of V F is critical to find both C LOAD and R LOAD values. The simplest approach to find V F using the transient response to a voltage step is to define the maximum characteristic time constant (τ max ) to measure. In these circumstances all parameters are known, and both C LOAD and R LOAD values can be measured using Equations (2) and (10). Figure 6b depicts the pseudo-code of a routine to implement the measurement of a parallel RC network. known, and both CLOAD and RLOAD values can be measured using Equations (2) and (10). Figure 6b depicts the pseudo-code of a routine to implement the measurement of a parallel RC network.

Measurements of an Isolated Load Inductance (L-Meter Mode)
Considering that in the equivalent circuit shown in Figure 1f, ZLOAD is composed of an isolated load inductance (LLOAD), and that for the sake of simplicity, the stray capacitances (Cpin) are neglected, which is allowed if they are not larger than some tens of picofarads (pF), the circuit analysis is simpler than and preferable to using the impedance analysis. Figure 7a shows the impedance representation of the equivalent circuit, where Zin represents the impedance due to the pull-up resistance (Rpu) at the input port PA1, and Zout is the output impedance formed by the parallel RC network between the analog input resistance (RAIN) and the series RC network (ZLOAD + Rout). ZLOAD is the impedance representation of the load inductance (LLOAD), given by ZLOAD = jωLLOAD. Therefore, an estimation of LLOAD is obtained using the step response of the impedance divider circuit shown in Figure 7a, which is given by: where RT is the total resistance path contributing to the potential difference on the inductance terminals given by RT = RAIN || Rpu + Rout. Thus, LLOAD can be found at any time t by rearranging Equation (13) to: where t is the time that takes charges to accumulate in the inductance. Except for the time (t), all parameters in Equation (14) are known and available in Table 1. Therefore, the strategy to solve the time (t) of Equation (14) requires a similar approach, as previously described for the measurement of an isolated capacitance through the transient response.
Pseudo-code: Define highest time constant (τ) to be measured: tau Determine time (Δt) until threshold voltage (V F ): T = 5 × tau Set port P A0 and P A1 to LOW OUTPUT Wait 1 millisecond:

Measurements of an Isolated Load Inductance (L-Meter Mode)
Considering that in the equivalent circuit shown in Figure 1f, Z LOAD is composed of an isolated load inductance (L LOAD ), and that for the sake of simplicity, the stray capacitances (C pin ) are neglected, which is allowed if they are not larger than some tens of pico-farads (pF), the circuit analysis is simpler than and preferable to using the impedance analysis. Figure 7a shows the impedance representation of the equivalent circuit, where Z in represents the impedance due to the pull-up resistance (R pu ) at the input port P A1 , and Z out is the output impedance formed by the parallel RC network between the analog input resistance (R AIN ) and the series RC network (Z LOAD + R out ). Z LOAD is the impedance representation of the load inductance (L LOAD ), given by Z LOAD = jωL LOAD . Therefore, an estimation of L LOAD is obtained using the step response of the impedance divider circuit shown in Figure 7a, which is given by: where R T is the total resistance path contributing to the potential difference on the inductance terminals given by R T = R AIN || R pu + R out . Thus, L LOAD can be found at any time t by rearranging Equation (13) to: where t is the time that takes charges to accumulate in the inductance. Except for the time (t), all parameters in Equation (14) are known and available in Table 1. Therefore, the strategy to solve the time (t) of Equation (14) requires a similar approach, as previously described for the measurement of an isolated capacitance through the transient response. In this case, it must be monitored when the threshold voltage (V th ) over L LOAD is approximately equal to V th = V S ·(1 − e −1 ). As for the isolated capacitance measurement described in Section 2.5.2, the elegant and simpler procedure for testing V th , involves making use of the built-in transistor-transistor logic (TTL) unit to monitor V A0 by setting the TTL unit low voltage threshold (V IL ) the V th (V th = V IL ). In practical terms, the elapsed time (∆t) since L LOAD initiates the cycle (t = 0) until the TTL unit changes to the logical state low '0' (V A0 ≤ V IL ) must be measured, proceeding afterwards to the reading of V A0 using the ADC unit (N A0 ). Then, L LOAD is found by replacing V A0 and t with the measured values of N A0 and ∆t in Equation (14). Figure 7b depicts the voltage step response of the impedance divider circuit. The highlighted region delimited between the voltage level V IL and vs. represents the operation region where the TTL logic unit changes of logic state high '1' to low '0'. In this case, it must be monitored when the threshold voltage (Vth) over LLOAD is approximately equal to Vth = VS⸱(1 − e -1 ). As for the isolated capacitance measurement described in Section 2.5.2, the elegant and simpler procedure for testing Vth, involves making use of the built-in transistor-transistor logic (TTL) unit to monitor VA0 by setting the TTL unit low voltage threshold (VIL) the Vth (Vth = VIL). In practical terms, the elapsed time (Δt) since LLOAD initiates the cycle (t = 0) until the TTL unit changes to the logical state low '0' (VA0 ≤ VIL) must be measured, proceeding afterwards to the reading of VA0 using the ADC unit (NA0). Then, LLOAD is found by replacing VA0 and t with the measured values of NA0 and Δt in Equation (14). Figure 7b depicts the voltage step response of the impedance divider circuit. The highlighted region delimited between the voltage level VIL and vs. represents the operation region where the TTL logic unit changes of logic state high '1' to low '0'. The measurement range of the inductance is limited due to the ADC unit resolution, where the technique described above to monitor the transient response to a voltage step is limited by the characteristic time constant (τ) of the circuit, such that if τ → 0, the charging current velocity (di/dt) of the LLOAD decreases to such proportions that accurately measuring the NA0 requires high temporal resolution, since NA0 → 0 just before the first reading is taken, causing the ADC unit to overflow. An approximation of the ranging limits of the transient acquisition mode is given by: where in Equation (15)   The measurement range of the inductance is limited due to the ADC unit resolution, where the technique described above to monitor the transient response to a voltage step is limited by the characteristic time constant (τ) of the circuit, such that if τ → 0, the charging current velocity (di/dt) of the L LOAD decreases to such proportions that accurately measuring the N A0 requires high temporal resolution, since N A0 → 0 just before the first reading is taken, causing the ADC unit to overflow. An approximation of the ranging limits of the transient acquisition mode is given by: where in Equation (15)  provided in Figure 7c to implement the measurements of an isolated L LOAD through the transient acquisition mode built-in AVR ® micro-controllers.

Data Acquisition and Analysis
The open-source Arduino ® IDE software was used to program and upload the scripts on the AVR ® micro-controllers. All routines that were programmed to perform the measurements of the RCL-meter are based on the pseudo-codes previously described in each method. The data acquisition was carried out with the serial interface made available on the Arduino ® IDE software. The collected data were handled with MATLAB ® to perform the data analysis. All measurements were performed at room temperature, about 25 • C.

Noise and Uncertainty of the Measurements
To achieve the highest measurement accuracy of the RCL parameters, the parasitic capacitances must be minimized by leaving a space of two analog pins between the measured ports, e.g., ports P A0 and P A3 , and shorten the connection cables to a minimum size.
Additionally, the impact of noise sources in the measurements must be considered. This includes the thermal and 1/f contributions, which are not easily modelled, but are included in the global noise measurements. The measured noise of the voltage source (∆V n ) was 6.7 mV (with the Arduino board powered through the USB interface connected to a local-PC), comparable to the digitalization uncertainty of the ADC (5 mV) described below. This value permits an enhancement of the accuracy of the ADC unit by oversampling techniques. This shows that the digitalization dominates over thermal and 1/f noise contributions. Thus, in this analysis we only calculate the effect of digitalization uncertainty. Using the default ADC sampling time of 100 µs, the digitalization uncertainty of a 10-bit ADC unit relative to the reference voltage (V REF ) of 5 V, the least significant bit (LSB) voltage is 4.9 mV. To analyze the impact of this digitalization uncertainty, the relative uncertainty (u r ) associated with the analog to digital round off was determined as: where f (N) represents one of the previous Equations (2), (4), (7), (10), (12) and (14) used to determine the R LOAD , C LOAD and L LOAD values. Then, the oversampling technique allow for reducing the digitalization uncertainty (u r ) by a factor of 1/N but limited by other sources of uncertainty (noise).

Relative Accuracy and Precision of the Measurements
The errors associated with the accuracy and precision of the measurements were analyzed through the relative accuracy (a r ) and the relative precision (p r ). The relative precision (p r ) measures the dispersion of the measured impedance values (Z meas ) normalized to their average (Z meas ) and was estimated by p r = SD(Z meas )/Z meas , where SD represents the standard deviation of the measured values. The relative accuracy (a r ) measures the closeness of the measured Z meas to the true or reference value, Z nominal , and was estimated by a r = |Z meas − Z nominal |/Z nominal.

Linearization of the ADC Unit
Work was done to improve the linearization of the ADC unit output. By linearization is here meant the maximization of the correlation between measured and nominal values, which depends on the correct knowledge of the micro-controller's parameters. Since all methods presented previously to measure an unknown load impedance (Z LOAD ) use the same ports configuration (except for the measurements of an isolated load capacitance using the fast acquisition mode), the simplest method to optimize the linearization of the measurements is to replace Z LOAD with a pure known load resistance (R LOAD ) and use different resistor sizes to test and maximize the range and accuracy of the ADC unit. Then, Equation (2) must be used as a fitting function, where the R LOAD values must be replaced by the nominal values provided by the manufacturer of the resistor, and V A0 and vs. by the ADC unit values. Figure 8a shows the N A0 values collected with through-hole resistors bridging two ports of the micro-controllers. All samples consist of an average of 100 consecutive measurements. The data were distributed in a logarithmic scale along the horizontal axis according to the nominal resistance value provided by the manufacturer. The red triangles represent the samples measured with the ATmega328P and the blue circles represent the ATmega32U4. Ordinary Least Squares (OLS) were used to fit the data shown in Figure 8a, but with a small twist, which consisted of applying the natural logarithm (ln) to the OLS objective fit function and to the measured N A0 values. This proved able to cope better with the large range of resistance values, encompassing several orders of magnitude. Then, to extract the optimized values of R AIN , R out and R pu , the user must provide a guess estimation and use a nonlinear programming solver to find the minimum values of the OLS objective function around the estimated values, taken from the manufacturer datasheets. Table 2 shows the extracted values of R AIN , R out and R pu for both ATmega328P and ATmega32U4 AVR ® micro-controllers used in the current work. measurements is to replace ZLOAD with a pure known load resistance (RLOAD) and use different resistor sizes to test and maximize the range and accuracy of the ADC unit. Then, Equation (2) must be used as a fitting function, where the RLOAD values must be replaced by the nominal values provided by the manufacturer of the resistor, and VA0 and vs. by the ADC unit values. Figure 8a shows the NA0 values collected with through-hole resistors bridging two ports of the micro-controllers. All samples consist of an average of 100 consecutive measurements. The data were distributed in a logarithmic scale along the horizontal axis according to the nominal resistance value provided by the manufacturer. The red triangles represent the samples measured with the ATmega328P and the blue circles represent the ATmega32U4. Ordinary Least Squares (OLS) were used to fit the data shown in Figure 8a, but with a small twist, which consisted of applying the natural logarithm (ln) to the OLS objective fit function and to the measured NA0 values. This proved able to cope better with the large range of resistance values, encompassing several orders of magnitude. Then, to extract the optimized values of RAIN, Rout and Rpu, the user must provide a guess estimation and use a nonlinear programming solver to find the minimum values of the OLS objective function around the estimated values, taken from the manufacturer datasheets. Table 2 shows the extracted values of RAIN, Rout and Rpu for both ATmega328P and ATmega32U4 AVR ® micro-controllers used in the current work. The black dashed line represents the relative uncertainty (u r ) of the R LOAD measurements according to Equation (16). The white and grey shading areas highlight the levels of u r , a r and p r better than 5%, 10% and 20%. A legend to describe the color scheme used in all plots of Figure 8 was included. Figure 8a shows the ADC readings as a function of the nominal ADC values. Actual values for both ATmega328P and ATmega32U4 micro-controllers are represented by symbols, and the corresponding fitted lines from Equation (2) (overlapped) in dashed green. The figure inset provides a closer view of the measured samples between 0.5 Ω to 10 Ω. The fitted parameters allow a broad working range of about 8 orders of magnitude for the measured resistance. Otherwise, using typical values provided by the manufacturer would result in a working range of only 2 orders of magnitude. This procedure was performed only once and the values obtained for R AIN , R out and R pu were used in all the subsequent measurements. Table 2. Optimized values of the R AIN , R out , R pu and C pin for both ATmega328P and ATmega32U4 AVR ® micro-controllers.

ATmega328P
ATmega32U4 Likewise, the same fitting analysis previously described was used to optimize the value of C pin , which is required to perform measurements of an isolated load capacitance through the fast acquisition mode. In this case, through-hole capacitors of different sizes were used to bridge two I/O ports of the micro-controller, and Equation (4)     Likewise, the same fitting analysis previously described was used to optimize the value of Cpin, which is required to perform measurements of an isolated load capacitance through the fast acquisition mode. In this case, through-hole capacitors of different sizes were used to bridge two I/O ports of the micro-controller, and Equation (4) Figure 9. Comparison between the ATmega328P and ATmega32U4 AVR ® micro-controllers configured to record an isolated load capacitance (C LOAD ) through the fast acquisition mode. (a) Measured ADC values at port P A0 (N A0 ). Each ADC sample consists of an average of 100 consecutive measurements. (b) Measured load capacitance (C LOAD ) given by Equation (4). The green dashed lines represent the theoretical lines. (c) Relative accuracy (a r ) and (d) relative precision (p r ) of the measurements in function of C nominal . The black dashed line represents the relative uncertainty (u r ) of the C LOAD measurements according to Equation (16). The white and grey shading areas highlight the levels of u r , a r and p r better than 5%, 10% and 20%. A legend to describe the color scheme used in all plots of Figure 9 was included.

Results
Commercial through-hole resistors and capacitors in the ranges 0.5 Ω-80 MΩ and 100 Ff-4.7 mF (±5%), respectively, were used to perform measurements of either isolated or in series and parallel electrical components with the AVR ® micro-controllers. The capacitances in the fF range were of SMD type (Kyocera AVX, Fountain Inn, SC, USA), and all capacitances above 1 µF were aluminum electrolyte capacitor type. The validations were made by comparing the measurements results with the components' nominal values. In all cases, each data point corresponds to the average of 100 measurements performed in a continuous loop.

Characterization of Isolated Resistance Measurements
The resistance measurements were performed with a set of resistors independent of those used to linearize the ADC. Using the methodology described in Section 2.4, the voltages at port P A0 (V A0 ) were recorded with the ADC unit (N A0 ), and the measurements were inserted in Equation (2), to obtain the R LOAD values shown in Figure 8b. This figure also includes the same resistances measurements recorded with a commercial instrument, the Fluke 8840A multimeter (Fluke Corporation, Everett, WA, USA), for reference and validation. These are excellent results for a low-cost technique. However, it is important to keep in mind that each individual point is the average of 100 consecutive measurements, performed in a loop. Table 3 provides numeric detail on the data shown in Figure 8b.  Figure 8c shows the relative accuracy (a r ) of the measurements as a function of the nominal resistance, as defined in Section 2.11. Figure 8d shows their relative precision, p r , also defined in Section 2.11 (data points), and the estimated upper limit for the relative uncertainty caused by the digitalization round-off error, u r , defined in Equation (16) and represented by the dashed line. Note that the standard deviations are calculated on samples that are already averages of 100 points, which means that u r should be divided by 10, for a correct comparison with p r . Both plots include white and grey shading regions to highlight the levels of a r and p r better than 5%, 10% and 20%. The two plots show better performance of the method in the intermediate resistance range and its degradation in the regime of very low or very high resistances. This is because the lower and upper limits for R LOAD correspond to N A0 tending to the higher (N max ) and lower (≈0) values of the digital output, respectively, where the roundoff errors introduced by digitalization become more important, affecting both precision and accuracy.
Most of the data points lay below the u r curve. This is because u r is merely an upper limit for the digitalization noise, which is actually lower. In any case, the plot indicates that the main uncertainty source in the determination of resistance is the digitalization roundoff.
In terms of performance, the ATmega32U4 delivers better results. The range defined by p r < 5% is approximately 10 Ω-10 MΩ for the ATmega328P and 10 Ω-80 MΩ for the ATmega32U4, while the range defined by a r < 5% is 100 Ω-100 kΩ for the ATmega328P and 100 Ω-10 MΩ for the ATmega32U4.
The sensitivity of the R-meter (minimum detectable increment in resistance) was assessed at a representative value of 1 kΩ, as well at increments of 0.5, 1 and 4.7 Ω. 50 measurements were acquired at each resistance value. The average of the 50 ADC counts were plotted against the resistance values and a local slope ADC counts/Ω was determined. The standard deviations of the 4 measurements were also calculated and averaged to get a typical value. A conservative estimative of the sensitivity was then performed by calculating the increase in resistance needed to shift the ADC count by two standard deviations, which was about 1.2 Ω or 0.1% of the nominal value. Additionally, a student t-test analysis was performed by comparing all the 4 datasets of 50 measurements against each other to conclude that they were all different (p < 0.05). This suggested that even an increment of 0.5 Ω is enough to change the output of the R-meter, which is about 2 times less than the previous conservative estimate.

Characterization of Isolated Capacitance Measurements: Fast Acquisition Method
Using the methodology described in Section 2.5.1 with different commercial capacitors varying from 100 fF to 100 nF, measurements of the voltage at port P A0 (V A0 ) were recorded with the ADC unit (N A0 ) and shown in Figure 9a. Figure 9a also includes a green dashed line that represents the theoretical lines for the two micro-controllers (overlapped), obtained from Equation (3) with the fitted C pin values shown in Table 2. The measured N A0 and fitted C pin values were replaced in Equation (4) to determine the load capacitance (C LOAD ), shown in Figure 9b. At the end of Section 3.2, Table 4 was included, providing numeric detail on the data shown in Figure 9b. For reference and validation, this plot also includes the measurements recorded with two commercial instruments, the BK Precision 890C capacitance meter (B&K Precision Corporation, Yorba Linda, CA, USA) and the Fluke PM6304 impedance meter (Fluke Corporation, Everett, WA, USA) at the lowest frequency available (f = 50 Hz). The green dashed line is C LOAD = C nominal , showing that the C LOAD values determined by both micro-controllers match the target values within the range 100 Ff-10 nF, thus achieving a range of about 5 orders of magnitude. Figure 9c,d allow a more detailed view of the quality of this match and display a r , p r and u r (in the same way as in Figure 8c,d). The accuracy a r drops significantly above 10 nF because the voltage drop at the load capacitance tends towards the circuit voltage source (N A0 → N max ), as predicted by Equation (5), inducing large errors in the determination of C LOAD . This is evidenced in the u r curve represented (black dashed line in Figure 9d), showing the same V-shaped distribution u r , as described in Figure 8d, for the resistance measurement. The overlap between u r and p r means that the main source of variability is the digitalization noise, to which the fast C-meter adds almost no contribution. The sensitivity estimates were performed according to the same lines described in Section 3.1, this time for the representative values of 18 pF and 22 pF, with small increments of 1, 1.2 and 1.5 pF. The sensitivity was estimated to be about 10-20 fF in both cases. The student t-test analysis also concluded that all the capacitance measurement datasets were different from each other (p < 0.05).

Characterization of Isolated Capacitance Measurements: Transient Acquisition Method
The capacitance meter in the transient mode was tested according to the methodology described in Section 2.5.2 with different commercial capacitors ranging from 100 pF to 4.7 mF. The transient acquisition mode requires waiting until the TTL logic unit returns '1' and the elapsed time (∆t) until that transition. The measurements of port P A0 (N A0 ), taken at the transition and the corresponding elapsed time (∆t) are shown in Figure 10a.
The upper graph shows N A0 as symbols. Note that by definition these N A0 readings correspond to TTL parameter V IH -High-Level Input Voltage (because they are acquired at the transition). The same graph shows that the lower the capacitance, the higher the V IH of the TTL unit. This aspect is consistent with the expected operation mode of the TTL unit. In fact, the TTL unit uses the output high-level current (i HL ) as a test condition, thence, as C LOAD → C pin , the more leakage current flows through C LOAD , leading to a non-constant V IH . It should be remarked that the inconstancy of the threshold does not represent a problem for the application of Equation (7), since it only requires a given time and the associated reading V A0 . V IH stabilizes above 22 nF because in that range i HL remains essentially undisturbed. This allows the estimation of the "basal" V IH (∆N A0 ) averaging the values of N A0 at the transition for all samples above 22 nF, specifically ∆N A0 ∼ = 536 for the ATmega328P and ∆N A0 ∼ = 331 for the ATmega32U4, which are represented by the green dashed lines. The measured values of ∆N A0 are consistent with the typical values described in Table 1. Measured load capacitance (CLOAD) given by Equation (7). The green dashed lines represent the theoretical lines. (c) Relative accuracy (ar) and (d) relative precision (pr) of the measurements in function of Cnominal. The black dashed line represents the relative uncertainty (ur) of the CLOAD measurements according to Equation (16). The white and grey shading areas highlight the levels of ur, ar and pr better than 5%, 10% and 20%. A legend to describe the color scheme used in all plots of Figure 10 was included.
The upper graph shows NA0 as symbols. Note that by definition these NA0 readings correspond to TTL parameter VIH-High-Level Input Voltage (because they are acquired at the transition). The same graph shows that the lower the capacitance, the higher the VIH of the TTL unit. This aspect is consistent with the expected operation mode of the TTL unit. In fact, the TTL unit uses the output high-level current (iHL) as a test condition, thence, as CLOAD → Cpin, the more leakage current flows through CLOAD, leading to a non-constant VIH. It should be remarked that the inconstancy of the threshold does not represent a problem for the application of Equation (7), since it only requires a given time and the associated reading VA0.
VIH stabilizes above 22 nF because in that range iHL remains essentially undisturbed. This allows the estimation of the "basal" VIH (ΔNA0) averaging the values of NA0 at the transition for all samples above 22 nF, specifically ΔNA0 ≅ 536 for the ATmega328P and ΔNA0 ≅ 331 for the ATmega32U4, which are represented by the green dashed lines. The measured values of ΔNA0 are consistent with the typical values described in Table 1 (7). The green dashed lines represent the theoretical lines. (c) Relative accuracy (a r ) and (d) relative precision (p r ) of the measurements in function of C nominal . The black dashed line represents the relative uncertainty (u r ) of the C LOAD measurements according to Equation (16). The white and grey shading areas highlight the levels of u r , a r and p r better than 5%, 10% and 20%. A legend to describe the color scheme used in all plots of Figure 10 was included.
The measured elapsed time (∆t) shown in the bottom graph of Figure 10a closely matches the green dashed line, which represents the characteristic time constant τ = R T C LOAD , where R T = R AIN || R pu + R out . The linearity still holds in spite of a non-constant V IH due to the role of i HL , since the leakage current is also determined by the RC constant of the circuit. The RT values differ only slightly for the two micro-controllers (R T ∼ = 35 kΩ for ATmega328P and R T ∼ = 37 kΩ for ATmega32U4), causing overlap of the corresponding time constant lines.
For the smallest capacitances (C LOAD < 1 nF), ∆t tends toward a plateau (∆t min ) given by 12.5 µs for both micro-controllers, because C LOAD → C pin . Thus, the C LOAD values determined with Equation (7), and shown in Figure 10b, are affected by larger errors in the low capacitance range. This is not very apparent in this figure, where the data points seem very close to the green dashed line (C LOAD = C nominal ) because of the logarithmic scale. Still, at the end of Section 3.3, Table 5 provides numeric detail on the data shown in Figure 10b. The plots of a r in Figure 10c illustrate better the difficulties in the low capacitance ranges. The relative accuracy drops significantly (worse than 5%) below 70 nF for the ATmega32U4 and below 10 nF for the ATmega328P. However, both remain, at least, on a 5% accuracy level above those critical values, representing a linear response of the instrument across 6 decades. Figure 10d shows p r (points) and u r (dashed lines). Contrary to the fast C-meter case, here the u r and p r lines are clearly above u r , which means that the method introduces sources of noise other than digitalization. This is probably because variations of some ADC units in the threshold level impact much more the measurement than one ADC unit only, related to the digitalization error. These variations may be caused by the internal noise of the micro-processors. The performance degradation in the low capacitance regime is also evident from this figure.
The sensitivity estimates were performed according to the same lines described in Section 3.1, for the representative value of 1 µF, with small increments of 1.8, 2.2, 2.7, 3.3, 3.9 and 4.7 nF. The sensitivity was estimated to be about 10-20 fF in both cases. The student t-test analysis also concluded that all the capacitance measurement datasets were different from each other (p < 0.05).

Characterization of Measurements for Serial RC Networks
Using different sets of commercial resistors varying in factors of 10, from 10 Ω to 10 MΩ, and capacitors with 2 samples per order of magnitude, from 100 pF to 4.7 mF, seven trials were made to test the methodology described in Section 2.6. Each trial consisted of keeping the R LOAD constant and varying the C LOAD . Figure 11 compiles a total of 14 trials carried out with the two micro-controllers. The white points with red edges represent the data measured with the ATmega328P, and the blue points represent the ATmega32U4. They are mostly overlapped.
This means that all the curves in Figure 11a should be horizontal lines. However, the minimum available acquisition time (ca. 3 µs) is insufficient to capture the initial curve values for CLOAD < 1 µF. Thus, the captured NA0 values at t = 0 tend to Nmax in the limit of very small capacitances. This explains why the (ideal) straight lines become distorted in Figure 11a, especially for lower RLOAD. Likewise, the plateau NA0 (t ≥ τ) = VC is reached for any CLOAD > 100 nF, which hampers the measurements of NA0 after t ≥ τ in this range and induces the same type of distortion in Figure 11b, top. RLOAD and CLOAD were determined through the use of Equations (2) and (10), with the results shown in Figure 11c,d, respectively. The horizontal lines in Figure 11c  The method implies measurement of the port P A0 voltage level (V A0 ) at t = 0 to find the offset voltage (V R ) and at t = ∆t ≥ τ, to find the voltage level V C (defined in Section 2.6). Figure 11a,b show the measured discrete values (N A0 ) at the instants t = 0 and t ≥ τ, respectively, with both micro-controllers. Figure 11b also includes in the bottom graph the measured elapsed time (∆t) until V A1 ≥ V C , together with the theoretical time constants, τ = R T C LOAD . Note that, from Equation (9), N A0 (t = 0) = V R , which is independent of C LOAD . This means that all the curves in Figure 11a should be horizontal lines. However, the minimum available acquisition time (ca. 3 µs) is insufficient to capture the initial curve values for C LOAD < 1 µF. Thus, the captured N A0 values at t = 0 tend to N max in the limit of very small capacitances. This explains why the (ideal) straight lines become distorted in Figure 11a, especially for lower R LOAD . Likewise, the plateau N A0 (t ≥ τ) = V C is reached for any C LOAD > 100 nF, which hampers the measurements of N A0 after t ≥ τ in this range and induces the same type of distortion in Figure 11b, top.
R LOAD and C LOAD were determined through the use of Equations (2) and (10), with the results shown in Figure 11c,d, respectively. The horizontal lines in Figure 11c represent the ideal result, R measured = R LOAD . The measured R LOAD values are unreliable within a domain in the R-C plane approximately defined by R nominal C nominal < 10 −4 s.
As discussed above, the system loses accuracy for smaller values of R LOAD . In fact, when R LOAD (R AIN || R pu ) + R out , then R T = (R AIN || R pu ) + R LOAD + R out ≈ R pu + R out , and the information about R LOAD is lost. For this reason, the higher the R LOAD , the better the accuracy. This observation is valid for both micro-controllers, except for the trials performed with a R LOAD of 10 MΩ since N A0 → N max at t = 0.
The measurements of the elapsed time (∆t), after V A0 ≥ V C , shown in the bottom graph of Figure 11b, exhibit a relative shift in the vertical axis due to the different R LOAD values. Deviations from the straight line are consequence of the excess digitalization uncertainty. This aspect is evidenced after determination of the C LOAD values using Equation (10) and shown in Figure 11d, where the deviations from the black dashed line (C LOAD = C nominal ) relate to the excess digitalization uncertainty.
Overall, there is a trade-off between the R LOAD and C LOAD ranges for best accuracy. There are three extreme regimes: (case 1) R LOAD is large (>1 MΩ), irrespective of the C LOAD value: the accuracy of the measurements is good for the resistance and poor for the capacitance; (case 2) small R LOAD (<100 kΩ) and large C LOAD (>1 nF): measurements with poor accuracy for the resistance, good for the capacitance; (case 3) small R LOAD (<100 kΩ) and small C LOAD (<0.1 nF): measurements with very poor accuracy for the resistance, poor for the capacitance. Outside these extreme regimes, the accuracy is at least acceptable for R LOAD and C LOAD simultaneously.

Characterization of Measurements for Parallel RC Networks
The experimental procedures to perform the characterization of measurements for parallel RC networks were the same as those of the previous section.
For the parallel RC, the saturation voltage (V F ) lies below V S , and it is necessary to determine both V F and τ from the data. There are simple and computationally light algorithms allowing the identification of a stationary plateau, such as that occurring at V F . These have been tested and verified, but including here the description of such methods would increase the length of this report. Thus, the subsequent analysis assumes that τ is already known. No generality is lost with this assumption. Therefore, to each combination of a parallel RC network (R LOAD || C LOAD ) that was measured, the time constant τ was directly assumed as R T C LOAD . The total acquisition time was set to 10τ, V F was read from V A0 at t = 5τ and V C was read from V A0 at t = τ.  Figure 12a,b, respectively. Figure 12c,d show the R LOAD and C LOAD values, which were obtained from Equations (2) and (12), respectively.
The R LOAD values are generally in line with the measurements carried on with isolated resistors shown in Figure 8b, but with few deviations to linearity (at 10 Ω and any C LOAD , for the ATmega328P; at 1 MΩ and C LOAD > 1 µF, for both micro-controllers).
As discussed before, in Section 3.4, a too large minimal acquisition time and/or the excess of digitalization noise are the reason the collected samples deviate from the theoretical lines represented by the horizontal black dashed lines. Similarly, the C LOAD values are in line with the measurements carried on with isolated capacitors shown in Figure 9b. However, the accuracy of the measurements is variable, for the same reasons mentioned above.
Overall, there is a trade-off between the R LOAD and C LOAD ranges for best accuracy. There are two extreme regimes: (case 1) C LOAD is small (<1 µF), and R LOAD is large (<1 kΩ): the accuracy of the measurements is good for the resistance and poor for the capacitance; (case 2) large R LOAD (>1 MΩ) and small C LOAD (<1 µF): measurements with very poor accuracy for the capacitance, and poor for the resistance. Outside these extreme regimes, the accuracy is at least acceptable for R LOAD and C LOAD simultaneously. The RLOAD values are generally in line with the measurements carried on with isolated resistors shown in Figure 8b, but with few deviations to linearity (at 10 Ω and any CLOAD, for the ATmega328P; at 1 MΩ and CLOAD > 1 µF, for both micro-controllers).
As discussed before, in Section 3.4, a too large minimal acquisition time and/or the excess of digitalization noise are the reason the collected samples deviate from the theoretical lines represented by the horizontal black dashed lines. Similarly, the CLOAD values are in line with the measurements carried on with isolated capacitors shown in Figure 9b. However, the accuracy of the measurements is variable, for the same reasons mentioned above.
Overall, there is a trade-off between the RLOAD and CLOAD ranges for best accuracy. There are two extreme regimes: (case 1) CLOAD is small (<1 µF), and RLOAD is large (<1 kΩ): the accuracy of the measurements is good for the resistance and poor for the capacitance; (case 2) large RLOAD (>1 MΩ) and small CLOAD (<1 µF): measurements with very poor accuracy for the capacitance, and poor for the resistance. Outside these extreme regimes, the accuracy is at least acceptable for RLOAD and CLOAD simultaneously.

Discussion and Conclusions
This work described and characterized methods to accurately measure impedance using Arduino ® boards with built-in AVR ® micro-controllers. This is highly remarkable  (2) and (12), respectively. A legend to describe the color scheme used in all plots of Figure 12 was included. The black dashed lines always represent the theoretical lines.

Discussion and Conclusions
This work described and characterized methods to accurately measure impedance using Arduino ® boards with built-in AVR ® micro-controllers. This is highly remarkable considering the ultra-low cost of the hardware. The measurement method allows the extraction of the resistance (R) and capacitance (C) values of either isolated or series and parallel configuration. Furthermore, inductance (L) measurements can be also performed, yet the range of measurable values is not very useful.
To check the cross-platform applicability of our proposed RCL-meter, two different AVR ® micro-controllers assembled on Arduino ® boards were selected, namely the ATmega328P assembled on an Arduino ® Uno and the ATmega32U4 assembled on an Arduino ® Leonardo. A benchmark was made to test the performance of micro-processors.
As for the measurements of isolated resistances and capacitances, the ATmega32U4 outperforms the ATmega328P, and some specific differences were identified. For instance, the ATmega32U4 was revealed to be more efficient in terms of acquisition time, providing a significant improvement when recording long-term transients. In the worst-case scenario, when recording an isolated capacitance (C LOAD = 4.7 mF) through the transient acquisition mode, the ATmega32U4 performs two times faster than the ATmega328P. In addition, when measuring both C LOAD and R LOAD values of in-series or parallel RC networks, the ATmega32U4 takes a slight advantage over the ATmega328P for larger values of R LOAD , while, conversely, the ATmega32U4 performs better for larger values of C LOAD .
The noise profiles of the direct measurements (R-meter and fast C-meter) are essentially defined by the digitalization noise, while the transient C-meter brings an important extra noise source from the variability in the determination of instants of time required to perform the calculations.
The fast and transient C-meter methods complement each other, since the fast method is best for low capacitances and the transient method best for high capacitances. Operated together, they are able to deliver a relative accuracy equal to or better than 20% in the range 100 fF-10 mF, that is, across 11 orders of magnitude. Furthermore, the accuracy is equal to or better than 5% in the ranges 100 fF-100 pF and 100 nF-10 mF. The series and parallel RC combinations are also able to deliver good measurements of R and C in specific domains of the R-C plane.
Additional investigations were made to analyze the performance of both Arduino ® boards supplied via a large power bank (Litionite Tanker 90 W/50,000 mAh) and using a data logger shield (RobotDyn TM , Zhuhai, China) to store the measurements in a local micro-SD card. This work led to the conclusion that no substantial improvements are achieved by using a low-noise and low-uncertainty voltage supply, and therefore all presented data considers the typical noise and uncertainty from a common USB interface voltage supply source. However, the voltage supply unit determines the overall measurement quality in regions close to the ADC unit threshold values (N) for N < 20 or N > 1000.
Additionally, measurements of the same R LOAD and C LOAD values were made with commercial instruments and presented in the manuscript to provide insight on the overall performance of the ATmega328P and ATmega32U4 micro-controllers as a low-cost alternative to more expensive and sophisticated instruments.
Moreover, the concept proposed in this work, based on AVR ® micro-controllers, may possibly be extended to other microcontrollers such as the STM32 family based on ARM architecture. The latter have more or improved integrated hardware features relative to the former, such as more flash memory, higher resolution ADC drive and faster clocks. On the other hand, using more sophisticated microcontrollers brings the disadvantage of idle but power-consuming internal hardware, for example, the digital-to-analog unit (DAC), which is not required in the present work. In any case, the inherent specificities of each architecture imply different implementations, difficult to cover in a single report.
The work carried out in the investigation of an ultra-low-cost RCL meter was mainly targeted towards impedimetric biosensor measurements, in order to facilitate the integration of the sensing and processing layers to the IoT. Its simplicity opens new possibilities for the improvement of ongoing and future projects in the field of smart sensing. The long-term goal of this work is to integrate the control of the sensing and processing layers into the Web of Things (WoT), which is an upper layer of interaction between devices that may be managed by artificial intelligence.
Supplementary Materials: The following supporting information can be downloaded at: https: //www.mdpi.com/article/10.3390/s22062227/s1, C++ code A.1: High-level routine to measure isolated resistances; C++ code A.2: High-level routine to measure isolated capacitances through the fast acquisition mode; C++ code A.3: High-level routine to measure isolated capacitances through the transient acquisition mode; C++ code A.4: High-level routine to measure a series RC-network; C++ code A.5: High-level routine to measure a parallel RC-network; C++ code A.6: High-level routine to measure an isolated inductance; MATLAB code B.1: High-level routine for fitting the Ordinary Least Squares (OLS) function to the resistance values; MATLAB code B.2: High-level routine for fitting the Ordinary Least Squares (OLS) function to the capacitance values. Funding: This research was funded by the FCT-Fundação para a Ciência e a Tecnologia, Portugal, through the CEOT project UIDB/00631/2020 CEOT BASE and UIDP/00631/2020 CEOT PROGRAMATICO. This work was also developed under the FEDER/Portugal2020 project NIBAP (ALG-01-0247-FEDER-037303).
Institutional Review Board Statement: Not applicable.