Analysis and Design of Single-Ended Resonant Converter for Wireless Power Transfer Systems

Single-ended resonant converters such as Class-E inverters have been widely considered as a potential topology for small- and medium-power wireless power transfer (WPT) applications, which feature compact circuits, low switching losses, and cost benefits, as they only use a low-side switch with a simple gate driver. However, there remains a practical challenge in the design of voltage stress, efficiency, and power density. In this paper, a single-ended resonant converter with a primary parallel resonant-matching network is investigated to absorb the bulky input-choke inductors of the Class-E inverters into the coil inductance. The analytical expressions for all the converter parameters are derived based on time-domain resonant waveforms, including: (1) analysis of critical zero-voltage switching (ZVS) conditions and (2) power transfer capabilities under the given maximum switch voltage stress. Furthermore, this paper elaborates on the design methodology of the proposed single-ended resonant converters, and an optimal operating point is chosen to ensure soft-switching operation and rated power. Finally, the accuracy of the proposed model is verified by simulation and experimental results.


Introduction
Wireless power transfer (WPT) brings about a convenient and safer means of supplying power to electronic devices. It is not only drawing increasing attention from academia but has been popularized in daily life, such as in portable products [1], medical implants [2], and electric vehicles [3][4][5][6]. In general, using a high switching frequency can reduce the size of passive components and improve power density for WPT systems. However, the resultant switching losses and parasitic oscillations will impose adverse effects on the operation and performance of the converter, especially for those containing inefficient loosely coupled transformers. For this reason, applying the soft-switching technique has become an increasing trend in WPT systems. The typical soft-switching inverter configuration is composed of a high-frequency inverter and a resonant tank. The AC voltage generated by the inverter excites the compensators in the matching network and the resonance characteristics decide the zero-voltage switching (ZVS) conditions of the switching devices. It is very important to choose a suitable soft-switching topology for WPT systems, as this will make it especially appropriate for cost-sensitive applications such as household electric appliances, automatic logistics robots, and portable equipment.
The full-bridge (FB) voltage-source inverter (VSI) is regarded as the desired solution for high-power WPT applications such as electric vehicle chargers due to its powerful transfer capability, low voltage stresses, and high controllability. Various types of matching networks have been proposed and analyzed for FB VSIs. Because of the current source characteristic of inductors, series compensators could be directly connected to VSIs, which fosters some basic compensation topologies such as the series-series [7], series-parallel [8], and series-none [9]. Extra inductors and capacitors were also introduced to form inductor-capacitor-inductor [10], inductor-capacitor-capacitor [11], and hybrid compensation networks [12,13] to further improve efficiency and reduce reactive power. In [14], a half-bridge Class-D inverter was used for kilowatts power-level WPT applications, with an optimized design method presented to attenuate the influence of the parasitic elements. A push-pull parallel resonant converter-based bi-directional WPT system was also proposed to provide a more efficient solution [15].
Although widely recognized in high-power scenarios, the bridge topology is less suitable for small-and medium-power WPT systems. It has at least two switches, which will not only require more sophisticated control but also raise production costs. By contrast, the single-ended topology where the converter contains a single low-side switch is known to exhibit good performances from kilohertz (kHz) to megahertz (MHz). It shows not only a low turn-on switching loss but also a low turn-off switching loss, since the resonant capacitor delays the voltage increase of the switch [16].
The Class-E inverter is one of the most common single-ended resonant converters. Many optimized design and control methodologies have been proposed to reduce switching losses and improve efficiency [17][18][19]. However, there remains a practical challenge in the balance of voltage stress, output power, and efficiency, motivating research on optimization methodologies. In [20], a compound voltage-clamped Class-E inverter with an auxiliary was proposed to further improve the performance and decrease the volume of the passive components. Unfortunately, the auxiliary needs a high-side driver, which aggravates its complexity. In [21], a push-pull structure and coupled-choke inductors were introduced into the Class-E inverter to increase output power. In [22], a hybrid inverter named Class-EF was proposed. This inverter improves switch voltage and current waveforms of Class-F inverters with the efficient switching of Class-E inverters.
The input-choke inductors are needed in the above single-ended resonant converters, which is one of the factors that limit the converters' performance. To further reduce the number of passive components, the high-frequency single-ended resonant converter, inspired by the induction-heated cooking appliances in [23], can be typically configured as in Figure 1a. Compared to the Class-E topologies, this topology replaces the input-choke inductor with a coil inductance Lp, and a primary compensation capacitor Cp is added to achieve its ZVS and delays the increase in the switch voltage. However, there are few discussions on the analysis of this converter and its design methodology. Therefore, this paper is devoted to presenting a detailed discussion of the current topology, with the analytical derivation of the ZVS condition given to guide the parameter design of WPT systems. This paper aims to analyze the behavior of the single-ended resonant converter with parallel-series (PS) compensation for wireless charging applications. The analysis of the equivalent circuit of the converter is illustrated in Section Ⅱ. The characterization of the primary parallel resonance is analytically derived in Section Ⅲ, including resonance This paper aims to analyze the behavior of the single-ended resonant converter with parallel-series (PS) compensation for wireless charging applications. The analysis of the equivalent circuit of the converter is illustrated in Section 2. The characterization of the primary parallel resonance is analytically derived in Section 3, including resonance period calculation, critical ZVS conditions, and the voltage stress of key components. The detailed procedures to design an optimal parameter are developed based on the above analysis in Section 4. Then, Section 5; presents the simulation and experimental results to validate the analytical model. Finally, Section 6; draws the conclusions. Figure 1a shows the typical topology of the single-ended resonant converter. In the circuit, V dc is the DC supply voltage source, S is the power switch, C o is the output filter capacitor, and R L is the load resistance. The compensation network is composed of a parallel capacitor C p , a primary self-inductor L p , a secondary self-inductor L s , and a series capacitor C s . An FB-rectifier circuit is placed between the compensation network and the output filter. Figure 1b shows the equivalent circuit, where the mutual inductance is replaced by the T-type decoupled-transformer model, and the secondary impedance is transferred to the primary side of the transformer. The parameters of the transformer consist of the coupling coefficient k, turn ratio n, magnetizing inductance L m , and the primary and secondary leakage inductances L p1 and L s1 .

Modeling of a Single-End Resonant Converter
The inductance can be expressed as Equations (1) and (2).
In Equation (1), the coupling coefficient k = M/ L p L s . The equivalent secondary resonant capacitance C s1 and the AC load R L1 are given as Equations (3) and (4).
Parameter n is the transformer turn ratio, the value satisfies Equation (5).
The impedance of the secondary side at any operating condition is expressed in general as Equation (6).
In Equation (6), ω s = 2π f s , and f s is the switching frequency of the converter. The input impedance Z in of the loosely coupled transformer with a complex load impedance is shown as Equation (7).
Substituting (6) into (7), the real part of Equation (7) is the transformer input resistance, and the imaginary part of Equation (7) is the transformer input reactance. The results are shown in Equations (8) and (9).
In (8) and (9), a 0 is a simplified expression shown as Equation (10).  Figure 1c shows the simplified circuit model of the single-ended WPT system, with the equivalent circuit parameters computed as follows (Equations (11) to (13)): The simplified model is used in the subsequent analysis. It is assumed that the output capacitance, ON-resistance and body-diode forward voltage of the MOSFET can be ignored. It should be noted that the parallel compensation must be connected to the primary switch to achieve ZVS, but the secondary compensation network could be selected by load characteristics. Although only the PS compensation has been analyzed in detail in this paper, the proposed method is also applicable to the parallel-parallel (PP) compensation topology.
The idealized current and voltage waveforms of the converter are shown in Figure 2, which can explain the operation principle of the converter. Here, i L is the current through the inductor, v C is the voltage on the parallel capacitor, v DS is the drain-to-source voltage of the MOSFET, and i D is the current through the MOSFET. From Figure 2, it can be discovered that the MOSFET switches when the parallel capacitor voltage is equal to the input voltage, which contributes to its low switching-loss feature. By selecting the capacitor voltage v C and the inductor current i L as state variables, the state equations for the T off period can be expressed as Equation (14). (10) Figure 1c shows the simplified circuit model of the single-ended WPT system, with the equivalent circuit parameters computed as follows (Equations (11) to (13)): The simplified model is used in the subsequent analysis. It is assumed that the output capacitance, ON-resistance and body-diode forward voltage of the MOSFET can be ignored. It should be noted that the parallel compensation must be connected to the primary switch to achieve ZVS, but the secondary compensation network could be selected by load characteristics. Although only the PS compensation has been analyzed in detail in this paper, the proposed method is also applicable to the parallel-parallel (PP) compensation topology.
The idealized current and voltage waveforms of the converter are shown in Figure 2, which can explain the operation principle of the converter. Here, iL is the current through the inductor, vC is the voltage on the parallel capacitor, vDS is the drain-to-source voltage of the MOSFET, and iD is the current through the MOSFET. From Figure 2, it can be discovered that the MOSFET switches when the parallel capacitor voltage is equal to the input voltage, which contributes to its low switching-loss feature. By selecting the capacitor voltage vC and the inductor current iL as state variables, the state equations for the Toff period can be expressed as Equation (14).
The characteristic equation can be derived as Equation (15).
The characteristic equation can be derived as Equation (15).
As a result, solutions of the differential equations can be computed as Equation (16), with the coefficients a 1 -a 4 obtained from different initial states.

Characteristic Analysis
The equivalent model of the single-ended resonant converter is given in Section 2. To optimize the parameter design of the system, the analytical derivation of the circuit is required.

ZVS Analysis
The critical ZVS waveform is shown in Figure 3. The MOSFET remains turned-on during t 0 to t 1 , with the inductor current rising to I L0 . When the MOSFET turns off at the end of t 1 , the inductor resonates with the parallel capacitors during the T off period. If the voltage of the parallel capacitor v C and the inductor current i L , respectively, are equal to V dc and zero at t 2 , the ZVS can be precisely achieved. To facilitate the derivation of the coefficients a 1 -a 4 , t 2 can be assumed to be zero.
As a result, solutions of the differential equations can be computed as Equation (16), with the coefficients a1-a4 obtained from different initial states.

Characteristic Analysis
The equivalent model of the single-ended resonant converter is given in Section Ⅱ. To optimize the parameter design of the system, the analytical derivation of the circuit is required.

ZVS Analysis
The critical ZVS waveform is shown in Figure 3. The MOSFET remains turned-on during t0 to t1, with the inductor current rising to IL0. When the MOSFET turns off at the end of t1, the inductor resonates with the parallel capacitors during the Toff period. If the voltage of the parallel capacitor vC and the inductor current iL, respectively, are equal to Vdc and zero at t2, the ZVS can be precisely achieved. To facilitate the derivation of the coefficients a1-a4, t2 can be assumed to be zero. Thus, the initial conditions of the state variables can be expressed as Equation (17).
By substituting (18) into (17), the coefficients a1-a4 can be solved as Equation (18).  Thus, the initial conditions of the state variables can be expressed as Equation (17).
According to Figure 3, the critical switch-off duration T off for ZVS can be obtained by letting v C (−T off ) = V dc and i L (−T off ) = I L0 . In other words, Equation (19) can be established.
Since (19) is a transcendental equation with respect to the unknown variable T off , it can be solved by a numerical method. Then, the initial inductor current I L0 can be calculated from (16) as Equation (20).
By letting i L (T on ) = I L0 , the minimum switch-on duration T on can be expressed as Equation (21). By combining (16)- (21), the average input current i inavg under the critical ZVS condition can be acquired as Equation (22).
The input power in this condition is Equation (23).
On the other hand, it can be seen from (21) that the inductor current i L rises from zero to I L0 during T on , and ZVS conditions can never be achieved if I L0 is equal to V dc /R. Therefore, to achieve ZVS, Equation (24) should be satisfied.
Q is the quality factor of the RLC resonant network, which is defined as Q = ωL/R. The numerical solution of the equations can be solved as Equation (26).
By combining (15) and (26), the converter can achieve ZVS only when the R, L and C parameters meet, as in Equation (27).
It can be concluded from (27) that when the inductance L is too small, or the capacitance C and resistance R are too large, ZVS may not be achieved. Thus, (27) can be used as an auxiliary criterion for the ZVS analysis.

The Derivation of Maximum Drain-to-Source Voltage
Since the time-domain expression of v C has been derived as (16), by solving the minimum capacitor voltage V Cmin , the maximum input power can be obtained. On the other hand, the maximum power is limited by the voltage stress of the switch V DSmax due to Equation (28), and V Cmin < 0.
(28) Figure 4 shows the typical operation waveforms at the maximum input power. When the inductor current i L is zero, the capacitor voltage v C is minimized, and the initial values of the state equations are given as Equation (29). imum capacitor voltage VCmin, the maximum input power can be obtained. On the other hand, the maximum power is limited by the voltage stress of the switch VDSmax due to Equation (28), and VCmin < 0. Figure 4 shows the typical operation waveforms at the maximum input power.
The corresponding current IL0 and IL1 at t1 and t2 can be expressed as Equation (31).
By ignoring the voltage drop of the switch, the average input current is obtained and simplified as Equation (33). By combining (16) and (29), the off-times T off1 and T off2 can be solved by letting v C (−T off1 ) = v C (T off2 ) = V dc as Equation (30).
The corresponding current I L0 and I L1 at t 1 and t 2 can be expressed as Equation (31).
Reselecting the origin at t 1 , the on-time can be obtained as Equation (32).
By ignoring the voltage drop of the switch, the average input current is obtained and simplified as Equation (33).
In (33), T on = T on1 + T on2 and T off = T off1 + T off2 . As a result, the input power under the V DSmax can be obtained by using (23).

Design Procedure
Based on the previous analysis, the detailed design procedure of the single-ended resonant converter can be summarized. To simplify the complexity of calculation, the key parameters of the equivalent circuit should be first designed. The principle of optimal design considered in this paper is to increase the ZVS range while maintaining the power capability. There are two specific constraints in the design process, i.e., ensuring the ZVS can be achieved at a light load P oL , and reaching the maximum input power P max at a given V DSmax . As explained in previous subsections. Figure 5 shows the flowchart of a parameter design process in MATLAB. If the range of parameters is given by system specification, the design procedure of the single-ended resonant converter can be developed as follows: 1.
If the maximum drain-to-source voltage V DSmax is chosen, the simplified circuit parameters should comply with the relationships in (30)-(33) to make P max reachable. Calculate the detailed L, R and C values based on the V DSmax and the numeric range of Q to fulfill the target power and voltage stress; 2.
Determine the required minimum T on and T off for critical ZVS conditions, and check whether the minimum input power meets the system requirements, 3. Calculate C p , L p , C s and L s according to the obtained equivalent parameters by (1)-(13), with L, R, C and Q given.
resonant converter can be developed as follows: 1. If the maximum drain-to-source voltage VDSmax is chosen, the simplified circuit parameters should comply with the relationships in (30)-(33) to make Pmax reachable. Calculate the detailed L, R and C values based on the VDSmax and the numeric range of Q to fulfill the target power and voltage stress;   According to the maximum power requirements and light-load ZVS conditions, the region of effective solutions for primary inductance and capacitance is shown in Figure 6. According to the maximum power requirements and light-load ZVS conditions, the region of effective solutions for primary inductance and capacitance is shown in Figure 6. The blue line indicates the Lp and Cp parameter combination when the load power reaches Pmax and the drain-to-source voltage is fixed to VDSmax. The red line indicates the Lp and Cp parameter combination when the load power reaches PoL with critical ZVS conditions satisfied. As seen in the figure, the shaded area is the operating region satisfying both the maximum power requirement and the constraint of light load ZVS. Within this range, the larger the Lp, the smaller the primary current, which is conducive to reducing the current stress of the power semiconductor and the compensation capacitor, and beneficial to reduce the loss of resistance and improve conversion efficiency. Therefore, the optimized operation point can be selected at the right vertex of the region.

Simulation and Experimental Verification
In this section, the circuit shown in Figure 1 was designed, simulated, and tested to verify the proposed theory for single-ended resonant converters. The specifications of the The blue line indicates the L p and C p parameter combination when the load power reaches P max and the drain-to-source voltage is fixed to V DSmax . The red line indicates the L p and C p parameter combination when the load power reaches P oL with critical ZVS conditions satisfied. As seen in the figure, the shaded area is the operating region satisfying both the maximum power requirement and the constraint of light load ZVS. Within this range, the larger the L p , the smaller the primary current, which is conducive to reducing the current stress of the power semiconductor and the compensation capacitor, and beneficial to reduce the loss of resistance and improve conversion efficiency. Therefore, the optimized operation point can be selected at the right vertex of the region.

Simulation and Experimental Verification
In this section, the circuit shown in Figure 1 was designed, simulated, and tested to verify the proposed theory for single-ended resonant converters. The specifications of the single-ended resonant converter, design values, and the components selected for the simulations and experiments are provided in Table 1. The simulations were performed using Simulink. Figure 7 shows a photograph of the 100 kHz power prototype used for measurements. The self-inductance of the coils and their resistance were measured at 100 kHz and 2 V. For the experimental set-up, the distance between the two coils was fixed at 52 mm, and the turns of coil were adjusted to achieve the desired self-inductance. Note that the parameters of the experimental set-up were calculated based on an input power of 25 W and an actual output power of about 20 W with a cascade voltage-regulation module.

Steady-State Operation
As mentioned, the single-ended resonant converter features not only a low turn-on switching loss but also a low turn-off switching loss because the resonant capacitor clamps the drain-to-source voltage. Figure 8 shows the gate-to-source, drain-to-source, coil current, and parallel capacitor voltage waveforms of the single-ended resonant converter obtained through simulations and experiments. The measured output power delivered to the load resistance RL is Po = 25.495 W. The measured average input power is Pin = 27.3 W, while the design value is 25 W. Hence, the overall efficiency under the optimum operating conditions is η ≈ 93.39%.

Steady-State Operation
As mentioned, the single-ended resonant converter features not only a low turn-on switching loss but also a low turn-off switching loss because the resonant capacitor clamps the drain-to-source voltage. Figure 8 shows the gate-to-source, drain-to-source, coil current, and parallel capacitor voltage waveforms of the single-ended resonant converter obtained through simulations and experiments. The measured output power delivered to the load resistance R L is P o = 25.495 W. The measured average input power is P in = 27.3 W, while the design value is 25 W. Hence, the overall efficiency under the optimum operating conditions is η ≈ 93.39%.
switching loss but also a low turn-off switching loss because the resonant capacitor clamps the drain-to-source voltage. Figure 8 shows the gate-to-source, drain-to-source, coil current, and parallel capacitor voltage waveforms of the single-ended resonant converter obtained through simulations and experiments. The measured output power delivered to the load resistance RL is Po = 25.495 W. The measured average input power is Pin = 27.3 W, while the design value is 25 W. Hence, the overall efficiency under the optimum operating conditions is η ≈ 93.39%. The values of the designed parameters result in an optimal operation, where ZVS is achieved during both turn-on and turn-off. The designed maximum-voltage stress of the switch is 3.5Vdc = 252 V, which is smaller than the measured value VDSmax = 264 V at the maximum-output power due to the ignorance of parasitic parameters. Moreover, it can be discovered that the switch voltage is negative and lower than the on-state voltage for a very short period of time. This negative-voltage freewheeling is caused by the body diode of the MOSFET, which increases the unnecessary conduction losses. The system efficiency can be improved by minimizing the turn-on delay of the switch after the negative-voltage freewheeling is detected. The values of the designed parameters result in an optimal operation, where ZVS is achieved during both turn-on and turn-off. The designed maximum-voltage stress of the switch is 3.5V dc = 252 V, which is smaller than the measured value V DSmax = 264 V at the maximum-output power due to the ignorance of parasitic parameters. Moreover, it can be discovered that the switch voltage is negative and lower than the on-state voltage for a very short period of time. This negative-voltage freewheeling is caused by the body diode of the MOSFET, which increases the unnecessary conduction losses. The system efficiency can be improved by minimizing the turn-on delay of the switch after the negative-voltage freewheeling is detected.

Critical ZVS Conditions
For the proposed single-ended resonant converter, various considerations need to be taken in the selection of switches, especially when operating at a small duty cycle. This is because the input capacitance, output capacitance, rise time, and fall time will affect the effective conduction time and thus the ZVS conditions. To minimize the influence of the nonlinear parasitic capacitance of switches, the SiC MOSFET SCT3080AL and Schottky barrier diode STPS30L60CT are applied for the converter, as they have relatively low parasitic capacitance and switching time at the rated voltage. Figure 9 shows the calculated, simulated, and experimental turn-on times and turn-off times to achieve ZVS under different load resistances. The calculated values are obviously smaller than the simulation and experimental results because of ignoring the non-ideal factors, such as circuit resistance, parasitic capacitance, and the forward voltage drop of the body diode. From the analysis of Figure 9, it can be seen that the analysis result is consistent with the change trend of the measured values. It is desirable to leave enough margin in the design specification to take into account parasitic parameters and duty-cycle losses caused by the delayed time. For example, the minimum light-load power for ZVS can be slightly reduced to ensure a robust design. For the proposed single-ended resonant converter, various considerations need to be taken in the selection of switches, especially when operating at a small duty cycle. This is because the input capacitance, output capacitance, rise time, and fall time will affect the effective conduction time and thus the ZVS conditions. To minimize the influence of the nonlinear parasitic capacitance of switches, the SiC MOSFET SCT3080AL and Schottky barrier diode STPS30L60CT are applied for the converter, as they have relatively low parasitic capacitance and switching time at the rated voltage. Figure 9 shows the calculated, simulated, and experimental turn-on times and turnoff times to achieve ZVS under different load resistances. The calculated values are obviously smaller than the simulation and experimental results because of ignoring the nonideal factors, such as circuit resistance, parasitic capacitance, and the forward voltage drop of the body diode. From the analysis of Figure 9, it can be seen that the analysis result is consistent with the change trend of the measured values. It is desirable to leave enough margin in the design specification to take into account parasitic parameters and duty-cycle losses caused by the delayed time. For example, the minimum light-load power for ZVS can be slightly reduced to ensure a robust design. The critical ZVS conditions of the single-ended resonant converters can be calculated using (18)-(26). Since the switching frequency is up to hundreds of kilohertz, the parameters of the switch are critical for system efficiency, especially when supplying light loads. Since the coil current is reduced, the effect of parasitic capacitance is more notable, and the turn-on time used to achieve soft-switching is significantly increased, as shown in Fig-Figure 9. Comparison of calculated, simulated, and experimental critical ZVS conditions under different load resistances.
The critical ZVS conditions of the single-ended resonant converters can be calculated using (18)-(26). Since the switching frequency is up to hundreds of kilohertz, the parameters of the switch are critical for system efficiency, especially when supplying light loads. Since the coil current is reduced, the effect of parasitic capacitance is more notable, and the turn-on time used to achieve soft-switching is significantly increased, as shown in Figure 10. Comparing the waveforms under different load resistances, the turn-on time should be increased to maintain the ZVS condition due to the parasitic capacitance of the switch (about 300 pF for MOSFET). In experiments, the same phenomenon manifests in the increase in turn-on time. The critical ZVS conditions of the single-ended resonant converters can be calculated using (18)-(26). Since the switching frequency is up to hundreds of kilohertz, the parameters of the switch are critical for system efficiency, especially when supplying light loads. Since the coil current is reduced, the effect of parasitic capacitance is more notable, and the turn-on time used to achieve soft-switching is significantly increased, as shown in Figure 10. Comparing the waveforms under different load resistances, the turn-on time should be increased to maintain the ZVS condition due to the parasitic capacitance of the switch (about 300 pF for MOSFET). In experiments, the same phenomenon manifests in the increase in turn-on time.

Efficiency and Output Power
When the operation frequency is up to hundreds of kilohertz, probes can easily introduce additional amplitude and phase errors during the test. Thus, the instantaneous power of the resonant tank will be inaccurate. To estimate the efficiency of the single-ended resonant converter, the average output power of the DC source and the average power delivered to the load resistance were measured. Figure 11 shows the system's efficiency over the output power range with different load resistances. The driving losses are not considered, and the peak efficiency of the proposed systems is 94.86%. Compared with other topologies, the proposed single-ended WPT system has the advantages of simple circuits, low cost, and easy implementation. It has the potential to be used in small-and medium-power consumer WPT applications.

Efficiency and Output Power
When the operation frequency is up to hundreds of kilohertz, probes can easily introduce additional amplitude and phase errors during the test. Thus, the instantaneous power of the resonant tank will be inaccurate. To estimate the efficiency of the singleended resonant converter, the average output power of the DC source and the average power delivered to the load resistance were measured. Figure 11 shows the system's efficiency over the output power range with different load resistances. The driving losses are not considered, and the peak efficiency of the proposed systems is 94.86%. Compared with other topologies, the proposed single-ended WPT system has the advantages of simple circuits, low cost, and easy implementation. It has the potential to be used in small-and medium-power consumer WPT applications.

Conclusions
This paper presents an analytical model that can be utilized as the theoretical basis for modeling and designing a single-ended resonant converter. Unlike prior work, the proposed single-ended resonant converter replaces the choke inductor of the Class-E inverter with the coil inductance. The time-domain waveform-based circuit model is solved using a numerical approach, which allows the derivation of the design equation for general operating conditions and can hopefully find all feasible designs with the given requirements. Based on the circuit analysis, the detailed parameter design process is given in this paper. The analytical results are found to match the experimental results well, and the system achieved 94.86% peak efficiency at 10.5 W output power at 100 kHz operating frequency. The contributions of this paper are as follows:

Conclusions
This paper presents an analytical model that can be utilized as the theoretical basis for modeling and designing a single-ended resonant converter. Unlike prior work, the proposed single-ended resonant converter replaces the choke inductor of the Class-E inverter with the coil inductance. The time-domain waveform-based circuit model is solved using a numerical approach, which allows the derivation of the design equation for general operating conditions and can hopefully find all feasible designs with the given requirements. Based on the circuit analysis, the detailed parameter design process is given