BPF-Based Thermal Sensor Circuit for On-Chip Testing of RF Circuits

A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 μm complementary metal-oxide-semiconductor (CMOS) technology, it comprised two blocks: a single metal-oxide-semiconductor (MOS) transistor acting as temperature transducer, which was placed near the circuit to monitor, and an active band-pass filter amplifier. For validation purposes, the temperature sensor was integrated with a tuned radio-frequency power amplifier (420 MHz) and MOS transistors acting as controllable dissipating devices. First, using the MOS dissipating devices, the performance and limitations of the different blocks that constitute the temperature sensor were characterized. Second, by using the heterodyne technique (applying two nearby tones) to the power amplifier (PA) and connecting the sensor output voltage to a low-cost AC voltmeter, the PA’s output power and its central frequency were monitored. As a result, this topology resulted in a low-cost approach, with high linearity and sensitivity, for RF-IC testing and variability monitoring.


Introduction
The temperature in a surface point of an integrated circuit (IC) depends on the power dissipated by the devices placed nearby (so-called self-heating and thermal coupling), the structure and materials that constitute the packaging (which determine the thermal impedances of the different devices) and the ambient temperature [1]. Traditionally, offchip temperature measurement set-ups have been used to detect unexpected hot spots within digital circuits [2][3][4][5]. Hot spots might appear either due to the presence of a defect in the circuit structure [6][7][8][9] or by a nonuniform power dissipation on the die surface, which is a common situation in microprocessors [4,10]. In complex digital systems, such as microprocessors, temperature sensors are built-in within the same silicon die in order to ensure reliable system performance, i.e., they perform power-temperature monitoring to control the activation of cooling systems, to modulate microprocessor supply voltage or clock frequency, or to assert if the workload of a specific microprocessor block can be increased or should be reduced to avoid nonuniform power distributions [11][12][13][14][15][16][17][18]. Nevertheless, thermal monitoring is not restricted to digital circuits, but used as well in analog circuits. Most commonly, thermal measurements of analog circuits are usually performed to extract the thermal resistance of devices [19,20], especially in power devices. More recently, temperature measurements are done in high frequency analog circuits to perform testing applications. The test of high frequency analog circuits is a challenging task, as the presence of a defect or the effects of process-voltage-temperature variations The main novelty and first goal of this paper is to present the first experimental characterization of this sensor topology, focusing on its sensitivity, noise and linearity. To this end, we implemented a realization of this sensor topology in a standard 0.35 μm CMOS technology (VDD = 3.3 V) together with MOS transistors acting as controllable dissipating devices. The second goal is to assess the temperature sensor for RF CUT monitoring. For that purpose, a tuned (420 MHz) class-A radio-frequency power amplifier (PA) is built-in together with the sensor, which shows its capability to monitor the PA central frequency and the output power delivered to the load (antenna).
Taking this into account, the paper is organized as follows: the sensor topology and design are described in Section 2. The sensor's block characterization and full sensor validation are carried out in Section 3. Section 4 presents the PA used as CUT, the placement of the transducer within the PA layout and two application cases for this temperature sensor as a built-in RF monitor. Finally, Section 5 draws the main conclusions. Figure 2 shows the proposed sensor schematic. It was made of two blocks: (a) the temperature transducer and (b) the active BPF. The goal of the temperature transducer is to generate a voltage at the node Vot proportional to the working temperature of the transistor T1, which is placed in the silicon die at the proximity of the CUT. On the other hand, the aim of the active BPF is to provide signal amplification at the output node Vo if the input signal Vif has its frequency within the passing band. The main figures of merit of the BPF frequency response are represented in Figure 2c: the low-frequency (fp1) and highfrequency (fp2) poles, which determine the pass-band, and the band-pass gain Av. Three different circuits were implemented in the IC: only (a) with Vot connected to an output pad; only (b) with Vif connected to an input pad and (a) and (b) with Vot internally shorted to Vif. A detailed description and theoretical analysis of each block is in the following two subsections, with emphasis on sensitivity, noise and linearity. The main novelty and first goal of this paper is to present the first experimental characterization of this sensor topology, focusing on its sensitivity, noise and linearity. To this end, we implemented a realization of this sensor topology in a standard 0.35 µm CMOS technology (VDD = 3.3 V) together with MOS transistors acting as controllable dissipating devices. The second goal is to assess the temperature sensor for RF CUT monitoring. For that purpose, a tuned (420 MHz) class-A radio-frequency power amplifier (PA) is built-in together with the sensor, which shows its capability to monitor the PA central frequency and the output power delivered to the load (antenna).

Sensor Description and Design
Taking this into account, the paper is organized as follows: the sensor topology and design are described in Section 2. The sensor's block characterization and full sensor validation are carried out in Section 3. Section 4 presents the PA used as CUT, the placement of the transducer within the PA layout and two application cases for this temperature sensor as a built-in RF monitor. Finally, Section 5 draws the main conclusions. Figure 2 shows the proposed sensor schematic. It was made of two blocks: (a) the temperature transducer and (b) the active BPF. The goal of the temperature transducer is to generate a voltage at the node V ot proportional to the working temperature of the transistor T 1 , which is placed in the silicon die at the proximity of the CUT. On the other hand, the aim of the active BPF is to provide signal amplification at the output node V o if the input signal V if has its frequency within the passing band. The main figures of merit of the BPF frequency response are represented in Figure 2c: the low-frequency (f p1 ) and highfrequency (f p2 ) poles, which determine the pass-band, and the band-pass gain A v . Three different circuits were implemented in the IC: only (a) with V ot connected to an output pad; only (b) with V if connected to an input pad and (a) and (b) with V ot internally shorted to V if . A detailed description and theoretical analysis of each block is in the following two subsections, with emphasis on sensitivity, noise and linearity.

Temperature Transducer Description
The temperature transducer T 1 was an nMOS transistor (dimensions: W = 24 µm, L = 1.5 µm) connected in diode configuration and biased with a DC constant current (I B in Figure 2). A small bias current placed the transistor in the weak inversion region, having an expected sensitivity of −1.5 mV/K at I B = 20 nA. With other dimensions and bias, transducer sensitivities in the range [−1.6 mV/K, 5 mV/K] can be achieved, as reported in [44,45]. To create such a small bias current, a current mirror with a ratio I B /I ext = 1/1000 was implemented. The internal current mirror in conjunction with an operational amplifier (OA) in voltage follower configuration ensures a low parasitic capacitance at node N 1 and a low output impedance, enhancing the dynamic transducer behavior.

Temperature Transducer Description
The temperature transducer T1 was an nMOS transistor (dimensions: W = 24 μm, L = 1.5 μm) connected in diode configuration and biased with a DC constant current (IB in Figure 2). A small bias current placed the transistor in the weak inversion region, having an expected sensitivity of −1.5 mV/K at IB = 20 nA. With other dimensions and bias, transducer sensitivities in the range [−1.6 mV/K, 5 mV/K] can be achieved, as reported in [44,45]. To create such a small bias current, a current mirror with a ratio IB/Iext = 1/1000 was implemented. The internal current mirror in conjunction with an operational amplifier (OA) in voltage follower configuration ensures a low parasitic capacitance at node N1 and a low output impedance, enhancing the dynamic transducer behavior.

Band Pass Filter Amplifier: Noise and Linearity Analysis
The output of the temperature transducer was connected to an active BPF. The transducer signal is AC-coupled, amplified and filtered, and appeared at the output superposed on a DC level of VDD/2. Capacitors C1 = 50 pF and C2 = 100 fF set the band-pass gain Av which was designed to be: | | ≅ = 500 (54 dB). (1) Having a zero at the origin, the pass-band is determined by the low (fp1) and high (fp2) poles (cut-off frequencies), which are respectively: Since the OA gain-bandwidth (GBW) product is 2.4 MHz, this results in a theoretical value for fp2 of 4.8 kHz. To have a low fp1, resistor values in the order of GΩ are required, thus R2 was implemented with two subthreshold biased pMOS, as shown in Figure 3 [46][47][48][49]. These MOS had W = 2 μm and L = 10 μm, and the external voltage VBIAS applied to their gate allows tuning to its equivalent resistance. From Equations (1) and (3), in a first order analysis, fp2 and Av should be independent from VBIAS.

Band Pass Filter Amplifier: Noise and Linearity Analysis
The output of the temperature transducer was connected to an active BPF. The transducer signal is AC-coupled, amplified and filtered, and appeared at the output superposed on a DC level of V DD /2. Capacitors C 1 = 50 pF and C 2 = 100 fF set the band-pass gain A v which was designed to be: Having a zero at the origin, the pass-band is determined by the low (f p1 ) and high (f p2 ) poles (cut-off frequencies), which are respectively: Since the OA gain-bandwidth (GBW) product is 2.4 MHz, this results in a theoretical value for f p2 of 4.8 kHz. To have a low f p1 , resistor values in the order of GΩ are required, thus R 2 was implemented with two subthreshold biased pMOS, as shown in Figure 3 [46][47][48][49]. These MOS had W = 2 µm and L = 10 µm, and the external voltage V BIAS applied to their gate allows tuning to its equivalent resistance. From Equations (1) and (3), in a first order analysis, f p2 and A v should be independent from V BIAS .  Table 1 shows the values, obtained from simulations, of the R2 incremental resist as a function of VBIAS (assuming both R2 terminals, N1 and N2, at VDD/2) as well as the B low and high cut-off frequencies. Note how fp1 is highly sensitive to VBIAS, which op discussion on its optimum value. As explained above, transducer signal consisted tone at a frequency Δf, which should fall within the filter passband. From the valu  Table 1 shows the values, obtained from simulations, of the R 2 incremental resistance as a function of V BIAS (assuming both R 2 terminals, N 1 and N 2 , at V DD /2) as well as the BPF's low and high cut-off frequencies. Note how f p1 is highly sensitive to V BIAS , which opens a discussion on its optimum value. As explained above, transducer signal consisted of a tone at a frequency ∆f, which should fall within the filter passband. From the values in Table 1, ∆f around 1-2 kHz are reasonable choices. The filter output would be measured with a DMM that evaluates the total RMS voltage. Then, a narrow band-pass (high f p1 ) seems desirable in order to filter out as much noise as possible and reduce the measurement noise level. But, on the other hand, the amplified signal at the output node modulates the R 2 value, thus producing distortion. The effect of this R 2 nonlinearity on the overall sensor nonlinearity is relevant whenever R 2 has a significant contribution to the signal path, i.e., when ∆f is around f p1 or lower. On the contrary, at ∆f values well above f p1 , the effects of R 2 , including its nonlinearity, become negligible on the output linearity and gain. From this point of view, a low f p1 is desirable. In order to assess the effect of the different f p1 choices on the sensor noise and linearity, Table 1 shows simulation results of the filter alone (no transducer included). Noise was evaluated after integrating the power spectral density at the filter output up to 100 kHz, while the maximum harmonic distortion (THD MAX ) was also evaluated at the filter output obtained for a 1 kHz input sinusoid just before output clipping. Simulations show how linearity was dramatically degraded as f p1 was set near the signal frequency, while could be improved as f p1 is moved away from the signal. The price to pay was a moderate noise degradation. In view of these simulation results, V BIAS = 1.2 V (f p1 = 248 Hz) was selected as a good default setting, which can be increased (f p1 decreased) to produce a more linear response.

Sensor Implementation and Validation
The sensor was designed and manufactured in the CMOS 0.35 µm process. This microelectronic process provides four metal layers and two polysilicon layers. Capacitances C 1 and C 2 were implemented with polysilicon capacitors. The supply voltage (V DD ) was 3.3 V (unipolar), and the IC was packaged in a QFN56. Its validation was performed first by each block standing alone and finally both connected, as detailed below.

Temperature Transducer
To characterize its frequency response, the circuit in Figure 2a was implemented as stand-alone, with the node V ot connected to an output pad. Besides, a large diodeconnected nMOS transistor acting as a heater (W = 450 µm, L = 1 µm and 15 fingers) was placed at a 5 µm distance from the transducer ( Figure 4). The heater was biased with a gate where V DCh is the heater bias voltage, A is the AC amplitude, and f i is its frequency. Assuming a linear response, the current flowing through the heater is: where g m is the heater AC transconductance at V in = V DCh , and I DCh is the DC drain to source current when V in = V DCh . suming a linear response, the current flowing through the heater is: where gm is the heater AC transconductance at Vin = VDCh, and IDCh is the DC dra current when Vin = VDCh. Multiplying Equations (4) and (5), the power dissipated by the heate quency domain can be described as the sum of different spectral components on the spectral component at the frequency fi (called pfi), it can be written as: where PA is the power dissipation amplitude at the frequency fi. The above heater dimensions enabled us to easily have PA in the mW range while app input voltage. pfi(t) causes a temperature oscillation tS(t) at the temperature with the same frequency fi: where TA is the temperature amplitude and φA is the phase shift between ts thermal amplitude and phase shift depend on the silicon physical properties (t ductivity and specific heat), the input frequency fi and the distance between th the transducer [40]. The close proximity between the heater and the transduc good thermal coupling even in the MHz frequency range [32,40,[50][51]. The ducer output voltage can be written as: where VGST1 is the DC gate-to-source voltage in T1, needed to sustain the drai and VA is the voltage amplitude generated by the oscillating temperature of am Here we assume that there is no phase shift between the transducer tempera output voltage, i.e., the pole induced by the node N1 in Figure 2b is at a freq higher than fi. Being a temperature-to-voltage transducer, its sensitivity is VA/TA. However, as the goal of the sensor was to monitor the CUT characteris its power dissipation, the sensitivity expressed as VA/PA had a greater interest evaluated in this work. Multiplying Equations (4) and (5), the power dissipated by the heater in the frequency domain can be described as the sum of different spectral components. If we focus on the spectral component at the frequency f i (called p fi ), it can be written as: where P A is the power dissipation amplitude at the frequency f i . The above-mentioned heater dimensions enabled us to easily have P A in the mW range while applying a low input voltage. p fi (t) causes a temperature oscillation t S (t) at the temperature transducer with the same frequency f i : where T A is the temperature amplitude and ϕ A is the phase shift between t s and p fi . Both thermal amplitude and phase shift depend on the silicon physical properties (thermal conductivity and specific heat), the input frequency f i and the distance between the heater and the transducer [40]. The close proximity between the heater and the transducer ensures a good thermal coupling even in the MHz frequency range [32,40,50,51]. Then, the transducer output voltage can be written as: where V GST1 is the DC gate-to-source voltage in T 1 , needed to sustain the drain current I B , and V A is the voltage amplitude generated by the oscillating temperature of amplitude T A . Here we assume that there is no phase shift between the transducer temperature and the output voltage, i.e., the pole induced by the node N 1 in Figure 2b is at a frequency much higher than f i . Being a temperature-to-voltage transducer, its sensitivity is defined as V A /T A . However, as the goal of the sensor was to monitor the CUT characteristics through its power dissipation, the sensitivity expressed as V A /P A had a greater interest, and will be evaluated in this work. In order to characterize the transducer response, the heater has was excited with the different input voltage levels (VL) reported in Table 2. P A values in this table were calculated from the experimental I-V characteristics of the heater. Figure 5 shows the measured transducer sensitivity as a function of the frequency (transducer biased with I B = 20 nA). Here, the amplitude V A was measured with an LIA (Signal Recovery 7265DSP) locked at f i with a constant time of 1 s. In order to characterize the transducer response, the heater has was excited with the different input voltage levels (VL) reported in Table 2. PA values in this table were calculated from the experimental I-V characteristics of the heater. Figure 5 shows the measured transducer sensitivity as a function of the frequency (transducer biased with IB = 20 nA). Here, the amplitude VA was measured with an LIA (Signal Recovery 7265DSP) locked at fi with a constant time of 1 s.  The frequency response in Figure 5 shows a low-pass behavior corresponding to the thermal coupling from the heater to the transducer, which agrees with the theoretical, simulations and experimental data previously reported in [52]. In this particular set-up, the coupling attenuation increased for frequencies higher than 3 kHz. Besides that, the independence of the transducer's sensitivity on the amplitude PA proves the transducer linear behavior.

Band Pass Filter Amplifier
The circuit in Figure 2b was also implemented as stand-alone, with input (Vif) and output nodes (Vo) connected, respectively, to input and output pads. Figure 6 shows the measured frequency response of the BPF voltage gain. Input Vif(t) is a sinusoidal voltage of 20 mVRMS attenuated by a factor of 100 with an off-chip resistive voltage divider. Filter characterizations were done for the three VBIAS values reported in Table 1. For each VBIAS, the output voltage amplitude was measured using either the LIA or a DMM (HP 33401A) AC-coupled. The LIA was set with a time constant of 1 s, which implied that the measure was integrating the signal (and noise) in a bandwidth of 1 Hz. On the other hand, the DMM was integrating the signal and noise along all the filter bandwidth (i.e., the output harmonics were integrated as well). The frequency response in Figure 5 shows a low-pass behavior corresponding to the thermal coupling from the heater to the transducer, which agrees with the theoretical, simulations and experimental data previously reported in [52]. In this particular set-up, the coupling attenuation increased for frequencies higher than 3 kHz. Besides that, the independence of the transducer's sensitivity on the amplitude P A proves the transducer linear behavior.

Band Pass Filter Amplifier
The circuit in Figure 2b was also implemented as stand-alone, with input (V if ) and output nodes (V o ) connected, respectively, to input and output pads. Figure 6 shows the measured frequency response of the BPF voltage gain. Input V if (t) is a sinusoidal voltage of 20 mV RMS attenuated by a factor of 100 with an off-chip resistive voltage divider. Filter characterizations were done for the three V BIAS values reported in Table 1. For each V BIAS , the output voltage amplitude was measured using either the LIA or a DMM (HP 33401A) AC-coupled. The LIA was set with a time constant of 1 s, which implied that the measure was integrating the signal (and noise) in a bandwidth of 1 Hz. On the other hand, the DMM was integrating the signal and noise along all the filter bandwidth (i.e., the output harmonics were integrated as well). Table 3 summarizes the BPF characteristics extracted from the responses in Figure 6, considering LIA measurements. Comparing Tables 1 and 3, measured characteristics show a reasonable agreement to the simulation predictions.  Table 3 summarizes the BPF characteristics extracted from the responses in Figure 6, considering LIA measurements. Comparing Tables 1 and 3, measured characteristics show a reasonable agreement to the simulation predictions. More importantly, measurements done with a simple DMM had very good agreement with those made with the LIA for frequencies equal and higher than the BPF central frequency. However, DMM results were higher than the LIA ones when the input signal frequency was equal or smaller than fp1. As predicted by simulations, output-voltage nonlinearities became relevant when the input frequency was equal or smaller than fp1, due to the R2 modulation. Those nonlinearities produced significant harmonics, which were captured with the DMM, thus producing a slightly higher gain measurement. Finally, DMM results showed an equivalent noise at the filter output of 4 mVRMS, which, according to Section 2, translated into an equivalent noise at the temperature sensor's input of 7.54 mK (@ IB = 20 nA). As predicted by simulations, the noise level at the output was almost independent from VBIAS: fp1 may change over one order of magnitude, but its values were in the range of tens-hundreds of Hz, with small effect after integrating over the whole bandwidth.
The effects of the manufacturing variability on R2 were also evaluated. Figure 7 shows the effect of R2 sample-to-sample variability on the measured fp1 values, as a function of VBIAS in three different IC samples. In all these situations, the maximum gain measured was 54.5 ± 0.43 dB, in agreement with the expected gain independence with VBIAS.  More importantly, measurements done with a simple DMM had very good agreement with those made with the LIA for frequencies equal and higher than the BPF central frequency. However, DMM results were higher than the LIA ones when the input signal frequency was equal or smaller than f p1 . As predicted by simulations, output-voltage nonlinearities became relevant when the input frequency was equal or smaller than f p1 , due to the R 2 modulation. Those nonlinearities produced significant harmonics, which were captured with the DMM, thus producing a slightly higher gain measurement. Finally, DMM results showed an equivalent noise at the filter output of 4 mV RMS , which, according to Section 2, translated into an equivalent noise at the temperature sensor's input of 7.54 mK (@ I B = 20 nA). As predicted by simulations, the noise level at the output was almost independent from V BIAS : f p1 may change over one order of magnitude, but its values were in the range of tens-hundreds of Hz, with small effect after integrating over the whole bandwidth.
The effects of the manufacturing variability on R 2 were also evaluated. Figure 7 shows the effect of R 2 sample-to-sample variability on the measured f p1 values, as a function of V BIAS in three different IC samples. In all these situations, the maximum gain measured was 54.5 ± 0.43 dB, in agreement with the expected gain independence with V BIAS .

Overall Sensor Characterization
Besides the stand-alone temperature transducer (Figure 2a) and the stand-alone BPF (Figure 2b), the complete circuit in Figure 2 was also implemented with the transducer's output connected to the input of the BPF, and with a nMOS transistor such as that depicted in Figure 4 as a controllable heater. Then, when the dissipating device is biased with v in (t) as in Equation (4), the sensor's output voltage can be written as:

Overall Sensor Characterization
Besides the stand-alone temperature transducer (Figure 2a) and the sta (Figure 2b), the complete circuit in Figure 2 was also implemented with th output connected to the input of the BPF, and with a nMOS transistor such a in Figure 4 as a controllable heater. Then, when the dissipating device is bia as in equation (4), the sensor's output voltage can be written as: where AO is the amplitude of the sinusoidal component of VO(t) at the fre filter introduces a phase shift (φO − φA) − φA is defined in Equations (7) and Figure 8 shows AO,RMS (RMS value of AO from Equation (9)) as a funct quency when measured with the DMM (@ IB = 20nA, VBIAS = 1.2 V), using the in Table 2 for the heater excitation. The frequency response reported a cent fc, of about 2 kHz for all the VL. The overall frequency response is the conca transducers' and BPF frequency responses. For frequencies smaller than 10 than 10 kHz (the exact frequency depends on the particular bias), the sensor age reached the noise level, which is 40 mVRMS. This noise level is higher served in Figure 6, meaning that it was dominated by the heater-transduce noise level sets the PA threshold that the sensor is able to detect. To calculate Figure 9 shows the sensor's sensitivity (AO/PA) as a function of the frequenc ured with the LIA. The maximum sensitivity was about 140 mV/mW. There corresponded to an equivalent noise floor in PA of 285 μW.   Table 2 for the heater excitation. The frequency response reported a central frequency, f c , of about 2 kHz for all the VL. The overall frequency response is the concatenation of the transducers' and BPF frequency responses. For frequencies smaller than 100 Hz or higher than 10 kHz (the exact frequency depends on the particular bias), the sensor's output voltage reached the noise level, which is 40 mV RMS . This noise level is higher than that observed in Figure 6, meaning that it was dominated by the heater-transducer circuits. The noise level sets the P A threshold that the sensor is able to detect. To calculate this threshold, Figure 9 shows the sensor's sensitivity (A O /P A ) as a function of the frequency, when measured with the LIA. The maximum sensitivity was about 140 mV/mW. Therefore, 40 mV RMS corresponded to an equivalent noise floor in P A of 285 µW.

Overall Sensor Characterization
Besides the stand-alone temperature transducer (Figure 2a) and the stand-alone BPF (Figure 2b), the complete circuit in Figure 2 was also implemented with the transducer's output connected to the input of the BPF, and with a nMOS transistor such as that depicted in Figure 4 as a controllable heater. Then, when the dissipating device is biased with vin(t) as in equation (4), the sensor's output voltage can be written as: where AO is the amplitude of the sinusoidal component of VO(t) at the frequency fi. The filter introduces a phase shift (φO − φA) − φA is defined in Equations (7) and (8). Figure 8 shows AO,RMS (RMS value of AO from Equation (9)) as a function of the frequency when measured with the DMM (@ IB = 20nA, VBIAS = 1.2 V), using the different VLs in Table 2 for the heater excitation. The frequency response reported a central frequency, fc, of about 2 kHz for all the VL. The overall frequency response is the concatenation of the transducers' and BPF frequency responses. For frequencies smaller than 100 Hz or higher than 10 kHz (the exact frequency depends on the particular bias), the sensor's output voltage reached the noise level, which is 40 mVRMS. This noise level is higher than that observed in Figure 6, meaning that it was dominated by the heater-transducer circuits. The noise level sets the PA threshold that the sensor is able to detect. To calculate this threshold, Figure 9 shows the sensor's sensitivity (AO/PA) as a function of the frequency, when measured with the LIA. The maximum sensitivity was about 140 mV/mW. Therefore, 40 mVRMS corresponded to an equivalent noise floor in PA of 285 μW. allows the sensor to detect the PA dissipated by the heater when driven by the VL 1. On the other hand, if Δf = 10 kHz the sensor's sensitivity is 54 mW/mV, and the amplitude PA dissipated by the heater when driven by the VL 1 is below the noise level, whereas the sensor can barely detect the amplitude PA when driven by the VL 2. This indicates that Δf higher than the sensor's central frequency can be a good choice to sense large PA levels.
On the other hand, if Δf = fc, high values of PA might drive the sensor to saturation.

Circuit and Experimental Set Up Description
The BPF temperature sensor was integrated with a narrowband RF power amplifier (PA) used as a CUT. The schematic of the RF PA is shown in Figure 10. It is a class-A cascode amplifier with off-chip load, fully described in [32]. The cascode transistor M2 was made of three transistors in parallel connection (inset in Figure 10). The overall M2 dimensions were W = 1173 μm (implemented with 51 fingers), and L = 0.5 μm. The MOS temperature transducer was placed in the free space existing between two of these transistors. When the DC bias of the PA was VDD = 3.3V and Vcnt = 3 V, it had a current consumption of 22 mA. Experimental characterization of the PA reported a central frequency of 420 MHz, a maximum gain of 12 dB and a 1 dB compression point referred to the input of −4 dBm. To minimize parasitics in the RF measurements, the chip was directly soldered to the board (chip on board).
In order to demonstrate the sensor monitoring capability, the PA was AC driven with a heterodyne approach: two sinusoidal signals of input power Pi and frequencies (fRF − Δf/2) and (fRF + Δf/2). This driving generated power dissipation in transistor M2, with a spectral component at Δf and an amplitude PΔf. Previous work [32,33] indicated that PΔf  Table 2 for the VL description and the PA values. Measurements taken with the LIA.
If we now consider the sensor's linearity, the overlapping points in Figure 9 show that the sensor sensitivity was not affected by the P A level when f i was equal or higher than f c . On the other hand, the sensitivity depended on the amplitude P A dissipated by the heater when f i was smaller than f c : The R 2 nonlinear behavior affected the sensor linearity. These results have implications in the way the CUT must be driven when a test is done using a heterodyne excitation (Figure 1): ∆f should be higher than f p1 . The exact value of ∆f is determined by the expected range of values of the amplitude P A dissipated by the CUT, which determines the required sensor sensitivity and the noise level. For instance, from Figures 8 and 9, if ∆f = 2.5 kHz the sensor's sensitivity is 134 mW/mV. This sensitivity allows the sensor to detect the P A dissipated by the heater when driven by the VL 1. On the other hand, if ∆f = 10 kHz the sensor's sensitivity is 54 mW/mV, and the amplitude P A dissipated by the heater when driven by the VL 1 is below the noise level, whereas the sensor can barely detect the amplitude PA when driven by the VL 2. This indicates that ∆f higher than the sensor's central frequency can be a good choice to sense large P A levels.
On the other hand, if ∆f = f c , high values of P A might drive the sensor to saturation.

Circuit and Experimental Set Up Description
The BPF temperature sensor was integrated with a narrowband RF power amplifier (PA) used as a CUT. The schematic of the RF PA is shown in Figure 10. It is a class-A cascode amplifier with off-chip load, fully described in [32]. The cascode transistor M 2 was made of three transistors in parallel connection (inset in Figure 10). The overall M 2 dimensions were W = 1173 µm (implemented with 51 fingers), and L = 0.5 µm. The MOS temperature transducer was placed in the free space existing between two of these transistors. When the DC bias of the PA was V DD = 3.3 V and V cnt = 3 V, it had a current consumption of 22 mA. Experimental characterization of the PA reported a central frequency of 420 MHz, a maximum gain of 12 dB and a 1 dB compression point referred to the input of −4 dBm. To minimize parasitics in the RF measurements, the chip was directly soldered to the board (chip on board).
In order to demonstrate the sensor monitoring capability, the PA was AC driven with a heterodyne approach: two sinusoidal signals of input power P i and frequencies (f RF − ∆f /2) and (f RF + ∆f /2). This driving generated power dissipation in transistor M 2 , with a spectral component at ∆f and an amplitude P ∆f . Previous work [32,33] indicated that P ∆f depended on both the voltage gain of the amplifier at f RF and on the inputoutput matching at the same frequency. As elaborated in Section 3, this power dissipation generated an AC sensor output voltage superimposed to V DD /2, whose content at ∆f can be written as: v Sensors 2021, 21, x FOR PEER REVIEW 11 of 16 depended on both the voltage gain of the amplifier at fRF and on the input-output matching at the same frequency. As elaborated in Section 3, this power dissipation generated an AC sensor output voltage superimposed to VDD/2, whose content at Δf can be written as: ( ) = · cos(2π · · + Φ ).  Figure 11 shows the sensor's output voltage amplitude AO as a function of the total output power delivered by the PA to a 50 Ω load. The temperature transducer was biased with a current IB = 20 nA and the sensor's filter with VBIAS = 1.2 V. The PA was driven with two tones with fRF = 420 MHz (its central frequency) and Δf = 1 kHz. Pi was swept to get a total output power delivered to the load ranging from −40 dBm to 0 dBm. This output power range was below the 1dB compression point, ensuring constant PA gain for all the cases. The PA output power was measured with the Agilent E4443A spectrum analyzer. The sensor output voltage was measured with both the DMM in AC mode, and the LIA locked at Δf.   Figure 11 shows the sensor's output voltage amplitude A O as a function of the total output power delivered by the PA to a 50 Ω load. The temperature transducer was biased with a current I B = 20 nA and the sensor's filter with V BIAS = 1.2 V. The PA was driven with two tones with f RF = 420 MHz (its central frequency) and ∆f = 1 kHz. P i was swept to get a total output power delivered to the load ranging from −40 dBm to 0 dBm. This output power range was below the 1 dB compression point, ensuring constant PA gain for all the cases. The PA output power was measured with the Agilent E4443A spectrum analyzer. The sensor output voltage was measured with both the DMM in AC mode, and the LIA locked at ∆f. depended on both the voltage gain of the amplifier at fRF and on the input-output matching at the same frequency. As elaborated in Section 3, this power dissipation generated an AC sensor output voltage superimposed to VDD/2, whose content at Δf can be written as:  Figure 11 shows the sensor's output voltage amplitude AO as a function of the total output power delivered by the PA to a 50 Ω load. The temperature transducer was biased with a current IB = 20 nA and the sensor's filter with VBIAS = 1.2 V. The PA was driven with two tones with fRF = 420 MHz (its central frequency) and Δf = 1 kHz. Pi was swept to get a total output power delivered to the load ranging from −40 dBm to 0 dBm. This output power range was below the 1dB compression point, ensuring constant PA gain for all the cases. The PA output power was measured with the Agilent E4443A spectrum analyzer. The sensor output voltage was measured with both the DMM in AC mode, and the LIA locked at Δf.  Focusing on DMM measurements, the sensor tracked the power delivered to the load when it was in the range [−25 dBm, −6 dBm] Below this range (−27 dBm, as labelled in Figure 11), DMM readings reached the noise level (which was 12 mV RMS ,). At the other end of the sensor's linear range above −6 dBm, the sensor output signal became clipped. LIA measurements show that the sensor was able to track the output power delivered to the load for values lower than −6 dBm, with very good agreement with DMM measurements in the range [−19 dBm, −6 dBm]. When the sensor output voltage became clipped, DMM measurements were slightly higher than LIA ones as DMM AC measurements take into account both the sensor's output fundamental and the harmonics generated by the clipping.

Output Power Monitoring
If the sensor must track the PA output power for values higher than −6 dBm, the sensor sensitivity (A O /P A ) should be reduced. For example, reducing A O /P A by a factor of ten would enable us to measure up to 4 dBm instead of −6 dBm. This would allow, for example, extending the sensor linear response up to the PA compression, and thus be able to monitor its 1-dB compression point.
Several strategies can be followed to reduce the sensor sensitivity: (i) increasing the distance between the CUT and the temperature transducer T 1 in the IC layout [40]; (ii) decreasing the BPF gain below the current A v = 500, which opens the possibility to implement BPF amplifiers with tunable gain for dynamic range extension and (iii) changing the transducer's T 1 dimensions or bias [43,44]. All these strategies require either a custom layout depending on the target measurements or the design of additional complex circuits, such as tunable gain networks or a programmable transducer bias. Nevertheless, there is another strategy that can be used without redesigning the sensor or the sensor placement. As pointed out by Figure 9 and discussed in Section 3, the sensor sensitivity can be reduced by choosing a ∆f value higher than f c . To illustrate this sensitivity reduction, Figure 12 shows the A O,RMS measured with the DMM when increasing ∆f above 1 kHz, for three constant PA output power values. Focusing on Pout = −6 dBm, with ∆f = 1 kHz the sensor output had already reached the saturation level observed in Figure 11. As ∆f was increased, the measured output amplitude decreased (i.e., the sensor enters in the linear range), thus enabling the possibility to monitor higher output powers. Finally, when ∆f = 200 kHz, the DMM output reached the noise level, and P out = −6 dBm became the Pout NOISE_LEVEL . From Figure 12, Pout NOISE_LEVEL was −21 dBm when ∆f = 10 kHz, and −11 dBm when ∆f = 100 kHz. Therefore, ∆f selection allowed us to easily adjust the linear response of the sensor to different ranges of dissipated power. end of the sensor's linear range above −6 dBm, the sensor output signal bec LIA measurements show that the sensor was able to track the output power the load for values lower than −6 dBm, with very good agreement with DM ments in the range [−19 dBm, −6 dBm]. When the sensor output voltage bec DMM measurements were slightly higher than LIA ones as DMM AC measu into account both the sensor's output fundamental and the harmonics gen clipping.
If the sensor must track the PA output power for values higher than sensor sensitivity (AO/PA) should be reduced. For example, reducing AO/PA ten would enable us to measure up to 4 dBm instead of −6 dBm. This wou example, extending the sensor linear response up to the PA compression, and to monitor its 1-dB compression point.
Several strategies can be followed to reduce the sensor sensitivity: (i) i distance between the CUT and the temperature transducer T1 in the IC la decreasing the BPF gain below the current Av = 500, which opens the possibi ment BPF amplifiers with tunable gain for dynamic range extension and (iii) transducer's T1 dimensions or bias [43,44]. All these strategies require either out depending on the target measurements or the design of additional com such as tunable gain networks or a programmable transducer bias. Neverth another strategy that can be used without redesigning the sensor or the senso As pointed out by Figure 9 and discussed in Section 3, the sensor sensitiv duced by choosing a Δf value higher than fc. To illustrate this sensitivity redu 12 shows the AO,RMS measured with the DMM when increasing Δf above 1 k constant PA output power values. Focusing on Pout = −6 dBm, with Δf = 1 kH output had already reached the saturation level observed in Figure 11. A creased, the measured output amplitude decreased (i.e., the sensor enters range), thus enabling the possibility to monitor higher output powers. Final 200 kHz, the DMM output reached the noise level, and Pout = −6dBm PoutNOISE_LEVEL. From Figure 12, PoutNOISE_LEVEL was −21 dBm when Δf = 10 dBm when Δf = 100 kHz. Therefore, Δf selection allowed us to easily adjust sponse of the sensor to different ranges of dissipated power.  Figure 13 shows the RF power delivered to the load at the frequency (fRF ured with the RF spectrum analyzer connected to the PA's output; and the se voltage measured with the DMM in AC mode; both as a function of fRF.  Sensor and PA had the same bias than the one reported in the previous section. I this experiment, the only swept input variable was the frequency fRF (from 120 to 92 MHz). In all the measurements, Δf = 1 kHz, and the total PA input power was −20 dBm (−23 dBm each tone), i.e., the PA had a linear behavior. The spectrum analyzer measure ments indicated that the PA central frequency was 420 MHz, which agreed with the fre quency fRF where the sensor's output amplitude at Δf was maximum [31].

Conclusions
A single MOS transistor used as a temperature transducer connected to a BPF ampl fier was presented, characterized and assessed for IC testing applications. The overall sen sor circuit was implemented in a standard 0.35 μm CMOS technology, and was built-i with devices acting as controlled heat sources, and an RF power amplifier was used as CUT.As strong points, heterodyne measurements could be done with a simple DMM, a lowing a simplification of the measurement set-up. As the LIA was not required, ther was no need for locking the frequencies of all the generators involved in the set-up meas urements. Moreover, the task of the DMM could be easily integrated with the CUT, allow ing a complete built-in self-test (BIST) solution. As weak point, as DMM integrated nois on a wider bandwidth, DMM readings did not reach the sensitivity levels achieved wit an LIA. The sensor characterization showed that the nonlinear R2 behavior did not affec the sensor's linearity as long as Δf was higher than the first BPF's cut-off frequency. More over, the sensor sensitivity could be reduced by selecting a Δf higher than the BPF's centra frequency, allowing extension of the sensor's dynamic range. As a proof of concept, w showed the feasibility of the circuit to track the output power delivered to the load an the central frequency of a RF class-A power amplifier.
Future directions of our research are the usage of temperature sensors as monitors i circuits used to compensate the effects of time-variability (e.g., aging) in RF circuits.

Patents
PCT/ES2013/070095: Sensor Circuit for Obtaining small-signal temperature measure ments in integrated circuits.  Sensor and PA had the same bias than the one reported in the previous section. In this experiment, the only swept input variable was the frequency f RF (from 120 to 920 MHz). In all the measurements, ∆f = 1 kHz, and the total PA input power was −20 dBm (−23 dBm each tone), i.e., the PA had a linear behavior. The spectrum analyzer measurements indicated that the PA central frequency was 420 MHz, which agreed with the frequency f RF where the sensor's output amplitude at ∆f was maximum [31].

Conclusions
A single MOS transistor used as a temperature transducer connected to a BPF amplifier was presented, characterized and assessed for IC testing applications. The overall sensor circuit was implemented in a standard 0.35 µm CMOS technology, and was built-in with devices acting as controlled heat sources, and an RF power amplifier was used as a CUT. As strong points, heterodyne measurements could be done with a simple DMM, allowing a simplification of the measurement set-up. As the LIA was not required, there was no need for locking the frequencies of all the generators involved in the set-up measurements. Moreover, the task of the DMM could be easily integrated with the CUT, allowing a complete built-in self-test (BIST) solution. As weak point, as DMM integrated noise on a wider bandwidth, DMM readings did not reach the sensitivity levels achieved with an LIA. The sensor characterization showed that the nonlinear R 2 behavior did not affect the sensor's linearity as long as ∆f was higher than the first BPF's cut-off frequency. Moreover, the sensor sensitivity could be reduced by selecting a ∆f higher than the BPF's central frequency, allowing extension of the sensor's dynamic range. As a proof of concept, we showed the feasibility of the circuit to track the output power delivered to the load and the central frequency of a RF class-A power amplifier.
Future directions of our research are the usage of temperature sensors as monitors in circuits used to compensate the effects of time-variability (e.g., aging) in RF circuits.
Data Availability Statement: Data sharing is not applicable to this article.