A Straightforward Approach for Synthesizing Electromechanical Sigma-Delta MEMS Accelerometers

The EM-ΣΔ (electromechanical sigma-delta) approach is a concise and efficient way to realize the digital interface for micro-electromechanical systems (MEMS) accelerometers. However, including a fixed MEMS element makes the synthesizing of the EM-ΣΔ loop an intricate problem. The loop parameters of EM-ΣΔ can not be directly mapped from existing electrical ΣΔ modulator, and the synthesizing problem relies an experience-dependent trail-and-error procedure. In this paper, we provide a new point of view to consider the EM-ΣΔ loop. The EM-ΣΔ loop is analyzed in detail from aspects of the signal loop, displacement modulation path and digital quantization loop. By taking a separate consideration of the signal loop and quantization noise loop, the design strategy is made clear and straightforward. On this basis, a discrete-time PID (proportional integral differential) loop compensator is introduced which enhances the in-band loop gain and suppresses the displacement modulation path, and hence, achieves better performance in system linearity and stability. A fifth-order EM-ΣΔ accelerometer system was designed and fabricated using 0.35 μm CMOS-BCD technology. Based on proposed architecture and synthesizing procedure, the design effort was saved, and the in-band performance, linearity and stability were improved. A noise floor of 1 μg/Hz, with a bandwidth 1 kHz and a dynamic range of 140 dB was achieved.


Introduction
In the most recent decade, the readout interface circuit for micro-electromechanical systems (MEMS) sensors has been evolving toward digitalization [1][2][3]. It is simple to realize the digitalization by cascading an A/D converter. However, this discrete implementation is power and area consuming. Moreover, the processing and transferring of a weak analog signal is intricate and susceptible to outside interference [4,5].
The EM-Σ∆ (electromechanical sigma-delta) approach which incorporates the MEMS sensing element into a Σ∆ modulating loop is the most promising approach to realize the digitalization of sensor interface. The attractiveness comes from the fact that it is a concise implementation and fulfills the digitalization at the very front-end of the whole system; thus, it gives more latitude for digital

The MEMS Sensing Element
The MEMS sensing element is a critical part of the system, which constrains the applicable readout and feedback techniques, and affects the system's performance and stability. A surface micro-machined capacitive MEMS accelerometer with a lateral comb-finger architecture is used as the front-end sensing element, due to its high sensitivity, low noise and the ease with which it establishes feedback loop through the electrostatic effect.
It exerts dominant influence on the readout circuit from two aspects: (1) On the sensing direction: The sensing behavior of the MEMS element can be abstracted by a mass-spring-damping system, whose displacement change x can be expressed as: where ω 0 = √ k/m and Q = √ mk/b are the resonating frequency and quality factor of the sensing element respectively, a in is the input acceleration, m is the mass of the movable proof mass, b is the damping factor introduced by air friction and k is the stiffness of the cantilever beam.
As the vacuum-packaging technique is typically used for reducing the Brawnian noise, the damping factor b is extremely low and the quality factor Q is pushed higher than 100 typically. Therefore, the stabilizing task is shifted to the following electrical part, which be come a knotty problem, especially for a high-order EM-Σ∆.
(2) On the feedback direction: The feedback servo signal is exerted by the electrostatic effect of the parallel-plate sensing capacitor. However, the relationship of it is not linear, which can be expressed as: where F elec is the resultant electrostatic force due to the feedback voltage V f . C 0 and d 0 are the initial sensing capacitance and displacement of the MEMS structure. x is the real-time displacement change due to external excitation.
It can be found from Equation (2) that, the displacement change x will modulate the electrostatic force F elec . This unwanted side-effect (referred to as displacement modulation effect here) is important to the closed-loop operation. It not only degrades the closed-loop performance, but also introduces a local positive feed-forward path which will impair the system stability. The displacement modulation effect is discussed in next section in detail.
In a closed-loop configuration, the sensitivity of proposed EM-Σ∆ system is determined by the balance of input acceleration and electrostatic servo force, and it can be expressed as: where V out is the system output voltage and V S is the quantization voltage level of the one-bit quantizer. Obviously, the closed-loop sensitivity is independent of damping and stiffness factors which are vulnerable to circumstance variation. And the second-order voltage-force relationship has been linearized by the use of one-bit feedback force.

The Analog Front-End
The analog front-end generally contains two sections: an amplification stage and a loop compensator.
The amplification stage provides voltage conversion with a proper gain. It is implemented by a SC (switch capacitor) charge amplifier, which detects the differential change of the MEMS sensing capacitor.
The displacement change x to the capacitance change ∆C can be expressed as: In the system bandwidth, the front-end detecting gain K C−V could be seen as a constant, which is given by: where V S is the pre-charge voltage of the capacitance bridge, C f the feedback capacitance of front-end charge amplifier and K post is the total gain introduce by correlated double sampling and succeeding the amplifying stage. The loop compensator, traditionally, is implemented by a phase-lead filter to introduce an additional phase lead to compensate for the excessive phase shift introduced by the sensing element [8,9,17,18]. However it would lead to a loss in the in-band loop gain and cause a series of problems. Thus we propose to use a discrete time PID (proportional integral differential) compensator. The design of loop filter is discussed in the following section.

The Electrical Σ∆ Loop Filter
The electrical Σ∆ loop filter realizes the digitalization of the analog signal and provides main part of quantization noise modulation. The selection of Σ∆ modulating order is a compromise between the sensing element and circuit performance, which stems from the following aspects [6,11,15]: 1. The sensing element, although providing a second order filtering characteristic, has a very limited in-band gain. It is not competent at suppressing the quantization noise alone, especially when high-voltage feedback is used. 2. The Σ∆ modulating loop faces a more serious stability problem as the order goes higher. More seriously, a vacuum packaged MEMS sensing element is used.
3. The low order Σ∆ exhibits more limit cycles, which will induce an early instability due to the displacement modulation effect.
Thus, the order of the electrical Σ∆ loop filter used was chosen to be three. Together with the second-order sensing element, a fifth-order EM-Σ∆ is established. Its architecture is shown in Figure 2. The detailed deduction of its transfer function can be found in [20].

The Analysis of Control Loops
The synthesizing of an EM-Σ∆ system is a more difficult problem compared to an electrical Σ∆ modulator or a purely analog closed-loop. The difficulty comes from many aspects: 1. The sensing element is highly under-damped, which is easily self-excited. 2. The residue displacement introduces a local feed-forward path, which aggravates the stability problem. 3. The whole system is a high-order Σ∆ loop, whose first two stage cannot be tuned, and only an approximately linear model is available.
In this section we will try to clarify the mixture of those problem, and further, propose a straightforward design procedure which is more efficiently. The abstracted mathematical signal flow diagram of the system is shown in Figure 3. Note that, the loop characteristic is different at the viewpoint of signal and quantization noise respectively. Thus we proposed to take a separate consideration about the loop characteristic, as noted on Figure 3. In addition, the displacement modulation effect will introduce a localized positive feed-forward path, also noted in Figure 3. As will be discussed, it is specially impactful when there is a mismatch at front-end.
Here, we propose: (1) ensuring the stability of the signal loop; (2) that at the foundation, further adjustment should be made, taking the localization positive feed-forward path into consideration, (3) checking the digital quantization noise loop, using existing Σ∆ design method.

The Stability of the Signal Loop
At the signal point of view, which is residue displacement here, the third-order electrical Σ∆ section is a "black-box" which could be expressed by its constant signal transfer factor STF 0 . Thus, the signal flow diagram of the signal loop can be simplified as shown in Figure 4. The localized positive feed-forward path is not taken into consideration here, since it is a side-effect and focus should be put on the primary contradiction at this design stage.  The open-loop transfer function, which is an effective inspection of the stability, can be derived from Figure 4: where η 0 is a loop constant which absorbs all constant terms. H ms (z) is the equivalent discrete-time transfer function of the mechanical sensing element, taking the timing effect into consideration, as described by X.S. Jiang [21]. H C (z) is the discrete-time transfer function of the loop compensator. K V−a (x, D out ) is the electrostatic feedback factor. When the residue displacement modulation is omitted here, K V−a (x, D out ) is degenerated to a constant K V−a From this point of view, it is obvious that the stabilization of the sensing element is mainly determined by the loop compensator H C (z). As mentioned, previous researchers mainly resorted to a phase lead compensator, whose expression is shown in Equation (8). The transfer function H C (z) of traditional phase lead compensator is: However, the in band gain provided by the compensator is 1 − α. Obviously, the providing of high frequency phase lead is at the expense of significant losing of in-band gain. The situation is especially serious, when compensating a high-Q element, where an α higher than 0.9 is needed.
The insufficiency of in-band loop gain will cause problems in many aspects: 1. Control error is introduced, causing signal-dependent nonlinearity in the output. 2. The residue displacement can not be sufficiently suppressed, which will cause a stability problem through the localized positive feed-forward path. 3. The noise shaping ability of the mechanical path is reduced, resulting in an increased input referred quantization noise level.
In order to solve these problems, we introduce a new type of compensator for stabilizing the EM-Σ∆ signal loop, whose transfer function is in the form of: In the expression, there are three sections: a proportional section with a coefficient K P , an integral The proposed type of compensator presents a PID control characteristic, whose frequency response is shown in Figure 5a.
As shown in Figure 5a, at high frequency, the proposed compensator contributes the same phase lead compensation as the traditional one, which has a depth factor α = 0.9. However, at low frequency, the in-band loop gain of proposed compensator is significantly larger-40 dB at 1 Hz, compared to the -20 dB decrement of a traditional compensator.
The frequency response of the total loop gain LG(z) with a different type of compensator is shown in Figure 5b. As shown, the proposed compensator achieves the same phase margin about 50 • as the traditional one, but in-band gain is greatly enhanced. It should be noted that there are multiple −180 • crossings in the proposed loop. However, in the frequency range where the magnitude is larger than 0 dB, the number of positive crossings of −180 • equals the negative crossings of −180 • . Thus the Nyquist stability criterion is satisfied, the signal loop is stable [22].

The Local Positive Feed-Forward Path
The local positive feed-forward path is caused by the displacement dependence of the electrostatic feedback force, referred to as displacement modulation effect. Thus, there is an implied feed-forward path from displacement x to the feedback factor K V−a . The total feedback factor β is the summation of the signal path and the displacement modulation path. By rearranging Figure 3, the simplified signal flow diagram to emphasize the local positive feed-forward path is shown in Figure 6. Where G 0 (z) is the lumped feed-forward gain of the electrical circuit: And K V−a is the electrostatic factor with displacement modulation taken into consideration, which can be written as: where D out is the one-bit output, whose value is either 1 or −1.D out is the represented analog value, which can be got by averaging the output bit stream, whose value is continuous in [−1,1]. The expression represents the averaging effect of the bi-directional digital force, whose occurrence probability is (1 +D out )/2 on one side and (1 −D out )/2 on the other side. The corresponding parallel-plate distances of each side are d 1 and d 2 . Consider there is a displacement mismatch ∆d due to parasitics and a displacement change x due to external acceleration; then: And note that, by the represented analog valueD out = xG 0 (z), and by substituting Equation (12) in to Equation (16), then the total feedback factor β can be expressed as: where γ 0 = ∆d/d 0 is the mismatch factor. By using Talyor expansion, Equation (13) can be expressed as: It can be found from Equation (14) that: 1. There are odd order harmonics due to the displacement modulation effect. 2. When there is a displacement mismatch ∆d, even order harmonics will come out. 3. In the expression, there are two opposite polarity terms. The total polarity is determined by the mismatch degree γ 0 and the loop gain G 0 .
Thus, in order to avoid the undesirable change in feedback polarity, the loop gain G 0 should be above a certain limit. The lowest limit is determined by the tolerable displacement mismatch degree γ 0 . The value of feedback factor β with the mismatch degree γ 0 at different loop gain G 0 is shown in Figure 7. As shown, the polarity of β will change to a negative if the mismatch factor γ 0 exceeds a certain range. As G 0 goes down, the tolerable range could shrink to zero, which means the system is highly unstable. Figure 7. The value of β with the mismatch factor γ 0 at different loop gain values (G 0 ). Figure 8. A 1 g sinusoidal input acceleration is exerted onto the MEMS accelerometer, at a mismatch level of γ 0 = 20%. The waveform in front of the electrical Σ∆ modulator is shown. As shown, the system which uses traditional phase lead compensator is unstable. However, when the compensator is changed to the proposed PID compensator, the output goes back to being stable due to the enhancement of loop gain.

The Digital Quantization Noise Loop
The EM-Σ∆ system is also a digital output system, where the digitalization is fulfilled by the one-bit quantizer. The one-bit quantizer causes nonlinearity in two ways: (1) an indeterminate quantization gain; (2) an additional quantization noise. From the viewpoint of quantization noise, the signal flow diagram could be rearranged as Figure 9. According the signal flow diagram shown in Figure 9, the quantization noise transfer function NTF EM−Σ∆ of the EM-Σ∆ system can be derived as: where L 0 (z) and L 1 (z) are the transfer functions of forward and feedback path of third-order Σ and ∆ filters respectively; L MS (z) is the lumped signal transfer function of the mechanical path.
The system is further checked out by a fifth order EM-Σ∆ modulator in multiple ways, following the traditional stability criterion of purely electrical Σ∆ ADC [20,23]. The test result is shown in Figure 10. It can be found that: 1. The Lee stability criterion: max|NTF EM−Σ∆ (z)| < 1.5 is satisfied [23] (as shown in Figure 10a). 2. The loop parameter is optimized according the root locus plot, making the stability boundary at gain = 0.23 (as shown in Figure 10b). 3. The amplitude of each critical node is observed, in case of the occurrence of overload (as shown in Figure 10c).

Implementation Details
A fifth-order EM-Σ∆ MEMS accelerometer system was designed using proposed method. After system level synthesizing of loop parameters, circuit level implemetation is carried on. Shown in Figure 11, is the top level implementation of the fifth-order EM-Σ∆ loop. The top level switching behavior is toggling between four working phases: (1) Reset (RST); (2) positive sense (SenA); (3) negative sense (SenB); (4) force feedback (FDB). The timing diagram is also shown in Figure 11. At first, the MEMS sensing element is broken from the interface; both the sensing capacitance bridge and the front end circuit are put into reset mode. All the charges sorted in the previous force feedback stage are clear, and each node is returned to low voltage state; thus, realizing the isolation of HV (high voltage) and LV (low voltage) isolation in time domain. After the preparing of reset phase, there are two inverted sensing phases, in which the capacitance bridge charges to invert voltages. By subtracting the sensed voltage sorted on the C CDS , the unchanged front-end mismatch and low-frequency noise get canceled out, achieving a good low frequency noise performance. Next, the sensing element is disconnect from the front-end circuit again. A HV electrostatic voltage is exerted onto the sensing element at the logic control of output state D out ; thus, realizing the port multiplexing.
The circuit diagram of the front-end amplifier is shown in Figure 12. The amplifier is implemented using a fully-differential two-stage architecture. A class-AB output stage is used for driving the large front-end capacitor in sensing phase and achieving better linearity performance. Furthermore, the front-end mismatch can be tuned out by reserved trimming current source I trim array. The trimming array is binary coded, and can be accessed by preserved serial peripheral interface (SPI) interface. The circuit diagram of back-end discrete-time PID compensator and third-order electrical Σ∆ modulator is shown in Figure 13. For simplicity, the diagram is shown in single-ended version, and fully-differential version could easily be derived. The third-order electrical is implemented using existing feed-forward architecture; the switching logic and timing diagram are also shown in Figure 13. The proposed discrete-time PID compensator is implemented by OTA 1,2 and capacitors C 1∼5 . The transfer function of it can be derived by the flowing charge balancing equation: where the V out_I and V out_PD are the output voltages of integral and proportional-derivative stages respectively. The summation of them is realized on the sampling capacitance C 6 of the first Σ∆ integrator. In the sampling phase, the charge sampled onto C 6 can be expressed.
Then the PID coefficients K P , K I , K D can be given in Equation (20), and can be adjusted by the capacitor ratio between C 1∼5 .

Results and Discussion
The proposed EM-Σ∆ readout interface for MEMS accelerometers was designed and fabricated in 0.35 µm CMOS-BCD process with a chip area 4.0 × 3.8 mm. The micro-photograph of the die of the application specific integrated circuit ASIC is shown in Figure 14. The interface ASIC contains HV (high-voltage) switches, fully-differential operational transconductance amplifiers, switch-capacitor arrays, a testing interface, a digital timing sequence and on-chip BIST (built in self-test) and calibrating logic. The clock frequency is 500 kHz, which is referenced from an off-chip quartz crystal. The ASIC consumes 35 mW from low noise ±2.5 V DC supply. The HV driving voltage is powered from an off-chip 12 V voltage source. The interface ASIC was tested with a vacuum packaged MEMS accelerometer. The MEMS accelerometer has a resonating frequency f 0 at 1 kHz and a quality factor Q as high as 200. The interface ASIC and MEMS accelerometer are mounted to a PCB mother board (as shown in Figure 15) for coordinate testing. The key nodes inside the interface ASIC are led outside for testing by a high speed buffer, in the case of disturbing the loop characteristic. The critical loop parameters (e.g., K P , K I , K D and input offset) can be tuned by on-chip capacitance arrays. The test point selection and parameter adjustment can be fulfilled online by a digital SPI interface between testing mother board and readout ASIC.

MEMS Sensing Element
Top Electrode

Readout
Interface ASIC Figure 15. The photograph of the testing mother board with a ASIC and MEMS accelerometer mounted. Figure 16, is the step-response of the EM-Σ∆ loop. This functional test is full-filled by BIST function. The on-chip BIST excitation source generates a square-wave voltage excitation; the amplitude is 5 V pp , providing an equivalent acceleration of approximate 5 g (calculated by electrostatic force Equation (2)). The waveform shows the rising edge and falling edge response of the integral section of PID compensator and the first stage of the electrical Σ∆ filter. It can be found that, the proposed PID loop compensator provides sufficient electrical damping to the highly under-damped MEMS sensing element. Thus results in an over-damped step response. The proposed system shows excellent stability performance.  The full-scale nonlinearity was tested by a series of DC tests; the nonlinearity test result is shown in Figure 17. The input DC accelerations are generated by electrostatic force. As shown, the initial linearity performance is over 0.8%. This is due to the fact that the parasitic capacitance mismatch level is high, which deflects the proof mass from its central balanced position. This deflection will cause asymmetry in digital feedback force (as shown in Equation (14)) and induce nonlinearity in the output transfer function. The mismatch can be compensated by tuning the preserved compensating capacitors and the trimming current source in the front-end amplifier. After matching adjustment, the nonlinearity could be effectively reduced. Compared by traditional phase-lead compensator, the proposed PID compensator achieves a better linearity performance, due to the improvement in in-band gain. As shown, the nonlinearity of proposed architecture achieves a nonlinearity level below 0.2%, which is about 1/3 of traditional phase-lead compensator. And the tendency of increased nonlinearity with higher input acceleration is not obvious; this means the residue displacement induced error is effectively suppressed. The output bit stream of the EM-Σ∆ accelerometer is captured by logic analyzer Agilent 16804A. Using the captured bit stream, the input referred noise spectrum density of the system in a static 1 g environment is calculated by 524,288 point FFT (fast Fourier transform). The result is shown in Figure 18, with magnitude normalized to µg/ √ Hz. It was found that the proposed system achieved a noise floor as low as 1 µg/ √ Hz in a frequency range extending up to 1 kHz. With a full scale range of ±5 g, a dynamic range of 140 dB was achieved.

Conclusions
This paper provides a straightforward viewpoint from which to analyze the EM-Σ∆ loop. The complicate electromechanical loop was analyzed and discussed in three aspects: the signal loop; the local positive feed-forward path; the quantization noise loop. We pointed out that the synthesizing procedure should be taken step by step.
At each design stage, by taking separate consideration and proper simplification, the loop synthesizing problem is made clear and straightforward. By the proposed design step, the designer could avoid facing a mixture of the knotty problem at first and get a quick intuitive understanding of the loop behavior at once.
A fifth-order EM-Σ∆ accelerometer was realized using proposed design methodology. By a clear understanding the signal loop and local positive feed-forward path, a more effective discrete-time PID loop compensator is used to instead traditional phase-lead one. The test results shows that the proposed PID compensator provides sufficient electrical damping to the highly under-damped MEMS accelerometer. The linearity is improved compared to traditional phase-lead system. A noise floor of 1 µg/ √ Hz was achieved, with a bandwidth 1 kHz and a dynamic range of 140 dB.

Conflicts of Interest:
The authors declare no conflict of interest.