Combined Organic Photovoltaic Cells and Ultra Low Power CMOS Circuit for Indoor Light Energy Harvesting

This paper describes an energy harvesting system composed of an organic photovoltaic cell (OPV) connected to a DC–DC converter, designed in a 130 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology, with a quasi- maximum power point tracking (MPPT) algorithm to maximize the system efficiency, for indoor applications. OPVs are an emerging technology with potential for low cost indoor light energy harvesting. The OPV current-voltage curves (I-V) under an irradiance of solar simulator Oriel Sol 3A, at room temperature, are obtained and an accurate electrical model is derived. The energy harvesting system is subjected to four different indoor light sources: 35 W halogen, 3.5 W LED, 5 W LED, and 7 W LED, positioned at three different heights (0.45 m, 0.26 m, and 0.11 m), to evaluate the potential of the system for indoor applications. The measurements showed maximum efficiencies of 60% for 35 W halogen and 45% for 7 W LED at the highest distance (0.45 m) and between 60% (5 W LED) and 70% (35 W halogen), at the shorter distance (0.11 m). Under irradiation, the integrated CMOS circuit presented a maximum efficiency of 75.76%, which is, to the best of the authors’ knowledge, the best reported power management unit (PMU) energy system using organic photovoltaic cells.


Introduction
The downscaling of integrated circuit technology, especially CMOS, is pushing the limits of miniaturization and portability. The availability of ultra-low power (µW) and complex monolithic circuits in CMOS nanotechnology opens new research on Internet of Things (IoT) solutions for a wide range of applications [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18], including sensing, data processing, and communication. The power requirement for these systems depends on the application. Although these 'smart' sensors are typically battery powered [19], the use of harvesting techniques to obtain energy from different sources, such as ambient light, vibration/motion of human body parts, temperature differences, and Radio Frequency (RF) electromagnetic radiation, can improve battery lifetime and energy autonomy. Harvesting from Radio Frequency (RF) electromagnetic radiation, can improve battery lifetime and energy autonomy. Harvesting from the sun or ambient light is the most effective way to power a sensor node, with power densities in the range of tens of mW/cm 2 [20,21]. Light energy harvesting ( Figure  1) depends upon the ambient light to be harvested, which may be a mix between natural light coming from the outside, and artificial light provided by overhead lamps or luminaries.
A previous work [21] that reported on indoor light availability, in which the artificial light was generated by fluorescent light tubes, showed that when placing the harvester very close to overhead lamps, it was possible to achieve an irradiance of 10 W/m 2 . A more in-depth study was carried out in [22], in which the light availability inside an office was assessed for different times of the day, encompassing various ways to place and orient a harvester, either giving more emphasis to natural light, artificial light, or a combination of both. The worst-case irradiance during daytime, for solar radiation inside the room, had the value of 130 mW/m 2 . In addition, when using artificial light only, at night time, the worst-case measurement yielded a value of 730 mW/m 2 . The artificial light was provided by two fluorescent light tubes, each with a power of 36 W [22].
More recent studies have mainly focused on the use of flexible photovoltaic films of various natures, under LED lighting [23], taking into consideration that the typical irradiance amounts of 66 mW/m 2 , down to 7 mW/m 2 , are enough for the tested photovoltaic (PV) harvesting modules to operate favorably. The operating spectrum of the LED devices considered in [23] are very similar to those used in the present work. In this work, an organic photovoltaic cell is used as the harvesting device. OPVs is an emerging technology based on heterojunctions of organic semiconductors (organic compounds, polymers, carbon-nanoparticles) [24][25][26]. These compounds can have very different chemical structures and properties. The solubility in common solvents is important because it allows the active/organic layer of the devices to be processed from solutions, i.e., as inks, by low cost deposition methods (e.g., spin coating, ink-jet printing, or roll-to-roll printing) over flexible substrates (plastics, e.g., PET, polyethylene terephtalate). The unique characteristics of OPVs, such as being lightweight and flexible, combined with their performance under diffuse light, allows for applications that more conventional technologies, such as crystalline silicon-based cells, cannot be easily adapted to, despite their higher efficiencies. State-of-the-art OPVs have already achieved power density levels of 14 mW/cm 2 under simulated solar light of 100 mW/cm 2 in laboratory prototypes, using glass substrates [27].
Typically, harvesting devices are connected to a power management unit based on a separated DC-DC converter. The harvested source is typically a thermoelectric generator (TEG) and the DC-DC conversion is mostly based on switched inductive converters (usually boost type), with battery assisted, mechanical, capacitor pre-charge, RF kick-start, or even step-up transformers power-up schemes [28][29][30][31][32]. Fully electric power-up solutions from a few tens of mV can be a CMOS Integrated Circuit (IC) and external high-value energy storage components (values of external inductances and capacitances can be as high as 1 mH and 100 µF, respectively) on a separate Printed Circuit Board (PCB) [33][34][35]. The DC-DC converters have been designed for relatively small input voltage variations (few tens to few hundreds of mV), due to the TEG harvesting output range. However, in contrast with TEGs, harvesting from PV cells requires a converter for a wider range of input voltages In this work, an organic photovoltaic cell is used as the harvesting device. OPVs is an emerging technology based on heterojunctions of organic semiconductors (organic compounds, polymers, carbon-nanoparticles) [24][25][26]. These compounds can have very different chemical structures and properties. The solubility in common solvents is important because it allows the active/organic layer of the devices to be processed from solutions, i.e., as inks, by low cost deposition methods (e.g., spin coating, ink-jet printing, or roll-to-roll printing) over flexible substrates (plastics, e.g., PET, polyethylene terephtalate). The unique characteristics of OPVs, such as being lightweight and flexible, combined with their performance under diffuse light, allows for applications that more conventional technologies, such as crystalline silicon-based cells, cannot be easily adapted to, despite their higher efficiencies. State-of-the-art OPVs have already achieved power density levels of 14 mW/cm 2 under simulated solar light of 100 mW/cm 2 in laboratory prototypes, using glass substrates [27].
Typically, harvesting devices are connected to a power management unit based on a separated DC-DC converter. The harvested source is typically a thermoelectric generator (TEG) and the DC-DC conversion is mostly based on switched inductive converters (usually boost type), with battery assisted, mechanical, capacitor pre-charge, RF kick-start, or even step-up transformers power-up schemes [28][29][30][31][32]. Fully electric power-up solutions from a few tens of mV can be a CMOS Integrated Circuit (IC) and external high-value energy storage components (values of external inductances and capacitances can be as high as 1 mH and 100 µF, respectively) on a separate Printed Circuit Board (PCB) [33][34][35]. The DC-DC converters have been designed for relatively small input voltage variations (few tens to few hundreds of mV), due to the TEG harvesting output range. However, in contrast with TEGs, harvesting from PV cells requires a converter for a wider range of input voltages (100 mV < V OC < 1 V). There are few reported works on step-up conversion of a PV cell output voltage, [36][37][38][39][40].
Battery powered systems usually include a power management unit (PMU) to achieve a fixed regulated voltage with variable battery charge levels [41][42][43][44][45][46][47]. The architecture of the system proposed in this work is new with respect to state-of-the-art systems, as it leads to a small size (<1 cm 2 ) and an energy self-sustainable device (Figure 2), suitable for portable applications.
The main goal of this paper is the development of a batteryless ultralow-power energy supply system, combing organic photovoltaic cell and a PMU (an integrated CMOS circuit) for indoor applications. (100 mV < VOC < 1 V). There are few reported works on step-up conversion of a PV cell output voltage, [36][37][38][39][40]. Battery powered systems usually include a power management unit (PMU) to achieve a fixed regulated voltage with variable battery charge levels [41][42][43][44][45][46][47]. The architecture of the system proposed in this work is new with respect to state-of-the-art systems, as it leads to a small size (<1cm 2 ) and an energy self-sustainable device (Figure 2), suitable for portable applications.
The main goal of this paper is the development of a batteryless ultralow-power energy supply system, combing organic photovoltaic cell and a PMU (an integrated CMOS circuit) for indoor applications.
The device architecture is shown in Figure 3:

OPV Fabrication and Characteristics
The OPV devices were prepared on indium tin oxide (ITO), (100 nm thick)-coated glass substrates previously cleaned sequentially with distilled water and a non-ionic detergent, distilled water, acetone, and isopropyl alcohol under ultrasounds.
The device architecture is shown in Figure 3:

OPV Electrical Model (I-V Characterization)
A photovoltaic cell can be characterized from its current-voltage curves (I-V), obtained in two different light conditions: Dark and standard solar conditions, i.e., under AM1.5G light with an irradiance of 100 mW/cm 2 .
The equivalent circuit of the cell, as shown in Figure 4a, can be obtained from the curve in the dark. It is described by a combination of a junction diode D and two resistors (Rs and Rp). The resistors Rs and Rp are associated with losses and leakage currents, respectively.  The cells were fabricated with an absorbing layer composed of a bulk heterojunction of organic semiconductors, where the p-type semiconductor is a polymer, and the n-type semiconductor is a fullerene. When the light radiation struck the active layer, through the glass transparent electrode, a flow of charges was generated, which can be collected near the electrodes area. In this way, the diode D in the equivalent circuit diagram, allowed to characterize the p-n junction. The equation of Id running through the diode is depicted in (1), where Is is the saturation current of the diode, n is the diode factor, VD is the voltage at the terminals of the diode and VT is the thermal voltage. It should be noted that VD = Vout − I × Rs.
The thermal voltage is defined from Equation (2) where k represents Boltzmann's constant, T the cell temperature and q the electron charge.

OPV Electrical Model (I-V Characterization)
A photovoltaic cell can be characterized from its current-voltage curves (I-V), obtained in two different light conditions: Dark and standard solar conditions, i.e., under AM1.5G light with an irradiance of 100 mW/cm 2 .
The equivalent circuit of the cell, as shown in Figure 4a, can be obtained from the curve in the dark. It is described by a combination of a junction diode D and two resistors (R s and R p ). The resistors R s and R p are associated with losses and leakage currents, respectively.

Organic Photovoltaic Cell Electrical Model (I-V Characterization)
A photovoltaic cell can be characterized from its current-voltage curves (I-V), obtained in two different light conditions: Dark and standard solar conditions, i.e., under AM1.5G light with an irradiance of 100 mW/cm 2 .
The equivalent circuit of the cell, as shown in Error! Reference source not found.a, can be obtained from the curve in the dark. It is described by a combination of a junction diode D and two resistors (Rs and Rp). The resistors Rs and Rp are associated with losses and leakage currents, respectively.  The cells were fabricated with an absorbing layer composed of a bulk heterojunction of organic semiconductors, where the p-type semiconductor is a polymer, and the n-type semiconductor is a fullerene. When the light radiation struck the active layer, through the glass transparent electrode, a flow of charges was generated, which can be collected near the electrodes area. In this way, the diode D in the equivalent circuit diagram, allowed to characterize the p-n junction. The equation of Id running through the diode is depicted in (1), where Is is the saturation current of the diode, n is the diode factor, VD is the voltage at the terminals of the diode and VT is the thermal voltage. It should be noted that VD = Vout − I × Rs.
The thermal voltage is defined from Equation (2) where k represents Boltzmann's constant, T the cell temperature and q the electron charge. The cells were fabricated with an absorbing layer composed of a bulk heterojunction of organic semiconductors, where the p-type semiconductor is a polymer, and the n-type semiconductor is a fullerene. When the light radiation struck the active layer, through the glass transparent electrode, a flow of charges was generated, which can be collected near the electrodes area. In this way, the diode D in the equivalent circuit diagram, allowed to characterize the p-n junction. The equation of I d running through the diode is depicted in (1), where I s is the saturation current of the diode, n is the diode factor, V D is the voltage at the terminals of the diode and V T is the thermal voltage. It should be noted that V D = Vout − I × R s .
The thermal voltage is defined from Equation (2) where k represents Boltzmann's constant, T the cell temperature and q the electron charge. The resistors represent a decrease in the efficiency of the photovoltaic cell. It is assumed that the current delivered to the load in the dark is (3).
The cell generated an I L current as a result of the incident radiation, as shown in Figure 4. The current at the terminals of the photovoltaic cell, I out , under standard irradiance conditions, is This equation shows that the efficiency of the cell is dependent on the two resistors and the diode parameters in the equivalent circuit. To enhance the efficiency of the PV cells, the series resistance R s should be close to zero and the parallel resistance R p should be as large as possible, ideally infinite.
The Fill Factor (FF) is figure-of-merit used to specify the quality of the PV cell. Considering that the voltage provided by the cell varies between zero and the open-circuit voltage V oc , and that the current supplied varies between zero and the value of the short-circuit current I sc , there is a point on the characteristic curve of the cell, where the output power is maximum, P max , i.e., this voltage/current product reaches its maximum value, with the correspondent values of current (I mp ) and voltage (V mp ). Thus, the fill factor of the photovoltaic cell, is defined as the ratio between P max and the product of the open-circuit voltage V oc and the short-circuit current I sc , It is desirable to have a FF close to 1. The capacitance of a photovoltaic cell can be represented by a capacitor in parallel with the output of the cell [50], where ε 0 corresponds to the permittivity in vacuum, K s is the dielectric constant of the semiconductor, the active area of the cell is given by A and the semiconductor thickness is defined by d. The current-voltage (I-V) characteristics are measured in an inert atmosphere (N 2 ) using a Keithley K2400 source-meter unit.
The curves under illumination are measured with the solar simulator Oriel Sol 3A, 69920, Newport. The power conversion efficiency (PCE) of the cells can be calculated from their I-V curves under illumination, using the open-circuit voltage (Voc), the short-circuit current (Isc), and the FF.
where P out is the maximum power generated by the device, P in represents the power of the incident light (provided by the solar simulator lamp), and FF is defined as in (5). For each level of irradiance, each PV cell has a specific behaviour, with different values of V oc and V mp . These two voltages are related to each other by a factor k, which can be defined as This characteristic will be exploited in the maximum power point tracking (MPPT) method that is selected for this application, considering the specific characteristics of the OPV cells that serve as harvesters in this work.

Experimental Characterization of the OPV
From the electrical point of view, the two terminals coming from the pixels implement the negative poles of each OPV while the terminal of the ITO corresponds to the positive terminal, which is common to the two pixels of the substrate. It should also be noted that the active area of each pixel was 0.24 cm 2 .
The measurement setup, in which the I-V curves were obtained (by averaging of the two pixels substrate), is shown in Figure 5. A light source was required (solar simulator) and an output variable voltage source, in which the output current was measured for different output voltage values using a data acquisition system.

Experimental Characterization of the OPV
From the electrical point of view, the two terminals coming from the pixels implement the negative poles of each OPV while the terminal of the ITO corresponds to the positive terminal, which is common to the two pixels of the substrate. It should also be noted that the active area of each pixel was 0.24 cm 2 .
The measurement setup, in which the I-V curves were obtained (by averaging of the two pixels substrate), is shown in Figure 5. A light source was required (solar simulator) and an output variable voltage source, in which the output current was measured for different output voltage values using a data acquisition system.  Four different incident radiation densities were considered, while keeping the sample-source distance of 19.5 cm, as shown in Figure 6. Figure 7 shows the measured I-V characteristic of an organic photovoltaic cell in dark condition.  Four different incident radiation densities were considered, while keeping the sample-source distance of 19.5 cm, as shown in Figure 6. Figure 7 shows the measured I-V characteristic of an organic photovoltaic cell in dark condition.
Considering that the main function of a photovoltaic cell is to provide power to a load, the OPV power curves were obtained for the different levels of incident radiation (based on the I-V curves of Figure 6), as shown in Figure 8.

Experimental Characterization of the OPV
From the electrical point of view, the two terminals coming from the pixels implement the negative poles of each OPV while the terminal of the ITO corresponds to the positive terminal, which is common to the two pixels of the substrate. It should also be noted that the active area of each pixel was 0.24 cm 2 .
The measurement setup, in which the I-V curves were obtained (by averaging of the two pixels substrate), is shown in Figure 5. A light source was required (solar simulator) and an output variable voltage source, in which the output current was measured for different output voltage values using a data acquisition system.  Four different incident radiation densities were considered, while keeping the sample-source distance of 19.5 cm, as shown in Figure 6. Figure 7 shows the measured I-V characteristic of an organic photovoltaic cell in dark condition.   Considering that the main function of a photovoltaic cell is to provide power to a load, the OPV power curves were obtained for the different levels of incident radiation (based on the I-V curves of Figure 6), as shown in Figure 8. The parameters of the OPV cell, are shown in Table 1, and the equivalent circuit ( Figure 4a) is shown in Table 2 for the different intensities of incident radiation. The five parameters (I1, IS, n, Rs and Rp) were obtained by applying a numerical least squares curve fitting technique to the I-V curves of the cells under various light conditions [51] (Figure 7) and based on the equivalent circuit Equation (4) [52]. Thus, in order to observe the accuracy of the resulting theoretical electrical model, the I-V curves of this circuit model, obtained using an electrical simulation program, were plotted for the different irradiances (as shown in Figure 9), and compared with the original I-V experimental data (presented in Table 1).  Considering that the main function of a photovoltaic cell is to provide power to a load, the OPV power curves were obtained for the different levels of incident radiation (based on the I-V curves of Figure 6), as shown in Figure 8. The parameters of the OPV cell, are shown in Table 1, and the equivalent circuit (Figure 4a) is shown in Table 2 for the different intensities of incident radiation. The five parameters (I1, IS, n, Rs and Rp) were obtained by applying a numerical least squares curve fitting technique to the I-V curves of the cells under various light conditions [51] (Figure 7) and based on the equivalent circuit Equation (4) [52]. Thus, in order to observe the accuracy of the resulting theoretical electrical model, the I-V curves of this circuit model, obtained using an electrical simulation program, were plotted for the different irradiances (as shown in Figure 9), and compared with the original I-V experimental data (presented in Table 1).  The parameters of the OPV cell, are shown in Table 1, and the equivalent circuit ( Figure 4a) is shown in Table 2 for the different intensities of incident radiation. The five parameters (I 1 , I S , n, R s and R p ) were obtained by applying a numerical least squares curve fitting technique to the I-V curves of the cells under various light conditions [51] (Figure 7) and based on the equivalent circuit Equation (4) [52]. Thus, in order to observe the accuracy of the resulting theoretical electrical model, the I-V curves of this circuit model, obtained using an electrical simulation program, were plotted for the different irradiances (as shown in Figure 9), and compared with the original I-V experimental data (presented in Table 1).  From Tables 1 and 2 we can conclude that the output current was reduced by reducing the input radiance, which led to a strong reduction in the output power. The FF slightly increased and the OPV cells performance was better for low input radiance.  From Tables 1 and 2 we can conclude that the output current was reduced by reducing the input radiance, which led to a strong reduction in the output power. The FF slightly increased and the OPV cells performance was better for low input radiance.

Integrated CMOS Test Circuit
The OPV cells studied in this work were connected to an integrated CMOS DC-D SC switch capacitor (SC) converter system with MPPT capability, designed and built using a 0.13 µm CMOS technology [53]. The block diagram of this system is shown in Figure 10.

Integrated CMOS Test Circuit
The OPV cells studied in this work were connected to an integrated CMOS DC-D SC switch capacitor (SC) converter system with MPPT capability, designed and built using a 0.13 µm CMOS technology [53]. The block diagram of this system is shown in Figure 10.
The SC voltage doubler, local supply, start up, and phase controller blocks were integrated into a CMOS silicon die with a layout area of less than 1 mm 2 . of 3 nm and a thickness (d) of 170 nm (thickness of the active layer measured with a profilometer).

Integrated CMOS Test Circuit
The OPV cells studied in this work were connected to an integrated CMOS DC-D SC switch capacitor (SC) converter system with MPPT capability, designed and built using a 0.13 µm CMOS technology [53]. The block diagram of this system is shown in Figure 10.

Switched-Capacitor Voltage Doubler with Charge Reuse
A switched capacitor-based converter was chosen to reduce the cost and volume of the overall system by avoiding an external inductor, usually required by inductive switch mode DC-DC converters. A simplified schematic of the step-up converter circuit is depicted in Figure 11. The SC voltage doubler, local supply, start up, and phase controller blocks were integrated into a CMOS silicon die with a layout area of less than 1 mm 2 .

Switched-Capacitor Voltage Doubler with Charge Reuse
A switched capacitor-based converter was chosen to reduce the cost and volume of the overall system by avoiding an external inductor, usually required by inductive switch mode DC-DC converters. A simplified schematic of the step-up converter circuit is depicted in Figure 11. This schematic also includes a switched parasitic capacitor (Cp), representing the load created by the operation of the phase controller circuit and clock drivers, shown in Figure 11. This controller circuit was responsible for producing the clock phases ϕ1, ϕ2, and ϕ3. Capacitor COPV represents the parasitic capacitance of the PV cell, which has been linearized, and is represented by its Thévenin equivalent circuit (vS and RS).
The basic principle of operation of this circuit relies of the fact that, during ϕ1, C1 is connected in parallel with vin and charged to this voltage value, whereas in ϕ2, C1 is placed in series with vin, leading to an output voltage (vout) ideally two times the input.
From the analysis of the two configurations of the circuit of Figure 11 (shown in Figure 12), in phases ϕ1 and ϕ2 it is possible to write the equations for the conservation of the charge of the circuit capacitors. These equations are obtained considering that TCLK >> RON × C1 (the switch resistance is negligible) and that TCLK << ROPV × COPV and TCLK << RL × Cout. A detailed theoretical analysis showing how these equations are derived, can be found in [53]. This schematic also includes a switched parasitic capacitor (C p ), representing the load created by the operation of the phase controller circuit and clock drivers, shown in Figure 11. This controller circuit was responsible for producing the clock phases φ 1 , φ 2 , and φ 3 . Capacitor C OPV represents the parasitic capacitance of the PV cell, which has been linearized, and is represented by its Thévenin equivalent circuit (v S and R S ).
The basic principle of operation of this circuit relies of the fact that, during φ 1 , C 1 is connected in parallel with v in and charged to this voltage value, whereas in φ 2 , C 1 is placed in series with v in , leading to an output voltage (v out ) ideally two times the input.
From the analysis of the two configurations of the circuit of Figure 11 (shown in Figure 12), in phases φ 1 and φ 2 it is possible to write the equations for the conservation of the charge of the circuit capacitors. These equations are obtained considering that T CLK >> R ON × C 1 (the switch resistance is negligible) and that T CLK << R OPV × C OPV and T CLK << R L × C out . A detailed theoretical analysis showing how these equations are derived, can be found in [53].
leading to an output voltage (vout) ideally two times the input.
From the analysis of the two configurations of the circuit of Figure 11 (shown in Figure 12), in phases ϕ1 and ϕ2 it is possible to write the equations for the conservation of the charge of the circuit capacitors. These equations are obtained considering that TCLK >> RON × C1 (the switch resistance is negligible) and that TCLK << ROPV × COPV and TCLK << RL × Cout. A detailed theoretical analysis showing how these equations are derived, can be found in [53].   From the charge conservation equations, it is possible to obtain the expressions for the steady-state input and output voltages of the circuit [53] considering an OPV at input: To minimize the area, Metal-Oxide-Semiconductor (MOS) transistor capacitors were used that have the largest available capacitance per unit area in the selected CMOS technology, which resulted in a large bottom plate parasitic capacitance, charged to v in during phase φ 1 and discharged during phase φ 2 . This lowered the efficiency of the circuit and, to improve it, it was necessary to reduce the amount of charge lost through the bottom plate parasitic capacitance. This was done by splitting the capacitance in two and duplicating the circuit. Considering now as φ 3 the old φ 2 phase, a third phase (φ 2 ), was introduced between φ 1 and φ 3 . During this new phase φ 2 , the bottom plate nodes of the two half-circuits were connected resulting in charge redistribution between the two parasitic capacitances [53]. This circuit is depicted in Figure 13. Because one of these capacitances was charged to v in , while the other was completely discharged, when they were connected, the charge was equally divided between them, and each capacitor had half of the charge of the capacitor that was firstly charged to v in . Either in phase φ 1 or in phase φ 3 , the parasitic capacitor connected to the input will already be pre-charged to half of its final charge value, thus requiring only half of the charge from the input source. From the charge conservation equations, it is possible to obtain the expressions for the steady-state input and output voltages of the circuit [53] considering an OPV at input: To minimize the area, Metal-Oxide-Semiconductor (MOS) transistor capacitors were used that have the largest available capacitance per unit area in the selected CMOS technology, which resulted in a large bottom plate parasitic capacitance, charged to vin during phase ϕ1 and discharged during phase ϕ2. This lowered the efficiency of the circuit and, to improve it, it was necessary to reduce the amount of charge lost through the bottom plate parasitic capacitance. This was done by splitting the capacitance in two and duplicating the circuit. Considering now as ϕ3 the old ϕ2 phase, a third phase (ϕ2), was introduced between ϕ1 and ϕ3. During this new phase ϕ2, the bottom plate nodes of the two half-circuits were connected resulting in charge redistribution between the two parasitic capacitances [53]. This circuit is depicted in Figure 13. Because one of these capacitances was charged to vin, while the other was completely discharged, when they were connected, the charge was equally divided between them, and each capacitor had half of the charge of the capacitor that was firstly charged to vin. Either in phase ϕ1 or in phase ϕ3, the parasitic capacitor connected to the input will already be pre-charged to half of its final charge value, thus requiring only half of the charge from the input source.  Figure 13. Schematic of the step-up doubler switch capacitor (SC) converter, using MOS capacitors with charge reuse.

Other Blocks
The clock phases that control the SC voltage doubler had a frequency that maximized the power transfer from the PV cells. Since this frequency changed with the light intensity and temperature, the controller circuit producing these clock phases should use an MPPT method in order to continuously adjust the clock frequency value. The fractional open circuit voltage (Fractional VOC) method ( [22]) was chosen, because of its simplicity. This method explores the intrinsic characteristic of PV cells, in which there is a proportionality factor (k) between their open circuit voltage and the voltage at which

Other Blocks
The clock phases that control the SC voltage doubler had a frequency that maximized the power transfer from the PV cells. Since this frequency changed with the light intensity and temperature, the controller circuit producing these clock phases should use an MPPT method in order to continuously adjust the clock frequency value. The fractional open circuit voltage (Fractional V OC ) method ( [22]) was chosen, because of its simplicity. This method explores the intrinsic characteristic of PV cells, in which there is a proportionality factor (k) between their open circuit voltage and the voltage at which the maximum power point (MPP) occurs (v MPP ). This factor must be determined beforehand, by studying the PV cell behavior under several conditions of illumination and temperature.
Pilot PV cells in open circuit (unloaded) were used to measure the open circuit voltage. The optimum voltage of the unloaded PV cell (v MPP ) was determined by multiplying the open circuit reference pilot voltage by k, using a resistive divider. The pilot PV cells can be smaller than the main PV cells and they must have the same temperature and illumination as the main cells, for the fractional V OC method to accurately track the MPP voltage. The state diagram that represents the MPPT algorithm, the generation of the three clock phases, and the conditions that must be met to go from one state to the next, are shown in Figure 14. MPPT algorithm, the generation of the three clock phases, and the conditions that must be met to go from one state to the next, are shown in Figure 14. Since this is an energy harvesting system, it must have its own power supply for the controller circuit that generates the clock signals. The main output voltage cannot be used to power the clock generation circuit, because during the start-up of the system will remain close to 0 V for a long time, if there is a large capacitance at the output. The solution was to create a supply voltage, independent from the output voltage. This allowed the system to start-up even if the large output capacitor was charged from 0 V. This local supply block was a smaller SC voltage doubler circuit, controlled by the same phase signals, and was used to create a local supply voltage in an internal decoupling capacitor. This circuit was a replica of the main SC circuit, but, with its capacitors and switches, was scaled down to a fraction of the size of those in the main SC circuit.
Since the local supply voltage was initially 0 V, a start-up circuit was required to convert the input node to the output node of the local power supply. As soon the capacitor was charged to a voltage value enough for the phase generator circuit to start working, this connection was removed, and the circuit started its normal operation. The start-up circuit also provided a reset signal for the phase generator circuit, to guarantee that this circuit started working in state 1 (as shown in Figure  14).

Test Circuit and Measurement Results
To study the performance of the circuit proposed in [53] considering OPVs as an energy source, it was necessary to readjust the parameters of the PMU to reach maximum efficiency. Since the control system was implemented from the fractional VOC algorithm, it was required, based on the power curve of the OPV cell, to find the voltage that corresponded to the maximum power value made available by the cell. Based on the characterization of the OPV cells presented in Table 2, and the power curves (Figure 8), the performance of the system for different levels of irradiance with a load of 9.9 kΩ is shown in Table 3. In Table 1 the value of the k factor for the cell was obtained for different radiation levels and it varied between 0.65 and 0.83. In order to set MPPT algorithm, an average of the k values, for Table 1, was used in the resistive divider of the CMOS DC-DC converter.
Due to the inert atmosphere chamber used in the tests of the OPV cells, it was only possible to test two connection configurations, namely with the pixel P1 as the main cell and the pixel P2 as the pilot cell (Config. 1), and with the two pixels in parallel connected to the input of the circuit (Vin) Since this is an energy harvesting system, it must have its own power supply for the controller circuit that generates the clock signals. The main output voltage cannot be used to power the clock generation circuit, because during the start-up of the system will remain close to 0 V for a long time, if there is a large capacitance at the output. The solution was to create a supply voltage, independent from the output voltage. This allowed the system to start-up even if the large output capacitor was charged from 0 V. This local supply block was a smaller SC voltage doubler circuit, controlled by the same phase signals, and was used to create a local supply voltage in an internal decoupling capacitor. This circuit was a replica of the main SC circuit, but, with its capacitors and switches, was scaled down to a fraction of the size of those in the main SC circuit.
Since the local supply voltage was initially 0 V, a start-up circuit was required to convert the input node to the output node of the local power supply. As soon the capacitor was charged to a voltage value enough for the phase generator circuit to start working, this connection was removed, and the circuit started its normal operation. The start-up circuit also provided a reset signal for the phase generator circuit, to guarantee that this circuit started working in state 1 (as shown in Figure 14).

Test Circuit and Measurement Results
To study the performance of the circuit proposed in [53] considering OPVs as an energy source, it was necessary to readjust the parameters of the PMU to reach maximum efficiency. Since the control system was implemented from the fractional V OC algorithm, it was required, based on the power curve of the OPV cell, to find the voltage that corresponded to the maximum power value made available by the cell. Based on the characterization of the OPV cells presented in Table 2, and the power curves (Figure 8), the performance of the system for different levels of irradiance with a load of 9.9 kΩ is shown in Table 3. In Table 1 the value of the k factor for the cell was obtained for different radiation levels and it varied between 0.65 and 0.83. In order to set MPPT algorithm, an average of the k values, for Table 1, was used in the resistive divider of the CMOS DC-DC converter.
Due to the inert atmosphere chamber used in the tests of the OPV cells, it was only possible to test two connection configurations, namely with the pixel P 1 as the main cell and the pixel P 2 as the pilot cell (Config. 1), and with the two pixels in parallel connected to the input of the circuit (V in ) (Config. 2). In this last configuration, the pilot cell open circuit voltage (V OC ) required for the MPPT algorithm was replaced by an external voltage of 1.2 V. Considering that the two pixels shared a common substrate, the increase of the output power was achieved by connecting them in parallel. Yet, since the output was limited to 0.6 to 0.7 V, the IC CMOS circuit, besides the MPTT, needed to double the output voltage, in order to reach the required 1.2 V. The output power was 0.14 mW, for a low power IoT node, due to limitations in the available CMOS circuit die area. However, this value can be easily increased by using higher area capacitors. The test setup is shown in Figure 15 and circuit die photo (0.95 × 0.67 mm 2 ) is shown in Figure 16.       Figure 16. Circuit die micro-photograph. In order to validate the correct functioning of the circuit, the waveform of Φ 1 and Φ 2 , are shown in Figure 17, channel 1 (Ch1) and channel 2 (Ch2), respectively. The frequency of the clocks can be found in Table 4. Figure 18 shows the start-up of the circuit, for the irradiance level of 26 mW/cm 2 . The above confirms that the control module and the PMU startup worked correctly. Since the current density of the organic photovoltaic cells was approximately 13 mA/cm 2 , for the maximum irradiance value, it was verified that when the irradiance had decreased, i.e., when the current density is low, the frequencies of Φ 1 and Φ 2 approximate the values for which the system is scaled. Therefore, it is possible to identify the optimal point of operation of the circuit, minimizing the PMU power dissipated by the control module, while the remaining power was delivered to the load. In order to validate the correct functioning of the circuit, the waveform of Φ1 and Φ2, are shown in Figure 17, channel 1 (Ch1) and channel 2 (Ch2), respectively. The frequency of the clocks can be found in Table 4. Figure 18 shows the start-up of the circuit, for the irradiance level of 26 mW/cm 2 . The above confirms that the control module and the PMU startup worked correctly. Since the current density of the organic photovoltaic cells was approximately 13 mA/cm 2 , for the maximum irradiance value, it was verified that when the irradiance had decreased, i. e. when the current density is low, the frequencies of Φ1 and Φ2 approximate the values for which the system is scaled. Therefore, it is possible to identify the optimal point of operation of the circuit, minimizing the PMU power dissipated by the control module, while the remaining power was delivered to the load.      Table 5 shows the technical characteristics of the lamps used. Considering that these characteristics were different from those of the solar simulator with which the first tests were carried out, the light spectrum is also expected to be different. Thus, the standardized luminous spectra of the four lamps considered in this test are shown in Figure 19 for the irradiance described in Table 5.  Table 5 shows the technical characteristics of the lamps used. Considering that these characteristics were different from those of the solar simulator with which the first tests were carried out, the light spectrum is also expected to be different. Thus, the standardized luminous spectra of the four lamps considered in this test are shown in Figure 19 for the irradiance described in Table 5.  The current-voltage and power curves are shown in Figure 20. The short-circuit current of this OPV was 2.27 mA, the open-circuit voltage was 750 mV, and for the maximum power value (660 µW). The voltage value, i.e., the voltage value where the maximum power required for the MPPT algorithm was 400 mV.  The current-voltage and power curves are shown in Figure 20. The short-circuit current of this OPV was 2.27 mA, the open-circuit voltage was 750 mV, and for the maximum power value (660 µW). The voltage value, i.e., the voltage value where the maximum power required for the MPPT algorithm was 400 mV. The current-voltage and power curves are shown in Figure 20. The short-circuit current of this OPV was 2.27 mA, the open-circuit voltage was 750 mV, and for the maximum power value (660 µW). The voltage value, i.e., the voltage value where the maximum power required for the MPPT algorithm was 400 mV.  The lamps were located at three different (heights) from the OPVs: 0.45 m, 0.26 m, and 0.11 m. Using the Newport 91150V calibration cell, the four lamps were irradiated at different heights, as shown in Table 6. The maximum efficiency value of the PMU, for each illumination value, was determined by varying the PMU load. Due to the low irradiation power of the 5 W and 3.7 W lamps, the proposed PMU worked only for the minimum height considered (0.11 m). Figures 21 and 22 represent the efficiency as a function of the load of the architecture for the heights of 0.45 m and 0.11 m, respectively, for each lamp. It was not possible to perform the comparison for the height of 0.26 m. The lamps were located at three different (heights) from the OPVs: 0.45 m, 0.26 m, and 0.11 m. Using the Newport 91150V calibration cell, the four lamps were irradiated at different heights, as shown in Table 6. The maximum efficiency value of the PMU, for each illumination value, was determined by varying the PMU load. Due to the low irradiation power of the 5 W and 3.7 W lamps, the proposed PMU worked only for the minimum height considered (0.11 m). Figures 21 and 22 represent the efficiency as a function of the load of the architecture for the heights of 0.45 m and 0.11 m, respectively, for each lamp. It was not possible to perform the comparison for the height of 0.26 m.    Observing the results in Figures 21 and 22, we can see that the circuit presented maximum efficiency with the 35 W halogen lamp. However, it is necessary to consider the supercharging of the Observing the results in Figures 21 and 22, we can see that the circuit presented maximum efficiency with the 35 W halogen lamp. However, it is necessary to consider the supercharging of the cell in the situation whose height to the work plane is 0.11 m. In this case, the variation of the efficiency as a function of the resistance was very narrow (around 2 kΩ).
In the first set of OPVs, it was verified that the efficiency of the PMU proposed reached 75.76% with an irradiance of 9.52 mW/m 2 provided by the radiation simulator and a load of 9.9 kΩ (P out = 0.14 mW). A test setup was used with four indoor lamps, each lamp being placed at three levels of height. A maximum efficiency of 65.98% was achieved for the 7 W LED, with an irradiance of 19.31 mW/cm 2 and a load of 9.9 kΩ (P out = 103.43 µW). Although the efficiency obtained by the remaining lamps were lower, it was above 45%.
When comparing the results with the state-of-the-art harvesters (Table 7), it was noted that the presented PMU had unique features in terms of efficiency and in its construction and implementation. Being the control of this architecture based on a MPPT algorithm, it was guaranteed that the energy provided by the OPV was optimized to the PMU load.
The typical power consumption for IoT nodes is in the order of tens mW, as shown in [54] (Table 4). Furthermore, recently, there have been several papers that have used a SC fully integrated circuit with a lower pout than the proposed PMU in this paper [55].

Conclusions
In this work, we present a proof of concept that highlights the possibility for the integration of organic photovoltaic cells and a CMOS PMU circuit for indoor light harvesting. The OPV cells were connected to an ultra-low power, low area, and low cost, fully integrated CMOS circuit prototype, designed in a 130 nm process, which used a quasi-MPPT algorithm to maximize the efficiency.
It was shown that the organic cells can operate, combined with a CMOS PMU circuit, in the presence of different indoor light lamps: 35 W halogen, 3.5 W LED, 5 W LED, and 7 W LED. They were irradiated by the light of these lamps from three different heights (0.45 m, 0.26 m, and 0.11 m). For 0.45 m, the maximum efficiency was 60% (35 W halogen) and 45% for 7 W LED. For 0.11 m, they showed a maximum efficiency between 60% (5 W LED) and 70% (35 W halogen).
It was verified that the integrated CMOS circuit presented a maximum efficiency above 75% when the OPV cells were illuminated by the solar simulator, which makes this PMU energy system a promising proof of concept for energy harvesting of organic photovoltaic cells. The results presented in this paper can be scaled up by using a larger OPV and a PMU system with large capacitors in order to be able to supply IoT nodes with higher power requirements.