A Monolithic Multisensor Microchip with Complete On-Chip RF Front-End

In this paper, a new wireless sensor, designed for a 0.35 µm CMOS technology, is presented. The microchip was designed to be placed on an object for the continuous remote monitoring of its temperature and illumination state. The temperature sensor is based on the temperature dependence of the I-V characteristics of bipolar transistors available in CMOS technology, while the illumination sensor is an integrated p-n junction photodiode. An on-chip 2.5 GHz transmitter, coupled to a mm-sized dipole radiating element fabricated on the same microchip and made in the top metal layer of the same die, sends the collected data wirelessly to a radio receiver using an On-Off Keying (OOK) modulation pattern.


Introduction
Microchip sensors have the advantage that the transducers can be monolithically integrated with signal amplification and conditioning circuitry, with clear advantages in terms of reduced size, noise immunity and production costs. With the advent of the Internet-of-Things [1], these devices are expected to gain in popularity, as they can be considered the link between the world surrounding an object they are attached to and electronics. Of course, sensors that are readily deployable and can be easily accessed, possibly in a wireless manner, are highly desirable [2,3]. Nevertheless, the application of an external antenna to a microchip to allow wireless communication is a costly process and moreover leads to the de-miniaturization of the device [4]. Therefore, the concept of an on-chip-antenna (OCA), fabricated during the CMOS process, which eliminates the need for external transmission lines and sophisticated packaging, seems to be the simplest approach to warrant short range data transmission together with low costs and reliability. Usually, this task is obtained by integrating spiral inductors as the radiating elements [5][6][7][8]. In this paper, we present a full custom microchip integrating a dipole RF radiator fed by an LC oscillator and an RF power amplifier. The choice of a dipole antenna allowed the design of almost one-dimensional form factor microchips, while loop antennas require square devices. The device includes a temperature sensor, a light sensor and a general-purpose input and was designed for ambient and processes monitoring when temperature, illumination or other output signals need to be kept under control. Two examples of possible application scopes are photovoltaic cells in solar modules and light emitting diodes. By means of the integrated 2.5 GHz transmitter, the device wirelessly sends the collected data to a base station, placed up to a few meters away. The microchip was fabricated by a silicon foundry (Austria Micro Systems), with a standard and low Micro Systems), with a standard and low cost 0.35 µm CMOS process (C35B4M3) [9], which demonstrates that even low cost technologies are suitable for this kind of fully integrated sensors.
The paper is organized as follows. In Section 2 we present the microchip architecture with a general description of its internal organization. In Section 3 we provide details about the integrated sensors, the analogue front-end, the control logic and the RF section. In Section 4 we provide experimental results on the microchip operation. Finally, the conclusions are drawn in Section 5.

System Architecture
The architecture of the proposed device is shown in Figure 1. The analogue section includes two sensors, namely a temperature sensor and a light sensor. The former is designed to provide a "proportional to absolute temperature" (PTAT) output and guarantees an optimal linearity; the latter is in fact an integrated solar cell, designed to provide a useful output under normal outdoor daylight irradiation. Sensor outputs are first amplified to bring their respective signals to useful levels and then digitalized by means of a single analogue-to-digital converter (ADC). The ADC is time-shared between either two or three sources, namely the PTAT, the light sensor and in case a generic input applied between two input pads of the microchip, where an additional external sensor can be applied. The serial conversion timing is provided by the digital section. The ADC serial outputs are afterwards loaded into a parallel-in/serial-output (PISO) 2 × 8 (or 3 × 8) bits shift register. Once the measurements are done and the PISO loaded, its content is serialized for transmission at a bit-rate of 3 kbps. The microchip is also internally provided with an integrated RF transmitter, composed of an LC-oscillator, turned on and off by the bitstream and an RF power amplifier (PA), in turn energizing an integrated small dipole antenna.

Temperature Sensor
Low cost high-performance temperature sensors are increasingly required. Besides, it is needed to reduce their power consumption. This concept is necessary to use the sensor in battery operated systems, to decrease the errors produced by self-heating and to be able to add the sensor to a chip without causing a significant increase in the power consumption of the complete system [10].
An integrated CMOS temperature sensor perfectly fits low cost, high performance and low power consumption.
Several temperature sensors topologies have been proposed in CMOS technology. Most of the systems reported in literature, including the one presented hereafter, exploit a PTAT scheme, realized by means of coupled bipolar junction transistors (BJT) [11,12]. The ADC serial outputs are afterwards loaded into a parallel-in/serial-output (PISO) 2 × 8 (or 3 × 8) bits shift register. Once the measurements are done and the PISO loaded, its content is serialized for transmission at a bit-rate of 3 kbps. The microchip is also internally provided with an integrated RF transmitter, composed of an LC-oscillator, turned on and off by the bitstream and an RF power amplifier (PA), in turn energizing an integrated small dipole antenna.

Temperature Sensor
Low cost high-performance temperature sensors are increasingly required. Besides, it is needed to reduce their power consumption. This concept is necessary to use the sensor in battery operated systems, to decrease the errors produced by self-heating and to be able to add the sensor to a chip without causing a significant increase in the power consumption of the complete system [10].
An integrated CMOS temperature sensor perfectly fits low cost, high performance and low power consumption.
Several temperature sensors topologies have been proposed in CMOS technology. Most of the systems reported in literature, including the one presented hereafter, exploit a PTAT scheme, realized by means of coupled bipolar junction transistors (BJT) [11,12].
In fact, assuming for PNP BJTs the collector current given by: with I s the saturation current of the emitter-base junction, V EB the emitter-base voltage, k the Boltzmann constant, q the electronic charge and η the ideality factor, if two identical transistors (I S1 = I S2 = I S ) are biased at collector currents of I re f and Io respectively, the difference between the emitter-base voltages of the two BJTs has a linear dependence on T, according to the following equation.
where η = 1 is assumed. Our sensor was designed to provide a high sensitivity and a signal level tuned in order to simplify the Analog-to-Digital conversion (ADC) in the temperature range from room temperature to 100 • C.
The temperature sensor consists of two building blocks: a PTAT voltage generator and a differential amplifier, as shown in Figure 2.
Boltzmann constant, q the electronic charge and the ideality factor, if two identical transistors ( = = ) are biased at collector currents of and respectively, the difference between the emitter-base voltages of the two BJTs has a linear dependence on T, according to the following equation.
where = 1 is assumed. Our sensor was designed to provide a high sensitivity and a signal level tuned in order to simplify the Analog-to-Digital conversion (ADC) in the temperature range from room temperature to 100 °C.
The temperature sensor consists of two building blocks: a PTAT voltage generator and a differential amplifier, as shown in Figure 2.
To obtain a proportional output signal with respect to absolute temperature, two diodeconnected BJTs, driven by different currents, were realized. The two PNP transistors Q1 and Q2, both working in the active region, are realized side-by-side on the chip and have the same geometry and orientation and therefore can be assumed identical. The ratio between their collector currents is fixed by the different W/L aspect ratios of M1 and M2. Assuming in principle negligible channel length modulation effects [13], Q2 is driven by a current Io that is , where n is the channel width ratio WM1/WM2 while LM1 = LM2. In this work n=10 was chosen for an appropriate sizing of the MOS transistor as trade-off between sensitivity in the measured temperature range and linearity of the output signal.
The reference current is generated through an integrated Bandgap current reference [14] with supply and temperature compensation that delivers a constant current of 11.5 µA, showing a temperature dependency of about 800 ppm/°C. As shown by the simulations, this temperature dependency has no practical impact on the performance of the two sensors. The source is designed to supply each diode-connected BJT with currents that are independent from . Figure 2. Architecture of the integrated PTAT with differential amplifier. Figure 2. Architecture of the integrated PTAT with differential amplifier.
To obtain a proportional output signal with respect to absolute temperature, two diode-connected BJTs, driven by different currents, were realized. The two PNP transistors Q1 and Q2, both working in the active region, are realized side-by-side on the chip and have the same geometry and orientation and therefore can be assumed identical. The ratio between their collector currents is fixed by the different W/L aspect ratios of M1 and M2. Assuming in principle negligible channel length modulation effects [13], Q2 is driven by a current Io that is n × I re f , where n is the channel width ratio W M1 /W M2 while L M1 = L M2 . In this work n=10 was chosen for an appropriate sizing of the MOS transistor as trade-off between sensitivity in the measured temperature range and linearity of the output signal.
The reference current I re f is generated through an integrated Bandgap current reference [14] with supply and temperature compensation that delivers a constant current of 11.5 µA, showing a temperature dependency of about 800 ppm/ • C. As shown by the simulations, this temperature dependency has no practical impact on the performance of the two sensors. The source is designed to supply each diode-connected BJT with currents that are independent from V dd .
In Figure 3 the simulated emitter-base voltages of transistors Q1 and Q2 at various temperatures are shown. Their behaviour shows a negative derivative with respect to temperature. From simulations, it is possible to calculate the sensor output at each absolute temperature: In the same Figure, the differential output of the PTAT in the temperature range from 0 to 100 • C is shown. In Figure 3 the simulated emitter-base voltages of transistors Q1 and Q2 at various temperatures are shown. Their behaviour shows a negative derivative with respect to temperature. From simulations, it is possible to calculate the sensor output at each absolute temperature: In the same Figure, the differential output of the PTAT in the temperature range from 0 to 100 °C is shown. In the temperature range of interest, the estimated power consumption of the two PNP transistors is 7.7 µW and 66.5 µW respectively for Q1 and Q2, obtained from simulations. This power might cause self-heating of the sensor and therefore the PTAT circuit is activated only for a few milliseconds through the Bandgap circuit at regular intervals.
The amplifier stage was designed through extensive parametric simulations aimed at obtaining output signal levels that could be reasonably applied to the ADC, while preserving a good linearity. Here, M3 and M4 are used as active load, instead of using high value resistors, whose implementation is wasteful in terms of area consumption. M5 and M6 have been sized to achieve the maximum output dynamics for the differential amplifier. Being the PTAT output differential, the topology requested for the amplifier is differential as well. Mtail has the role of a current limiter for the amplifier, in order to reduce power consumption.

Light Sensor
The proposed solution for the design of the CMOS light sensor is based on planar p-n junction formed by the P-type substrate and the N-type well. This structure could be figured out as a micro solar cell producing a current proportional to surface irradiation. The outermost metal layer (Metal-1 for the CMOS technology) was used to build fingers that collect photocurrent at the cathode. The structure of the light sensor is shown in Figure 4. In the temperature range of interest, the estimated power consumption of the two PNP transistors is 7.7 µW and 66.5 µW respectively for Q1 and Q2, obtained from simulations. This power might cause self-heating of the sensor and therefore the PTAT circuit is activated only for a few milliseconds through the Bandgap circuit at regular intervals.
The amplifier stage was designed through extensive parametric simulations aimed at obtaining output signal levels that could be reasonably applied to the ADC, while preserving a good linearity. Here, M3 and M4 are used as active load, instead of using high value resistors, whose implementation is wasteful in terms of area consumption. M5 and M6 have been sized to achieve the maximum output dynamics for the differential amplifier. Being the PTAT output differential, the topology requested for the amplifier is differential as well. M tail has the role of a current limiter for the amplifier, in order to reduce power consumption.

Light Sensor
The proposed solution for the design of the CMOS light sensor is based on planar p-n junction formed by the P-type substrate and the N-type well. This structure could be figured out as a micro solar cell producing a current proportional to surface irradiation. The outermost metal layer (Metal-1 for the CMOS technology) was used to build fingers that collect photocurrent at the cathode. The structure of the light sensor is shown in Figure 4. In order to convert the current signal into a voltage signal, it is necessary to use a transimpedance amplifier (TIA), designed according to the schematic depicted in Figure 5. The integrated solar cell area (300 × 200 µm 2 ) was chosen to generate a photocurrent in a range that suits the linear region of the amplifier (up to 22 µA). By assuming an indicative maximum efficiency of 10%, the area was chosen in such a way that under 1000 W/m 2 the cell would still provide a photocurrent within the said limits. The TIA is based on an integrated MOSFET operational amplifier. This operational amplifier performs an open loop gain of 100 dB with an output resistance of 0.3 Ω and can operate in the temperature range from −40 °C to 120 °C. The simulated TIA output is shown in Figure 6. The feedback resistor Rfeed value is 100 kΩ. In order to convert the current signal into a voltage signal, it is necessary to use a transimpedance amplifier (TIA), designed according to the schematic depicted in Figure 5. In order to convert the current signal into a voltage signal, it is necessary to use a transimpedance amplifier (TIA), designed according to the schematic depicted in Figure 5. The integrated solar cell area (300 × 200 µm 2 ) was chosen to generate a photocurrent in a range that suits the linear region of the amplifier (up to 22 µA). By assuming an indicative maximum efficiency of 10%, the area was chosen in such a way that under 1000 W/m 2 the cell would still provide a photocurrent within the said limits. The TIA is based on an integrated MOSFET operational amplifier. This operational amplifier performs an open loop gain of 100 dB with an output resistance of 0.3 Ω and can operate in the temperature range from −40 °C to 120 °C. The simulated TIA output is shown in Figure 6. The feedback resistor Rfeed value is 100 kΩ. The integrated solar cell area (300 × 200 µm 2 ) was chosen to generate a photocurrent in a range that suits the linear region of the amplifier (up to 22 µA). By assuming an indicative maximum efficiency of 10%, the area was chosen in such a way that under 1000 W/m 2 the cell would still provide a photocurrent within the said limits. The TIA is based on an integrated MOSFET operational amplifier. This operational amplifier performs an open loop gain of 100 dB with an output resistance of 0.3 Ω and can operate in the temperature range from −40 • C to 120 • C. The simulated TIA output is shown in Figure 6. The feedback resistor R feed value is 100 kΩ.

Clock
Conventional current-starved single-ended ring oscillators are usually employed for realizing wide tuning range, voltage controlled oscillators that act as local clock for the digital circuitry of ASICs by exploiting the dependence of the large signal oscillation frequency fOsc on the bias current Ib [15,16] that is determined by: where N is the number of inverters used, tD the time delay of each stage, VOsc the oscillation amplitude and C the load capacitance. Furthermore, in a ring oscillator topology the small-signal amplitude of the oscillating signal can be expressed as where vOut(0) is the initial condition at the ring oscillator output, As the gain of each amplifier stage and ωs the −3 dB bandwidth of each stage [13]. The first term of (5) represents the time-varying amplitude of the oscillations. Therefore, the settling time can be expressed to a first approximation as The settling time of a ring oscillator (RO), at a given initial condition, depends only on the amplifier stages characteristics (gain and bandwidth). In particular, when the oscillator is implemented by exploiting CMOS inverters, the small-signal gain of a single stage is given by where ron and rop are the output resistances of the MOS devices. However, an increase of the transconductance of the inverting stages does not necessarily imply a reduction of the oscillator settling time because a higher gain requires more current consumption and thus larger size components with increased parasitics that tend to decrease ωs. To obtain a fast start-up oscillator, required for low power clocks, bias current and hence devices sizes have to be properly set.
In this work, the oscillator provides a stable carrier of 10 MHz frequency (Wp/Wn = 4, C1 = C2 = C3 = 790 pF). For achieving this purpose, the same bandgap current reference introduced in Section 3.1

Clock
Conventional current-starved single-ended ring oscillators are usually employed for realizing wide tuning range, voltage controlled oscillators that act as local clock for the digital circuitry of ASICs by exploiting the dependence of the large signal oscillation frequency f Osc on the bias current I b [15,16] that is determined by: where N is the number of inverters used, t D the time delay of each stage, V Osc the oscillation amplitude and C the load capacitance. Furthermore, in a ring oscillator topology the small-signal amplitude of the oscillating signal can be expressed as where v Out (0) is the initial condition at the ring oscillator output, A s the gain of each amplifier stage and ω s the −3 dB bandwidth of each stage [13]. The first term of (5) represents the time-varying amplitude of the oscillations. Therefore, the settling time can be expressed to a first approximation as The settling time of a ring oscillator (RO), at a given initial condition, depends only on the amplifier stages characteristics (gain and bandwidth). In particular, when the oscillator is implemented by exploiting CMOS inverters, the small-signal gain of a single stage is given by where r on and r op are the output resistances of the MOS devices. However, an increase of the transconductance of the inverting stages does not necessarily imply a reduction of the oscillator settling time because a higher gain requires more current consumption and thus larger size components with increased parasitics that tend to decrease ω s . To obtain a fast start-up oscillator, required for low power clocks, bias current and hence devices sizes have to be properly set. In this work, the oscillator provides a stable carrier of 10 MHz frequency (W p /W n = 4, C 1 = C 2 = C 3 = 790 pF). For achieving this purpose, the same bandgap current reference introduced in Section 3.1 has been used, providing high robustness against supply voltage and temperature fluctuations. A clock signal of 5 kHz is thus obtained using a frequency divider (f in /f out = 2000).

Digital Section
In Figure 7 the blocks of the digital section are shown. An ADC was used to convert the analogue signals produced by the sensors; a parallel-in-serial-output (PISO) shift register was implemented to serialize the parallel output of the ADC; a Load signal is necessary to activate the loading by the PISO. In this work, an integrated 8-bit successive approximation ADC was used, available in the standard cell library of the AMS technology. has been used, providing high robustness against supply voltage and temperature fluctuations. A clock signal of 5 kHz is thus obtained using a frequency divider (fin/fout = 2000).

Digital Section
In Figure 7 the blocks of the digital section are shown. An ADC was used to convert the analogue signals produced by the sensors; a parallel-in-serial-output (PISO) shift register was implemented to serialize the parallel output of the ADC; a Load signal is necessary to activate the loading by the PISO. In this work, an integrated 8-bit successive approximation ADC was used, available in the standard cell library of the AMS technology.  The Load command generator was designed to generate a high-level every 50 cycles of the 5 kHz Clock.

RF Section
In this microchip sensor, a directly On-Off-Keying (OOK) modulated oscillator-based transmitter was used, as depicted in Figure 9. The transmitter topology exploits a cross-coupled complementary LC oscillator running at a frequency of 2.5 GHz. The differential output is coupled to a common source differential power amplifier and buffered on an integrated dipole antenna. A start-up circuit allows the duty cycling of the transmitter and the implementation of the OOK modulation. has been used, providing high robustness against supply voltage and temperature fluctuations. A clock signal of 5 kHz is thus obtained using a frequency divider (fin/fout = 2000).

Digital Section
In Figure 7 the blocks of the digital section are shown. An ADC was used to convert the analogue signals produced by the sensors; a parallel-in-serial-output (PISO) shift register was implemented to serialize the parallel output of the ADC; a Load signal is necessary to activate the loading by the PISO. In this work, an integrated 8-bit successive approximation ADC was used, available in the standard cell library of the AMS technology.  The Load command generator was designed to generate a high-level every 50 cycles of the 5 kHz Clock.

RF Section
In this microchip sensor, a directly On-Off-Keying (OOK) modulated oscillator-based transmitter was used, as depicted in Figure 9. The transmitter topology exploits a cross-coupled complementary LC oscillator running at a frequency of 2.5 GHz. The differential output is coupled to a common source differential power amplifier and buffered on an integrated dipole antenna. A start-up circuit allows the duty cycling of the transmitter and the implementation of the OOK modulation. The Load command generator was designed to generate a high-level every 50 cycles of the 5 kHz Clock.

RF Section
In this microchip sensor, a directly On-Off-Keying (OOK) modulated oscillator-based transmitter was used, as depicted in Figure 9. The transmitter topology exploits a cross-coupled complementary LC oscillator running at a frequency of 2.5 GHz. The differential output is coupled to a common source differential power amplifier and buffered on an integrated dipole antenna. A start-up circuit allows the duty cycling of the transmitter and the implementation of the OOK modulation.  LC cross-coupled oscillators are suitable circuits to be used in radio frequency systems. These kinds of oscillators offer high frequency stability over temperature, voltage and process tolerances and low phase noise [13].
In this oscillator topology, the oscillation frequency is set by an inductors-capacitors (LC) network according to the formula: Despite the simplicity of the cross-coupled differential scheme, the complementary architecture features a higher negative transconductance useful for overcoming the resonating circuit losses, essentially due to the parasitic resistance of the LC tank and sustaining oscillations [17]. In particular the following relationship must be verified [18]: where is the transconductance provided by the differential couple and is the parasitic resistance of the LC tank.
The complementary topology allows oscillations to start also for low quality factors ( ) of the resonating circuits, which is typical for fully integrated oscillators. In fact, the inductor shows a poor quality factor , typically in a range 4-20 for enhanced structures [19,20]. The resonating circuit employs L = 4 nH and C = 1 pF. In particular, we used 4-turns square spiral inductors fabricated in the top aluminium metal layer and polysilicon capacitors. The employed coils exhibit a quality factor of 4.7 at 2.5 GHz [9].
Each transistor has a W/L ratio set to achieve the needed negative transconductance for sustaining oscillations. Furthermore, the sizes of the cross-coupled pairs, together with the current tail, were chosen to properly bias the differential power amplifier. Table 1 summarizes the key dimensions of each transistor.   LC cross-coupled oscillators are suitable circuits to be used in radio frequency systems. These kinds of oscillators offer high frequency stability over temperature, voltage and process tolerances and low phase noise [13].
In this oscillator topology, the oscillation frequency is set by an inductors-capacitors (LC) network according to the formula: Despite the simplicity of the cross-coupled differential scheme, the complementary architecture features a higher negative transconductance useful for overcoming the resonating circuit losses, essentially due to the parasitic resistance of the LC tank and sustaining oscillations [17]. In particular the following relationship must be verified [18]: where G m is the transconductance provided by the differential couple and R tank is the parasitic resistance of the LC tank. The complementary topology allows oscillations to start also for low quality factors (Q tank ) of the resonating circuits, which is typical for fully integrated oscillators. In fact, the inductor shows a poor quality factor Q L , typically in a range 4-20 for enhanced structures [19,20].
The resonating circuit employs L = 4 nH and C = 1 pF. In particular, we used 4-turns square spiral inductors fabricated in the top aluminium metal layer and polysilicon capacitors. The employed coils exhibit a quality factor of 4.7 at 2.5 GHz [9].
Each transistor has a W/L ratio set to achieve the needed negative transconductance for sustaining oscillations. Furthermore, the sizes of the cross-coupled pairs, together with the current tail, were chosen to properly bias the differential power amplifier. Table 1 summarizes the key dimensions of each transistor. A linear power amplifier (PA) based on a class B bridge configuration amplification stage was implemented to feed the small dipole antenna. The differential MOSFET pairs were accurately sized for maximizing the power delivered to the antenna alternatively through the Mpa3-Mpa2 and Mpa4-Mpa1 paths. A W/L ratio of 65 µm/0.35 µm was set for all Mpa transistors. The estimated power gain is 2.3 dB with a total harmonic distortion (THD) of 0.13%, estimated from simulations. This stage is turned on by Mtail3 only during transmission.
The on-chip dipole radiating element is made within the top aluminium metal layer, having a thickness of 0.925 µm. This antenna requires a differential excitation, which suits the PA scheme.
For a resonating antenna, the linear dimensions must be of the order of one half of the carrier wavelength. Therefore, for operations at 2.4 GHz, a well-tuned dipole antenna should have dimensions of the order of centimetres. However, the chip size limits the antenna dimension, so it is not possible even approaching the resonating conditions in our case. The characteristic parameters of such a small antenna are obviously very poor, with an estimated gain of about −50 dB and a radiation efficiency of the order of 1% [21], enough however to allow short range transmissions [6].

Experimental Results
The circuital sections were first separately characterized. In particular, tests were made on the analogue sensors (temperature and light), the digital conversion section with data serialization and finally on the RF transmitter.
A microphotograph of the die is shown in Figure 10a. The area of the realized chip is 1 mm × 4 mm. After fabrication, for a complete characterization, the test chips were packaged in 44-pin TQFP packages (Figure 10b) which give easy access to all input and output nodes of the circuit. Bare dies samples were also tested after ultrasonic wire bonding to a limited number of bondpads, e.g., for RF transmission tests. The on-chip dipole radiating element is made within the top aluminium metal layer, having a thickness of 0.925 µm. This antenna requires a differential excitation, which suits the PA scheme.
For a resonating antenna, the linear dimensions must be of the order of one half of the carrier wavelength. Therefore, for operations at 2.4 GHz, a well-tuned dipole antenna should have dimensions of the order of centimetres. However, the chip size limits the antenna dimension, so it is not possible even approaching the resonating conditions in our case. The characteristic parameters of such a small antenna are obviously very poor, with an estimated gain of about −50 dB and a radiation efficiency of the order of 1% [21], enough however to allow short range transmissions [6].

Experimental Results
The circuital sections were first separately characterized. In particular, tests were made on the analogue sensors (temperature and light), the digital conversion section with data serialization and finally on the RF transmitter.
A microphotograph of the die is shown in Figure 10a. The area of the realized chip is 1 mm × 4 mm. After fabrication, for a complete characterization, the test chips were packaged in 44-pin TQFP packages (Figure 10b) which give easy access to all input and output nodes of the circuit. Bare dies samples were also tested after ultrasonic wire bonding to a limited number of bondpads, e.g., for RF transmission tests.

Temperature Sensor
To investigate the performance of the PTAT sensor, the whole chip was tested in a thermostatic oven, using a standard PT100 as reference as shown in Figures 11 and 12.

Temperature Sensor
To investigate the performance of the PTAT sensor, the whole chip was tested in a thermostatic oven, using a standard PT100 as reference as shown in Figures 11 and 12.  As shown in Figure 13, the integrated PTAT presents a good linearity (R 2 = 0.99962) in the temperature range of interest (20 °C-90 °C) with a sensitivity of 19.1 mV/°C, measured at the analogue amplifier output. Inside the climatic chamber it was possible to change in a small range the lighting conditions in combination with temperature. In particular, a modification of the LED array output, from 10 to 50 W/m 2 approximately, was applied showing no effect at all on the temperature sensor output. However, it can be expected that higher irradiations would induce heating of the device.
This specific implementation of the sensor does not include a calibration circuitry, which could be however obtained in a final version by e.g., laser trimming acting on Iref or other standard techniques.  As shown in Figure 13, the integrated PTAT presents a good linearity (R 2 = 0.99962) in the temperature range of interest (20 °C-90 °C) with a sensitivity of 19.1 mV/°C, measured at the analogue amplifier output. Inside the climatic chamber it was possible to change in a small range the lighting conditions in combination with temperature. In particular, a modification of the LED array output, from 10 to 50 W/m 2 approximately, was applied showing no effect at all on the temperature sensor output. However, it can be expected that higher irradiations would induce heating of the device.
This specific implementation of the sensor does not include a calibration circuitry, which could be however obtained in a final version by e.g., laser trimming acting on Iref or other standard techniques. As shown in Figure 13, the integrated PTAT presents a good linearity (R 2 = 0.99962) in the temperature range of interest (20 • C-90 • C) with a sensitivity of 19.1 mV/ • C, measured at the analogue amplifier output. Inside the climatic chamber it was possible to change in a small range the lighting conditions in combination with temperature. In particular, a modification of the LED array output, from 10 to 50 W/m 2 approximately, was applied showing no effect at all on the temperature sensor output. However, it can be expected that higher irradiations would induce heating of the device.

Light Sensor
To examine the performance of the light sensor, the whole chip was exposed to direct sunlight and the photocurrent was measured at several irradiations (IRR), continuously monitored with a Figure 13. Experimental characteristic of the PTAT sensor, obtained using analogue output. The simulated characteristic is also provided for comparison. The error between simulated and experimental characteristic is also added.
This specific implementation of the sensor does not include a calibration circuitry, which could be however obtained in a final version by e.g., laser trimming acting on I ref or other standard techniques. Table 2 summarizes the PTAT key parameters.

Light Sensor
To examine the performance of the light sensor, the whole chip was exposed to direct sunlight and the photocurrent was measured at several irradiations (IRR), continuously monitored with a hand-held solar power meter. Photocurrent has been measured using an Agilent Technologies 4155C Semiconductor parameter analyser.
As shown in Figure 14 the light sensor presents a good linearity (R 2 = 0.99915) in the range of interest of a typical sunny day. The sensitivity is calculated as follows: In this specific implementation of the sensor, an additional calibration feature was not considered, though it would be possible by e.g., laser trimming of R feed .
Temperature variations can affect the light sensor output. This dependence is shown in Figure 15, which demonstrates that, due to the amplifier non-idealities, the light reading saturates at lower and lower photocurrent values as the temperature increases.

RF Transmitter Performance
The RF performance of the implemented transmitter was characterized by analysing the transmitted signal received by a 0.4-3 GHz bandwidth, 5 dBi logarithmic periodic dipole antenna (model Rhode&Schwarz HL040) connected in turn to a Rhode&Schwarz FSV Spectrum Analyser. The antenna was placed at a distance of 1 m from the microchip.
The experimental measurements show a continuous wave (CW) signal, produced by the crosscoupled LC oscillator, at about 2.54 GHz as shown in Figure 16.

RF Transmitter Performance
The RF performance of the implemented transmitter was characterized by analysing the transmitted signal received by a 0.4-3 GHz bandwidth, 5 dBi logarithmic periodic dipole antenna (model Rhode&Schwarz HL040) connected in turn to a Rhode&Schwarz FSV Spectrum Analyser. The antenna was placed at a distance of 1 m from the microchip.
The experimental measurements show a continuous wave (CW) signal, produced by the crosscoupled LC oscillator, at about 2.54 GHz as shown in Figure 16.

RF Transmitter Performance
The RF performance of the implemented transmitter was characterized by analysing the transmitted signal received by a 0.4-3 GHz bandwidth, 5 dBi logarithmic periodic dipole antenna (model Rhode&Schwarz HL040) connected in turn to a Rhode&Schwarz FSV Spectrum Analyser. The antenna was placed at a distance of 1 m from the microchip.
The experimental measurements show a continuous wave (CW) signal, produced by the cross-coupled LC oscillator, at about 2.54 GHz as shown in Figure 16. The proposed LC oscillator shows a phase noise of −90 dBc/Hz at 1MHz offset from the centre frequency, as shown in Figure 17. The phase noise is estimated as follows: where (∆ ) is the phase noise, is the noise power level in a band of 1 Hz at a certain offset frequency from the carrier central frequency f0, is the power level of the carrier at f0 and RBW is the bandwidth resolution of the spectrum analyser.

Whole System Operation
The operation of the whole system was tested employing a commercial hand-held IC-R20 (Icom America Inc., 12,421 Willows Road NE, Kirkland, WA, USA) receiving unit placed at a distance of 1 m, although the transmitted RF signal was clearly detectable up to a distance of 1.5 m ( Table 3). The assembled device was tested under the sun at a temperature of 24 °C and an irradiation level of 1125 The proposed LC oscillator shows a phase noise of −90 dBc/Hz at 1MHz offset from the centre frequency, as shown in Figure 17. The phase noise is estimated as follows: where L(∆ f ) dBc is the phase noise, P s is the noise power level in a band of 1 Hz at a certain offset frequency from the carrier central frequency f 0 , P c is the power level of the carrier at f 0 and RBW is the bandwidth resolution of the spectrum analyser. The proposed LC oscillator shows a phase noise of −90 dBc/Hz at 1MHz offset from the centre frequency, as shown in Figure 17. The phase noise is estimated as follows: where (∆ ) is the phase noise, is the noise power level in a band of 1 Hz at a certain offset frequency from the carrier central frequency f0, is the power level of the carrier at f0 and RBW is the bandwidth resolution of the spectrum analyser.

Whole System Operation
The operation of the whole system was tested employing a commercial hand-held IC-R20 (Icom America Inc., 12,421 Willows Road NE, Kirkland, WA, USA) receiving unit placed at a distance of 1 m, although the transmitted RF signal was clearly detectable up to a distance of 1.5 m ( Table 3). The The LC transmitter shows a temperature sensitivity ∆f /∆T = −0.25 MHz/ • C.

Whole System Operation
The operation of the whole system was tested employing a commercial hand-held IC-R20 (Icom America Inc., 12,421 Willows Road NE, Kirkland, WA, USA) receiving unit placed at a distance of 1 m, although the transmitted RF signal was clearly detectable up to a distance of 1.5 m ( Table 3). The assembled device was tested under the sun at a temperature of 24 • C and an irradiation level of 1125 W/m 2 . In agreement with the previous characterization, the output voltage of the PTAT and light sensor were 0.763 V and 1.971 V respectively. The transmitted data bitstream is shown in Figure 18 (top) together with the recorded signal at the output of the radio receiver (bottom). Figure 18 (bottom) shows signal stability issues that could be suppressed by properly designing the AC-coupling of the demodulated signal to a low-frequency (audio) amplifier instead of that integrated in the used commercial receiver. The received values are 23.4 • C, 1118 W/m 2 . The transmitted data bitstream is shown in Figure 18 (top) together with the recorded signal at the output of the radio receiver (bottom). Figure 18 (bottom) shows signal stability issues that could be suppressed by properly designing the AC-coupling of the demodulated signal to a low-frequency (audio) amplifier instead of that integrated in the used commercial receiver. The received values are 23.4 °C, 1118 W/m 2 .

Conclusions
In this paper, a full custom microchip realized in 0.35 µm CMOS technology, designed for ambient and processes monitoring, was proposed. It features a temperature and an illumination sensor. The temperature sensor features a sensitivity of 19.1 mV/°C and a linearity 0.99962 in the

Conclusions
In this paper, a full custom microchip realized in 0.35 µm CMOS technology, designed for ambient and processes monitoring, was proposed. It features a temperature and an illumination sensor. The temperature sensor features a sensitivity of 19.1 mV/ • C and a linearity 0.99962 in the temperature range of 20 • C to 90 • C, while the illumination sensor, designed to operate in the range from 0 to 1200 W/m 2 , shows a sensitivity of 16.96 mV/W/m 2 with a linearity of 0.99915. An integrated 2.5 GHz transmitter with an On-Chip-Antenna (OCA)-made in the top metal layer of the same die-transmits the collected data wirelessly by means of an on-off amplitude modulation scheme, at a bit rate of 3 kbit/s. The low bit rate was chosen in order to obtain that the decoded signal at the receiver output were in the audible band, as the receiver is a commercial low-cost radio receiving unit. However, simulations indicate that bit rates as high as 100 kbit/s could be easily obtained with the same technology.