Ranging Consistency Based on Ranging-Compensated Temperature-Sensing Sensor for Inter-Satellite Link of Navigation Constellation

Global Navigation Satellite System performance can be significantly enhanced by introducing inter-satellite links (ISLs) in navigation constellation. The improvement in position, velocity, and time accuracy as well as the realization of autonomous functions requires ISL distance measurement data as the original input. To build a high-performance ISL, the ranging consistency among navigation satellites is an urgent problem to be solved. In this study, we focus on the variation in the ranging delay caused by the sensitivity of the ISL payload equipment to the ambient temperature in space and propose a simple and low-power temperature-sensing ranging compensation sensor suitable for onboard equipment. The experimental results show that, after the temperature-sensing ranging compensation of the ISL payload equipment, the ranging consistency becomes less than 0.2 ns when the temperature change is 90 °C.


Introduction
Position, velocity, and time accuracy, along with integrity, continuity, and availability, is the four major performance indicators of satellite navigation systems [1]. Navigation system innovations and enhancements require technical advancements. Among the many techniques for improving the Global Navigation Satellite System (GNSS) performance, inter-satellite link (ISL) technology has become a research focus in recent years. National Aeronautics and Space Administration Senior Engineer K. P. Maine demonstrated the GPS III ISL. He stated that the introduction of ISLs can significantly improve the ephemeris prediction accuracy, realize autonomous integrity monitoring of satellites, increase autonomous orbit determination, and improve navigation system flexibility and expansibility [2]. Russia's new generation of navigation satellite GLONASS (GLObalnaya NAvigatsionnaya Sputnikovaya Sistema) -M also planned to improve autonomous navigation using ISLs [3,4]. The European Space Agency has initiated several exploratory projects on the ISLs adopted in the Galileo system since 2007 [5]. Recently, with the successful launch of the new generation BeiDou (Xichang, China) navigation networking satellites, ISLs have been used in the BeiDou navigation system to achieve autonomous orbit determination [6,7]. The introduction of ISLs has marked the emergence of a new generation of satellite navigation systems. Construction of ISLs has become an important consensus in several current GNSSs [8,9].
The accuracy of inter-satellite ranging is crucial for determining the quality of the ISL construction, and ranging consistency is a prerequisite for ranging accuracy. M. P. Ananda set the precision of inter-satellite ranging to 0.5 m to simulate autonomous orbit determination [10]. Song used ISL and seven ground monitoring stations in China to achieve joint orbit determination. When the ISL pseudo-range observation error was 0.8 m, the orbit accuracy was better than 0.7 m [11]. Moreover, Tang used ISL measurements in a centralized mode of the new-generation BeiDou navigation satellites to conduct autonomous orbit-determination experiments. When the standard deviation of the ISL measurement residuals was within 10.0 cm, the radial overlap differences in the autonomous orbits were less than 6.0 cm. The 24-h predicted orbital radial overlap differences were less than 10.0 cm, and the user equivalent ranging error of the 24-h predicted autonomous orbits was approximately 0.43 m [12]. According to the present notion of autonomous orbit determination and satellite-ground joint orbit determinations, the accuracy of inter-satellite ranging should be on the decimeter level.
To date, most studies have focused on the ISL signal system design [13], signal dynamic characteristic analysis [14,15], constellation design [16], and extension application [17,18]. Few works focus on ISL ranging consistency in navigation constellation. Ranging consistency is affected by the onboard clock equipment, ISL payload device, space environment, source transmitter, etc. Ref. [19] focused on the influence of the frequency and phase characteristics of the onboard clock equipment on the ranging consistency of the ISL and proposed a phase compensation sensor design method for the phase offset of the onboard clock equipment. In addition, the ISL payload device delay is mainly affected by the device aging, light deformation, day and night temperature difference, and other space environmental factors. Device aging and light deformation have a long-term effect on the process, and the effect of intensity is very small. However, a nanosecond level of delay variations mainly caused by temperature variations is possible [20] and the influence of temperature on the equipment time-delay could not be ignored for high-precision satellite-ranging [21]. The temperature difference between sun-lighted and shaded areas can reach up to 200 • C. Meanwhile, the general navigation satellite payload thermal-control design range is approximately 40 • C, and the actual temperature difference in the payloads may exceed this range. Therefore, in the present study, we focus on the variation in the ranging delay caused by the sensitivity of the ISL payload equipment to the ambient temperature in space and propose a simple and low-power temperature-sensing ranging compensation sensor suitable for onboard equipment.
The next section describes the ranging principle of ISL payload, the composition of the ISL payload, the operating environment, and the relevant temperature-dependent components. Section 3 presents the design approach for ranging-compensated temperature-sensing sensor. The field data collection and ranging experiments are described in Section 4. The final section presents our conclusions.

Ranging Principle of ISL Payload
The dual-one-way measurement of an ISL consists of two satellites alternately performing a pseudo-code phase ranging process and the mutual transfer of the measurement results. It contains two one-way pseudo-range measurements.
As shown in Figure 1, where T B is the measurement pseudo-range, ∆t is the system clock difference between satellite A and satellite B, t A is the ISL payload transmitting circuit delay of satellite A, r B is the ISL payload receiving circuit delay of satellite B, τ(t 1 , t 2 ) is the spatial delay, t 1 is the transmitting point time of satellite A, and t 0 and t 2 are the reception point time and the measurement point time of satellite B, respectively. In the current study, we focus on the variation in the ranging delay, namely, t A and r A and t B and r B , caused by the sensitivity of the ISL payload transmission and reception circuits to the ambient temperature in space. Next, we describe the composition of the ISL payload transmission and reception circuit.

Overview of ISL Payload Composition and Delay Distribution
The ISL of a navigation constellation adopts a space-and time-division multiplexing access system. The navigation satellite based on the planning table of the entire network link is associated with different visible satellites in different slot divisions. The antenna beam should perform constant fast switching; thus, the beam agile active phased-array antenna (APAA) has become the first choice for a global ISL network. The ISL transceiver is specific payload equipment for inter-satellite ranging and communication. It consists of a digital baseband (DBD) signal-processing module and an radio frequency (RF) transceiver channel. The baseband module performs spread-spectrum signal processing and algorithm protocol implementation. The RF transceiver channel realizes the signal up-down conversion and power amplification. The ISL payload principle, architecture, and related delay distribution are shown in Figure 2. In Figure 2, IF represents the intermediate-frequency interconnection, and RF represents the radio-frequency interconnection. In DBD, IOB represents the input and output block, DAC represents the digital-to-analog converter, and ADC represents the analog-to-digital converter. In the RF channel, BPF denotes the band-pass filter, LO denotes the local oscillator, HPA represents the high-power amplifier, and LNA represents the low-noise amplifier. In APAA, SPDT represents the single-pole double-throw switch, TR denotes the transmitter/receiver, and HPA and LNA have the same meaning as those in the RF channel.

Temperature Characteristic of the ISL Payload
Because of the existence of nonlinear phase units in the RF channel and APAA, such as the frequency converter, amplifier, LNA, and filter, the temperature changes generate a group delay and phase distortion when the spread-spectrum signals pass through these non-ideal transmission channels. In addition, the field-programmable gate array (FPGA), ADC, DAC, buffer, and other digital components in the DBD generate time-delay changes with the change in temperature. These changes with the temperature fluctuations are included in the pseudo-code ranging measurements of the distance. The delay characteristics of these equipment components affected by the temperature are inconsistent. Some increase with temperature in which the delay becomes smaller, such as the antenna feed network [22], whereas others increase with temperature in which the delay becomes larger, such as the frequency up-converter [23]. Because almost no information is available from manufacturers on the sensitivity of the group delay to environmental parameters of the component used in a two-way satellite time and frequency transfer (TWSTFT) device, Ref. [24] measured the values (or range of values) and uncertainties of the temperature coefficients of the group delay observed from a variety of modules used in typical TWSTFT systems, including the LNA, HPA, filters, mixers, isolators, up converter, and down-converter, which are listed in Table 1. Meanwhile, Ref. [24] measured the temperature coefficients of the delays of the whole transmission and reception channels of the TWSTFT. The temperature coefficient reaches up to 230 ps/ • C. Ref. [25] showed similar statistics for the delay equipment. The delay in the ISL payload component also demonstrated such temperature characteristics. Moreover, at different temperature points, the degree of delay variation is also inconsistent. The ISL antenna is mounted in an extravehicular manner on a satellite payload, and the RF channel and DBD are installed in the cabin. Obviously, the temperature of the whole ISL payload is unevenly distributed. The consistency delay error of the equipment introduced by temperature variation is a large error source in a two-way radio ranging system. If it is not controlled, the measurement error can reach up to tens of nanoseconds, which directly affects the key performance index of the ISL-ranging accuracy.

Architectural Overview
The architecture of the proposed ranging compensation temperature-sensing sensor is shown in Figure 3, which includes the temperature-sensing circuit, ADC, data control and processing terminal. The temperature-monitoring circuit converts the ambient temperature into an analog voltage signal. The ADC converts the collected voltage signal into a digital signal. The data control and processing terminal is responsible for controlling the multichannel ADC and converting the digital signal into transmitted and received delay compensation data of the ISL payload.

Data Preprocessing Flow and Method
The data preprocessing flow includes the data collection of temperature versus delay measurement, deviation delay data processing, compensation data storage, and compensation data calling. Each step involves a corresponding mathematical processing method, as described in details below.
We assume that the number of sampling bits of the ADC is N and the ambient temperature range in space is ∆T. Then, the temperature resolution is ∆T 2 N . We also assume that the sampling rate of the ADC is S Hz and the sampling value is x n . Because the space-temperature change is a gradual process, to avoid acquisition of instantaneous noise by the ADC resulting in compensation data bias, we first integrate sampling data x n . The integration time is t. The starting point for the integration is the transmission or reception moment of the ISL payload ranging signal, and t is much smaller than the time of ambient temperature change ∆T 2 N . Then, we calculate the arithmetic mean of the integral result and obtain sample value V. Traversing the entire temperature range can provide sequence V i , which is expressed as follows: Each V i corresponds to transmission-delay value τ T i and reception-delay value τ R i . Because the ground temperature-control equipment cannot achieve precise temperature control with resolution of ∆T 2 N , measured sequence V i cannot traverse the data space [0, 2 N − 1]. Therefore, we need to use the MATLAB (R2014a, MathWorks, Natick, Massachusetts, USA) tool function poly f it(x, y, n) to perform data fitting for τ T i and τ R i , which yields the following: where k is the order of the fitting polynomial, p T and p R are the coefficients of the fitting polynomial, and structures S T and S R are used to obtain error estimates with function polyval(p, x). Then, we use function polyval(p, x) to determine fitting sequences τ T i and τ R i , which are expressed as where delta is the estimate of the standard deviation of the fitting error and V N is the sample sequence of the N-bit ADC. To ensure accuracy of the collected data, we keep the ISL payload connection state unchanged, traverse again the temperature change interval, and fit the test data j times. Then, we obtain transmission-delay matrix τ T i,j and reception-delay matrix τ R i,j as follows: We sum up j times fitting sequences τ T i and τ R i and calculate their respective arithmetic means to obtain transmission time-delay fitting sequence τ T i and reception time-delay sequence τ R i corresponding to the final temperature range, i.e., We assume that the ADC sampling value corresponding to the stabilization temperature in the satellite cabin is V c . Then, τ T i and τ R i , which correspond to V c , are τ T c and τ R c . The delay deviation sequence of the entire temperature range relative to V c in the satellite cabin is expressed as follows: We convert sequences ∆τ T i and ∆τ R i into pseudo-code delay phase values ∆P T i and ∆P R i and store them in the read-only memory (ROM) of the FPGA, which is the DBD data-processing chip. The read address of the ROM is ADC sample value V i , and the read data are the delay compensation data. By assuming that the pseudo-code rate of the ISL ranging is C V and the bit width of the pseudo-code numerically controlled oscillator is M, we have We need to open up a single block of 2 N × M ROM capacity in the FPGA. All of these tasks are performed in advance on the ground. The onboard ISL payload only needs to read the compensation data at the time of transmission or reception as delay correction, where the read address is the integral result of the ADC sample value. When the ISL payload is received, modified ranging phase-delay value P R modi f y is expressed as where P R measure is the measured phase delay. When the ISL payload is transmitted, modified preset pseudo-code initial phase value P T modi f y is expressed as where P T initial is the initial preset pseudo-code transmission phase of the ISL payload. The diagram of the whole ranging compensation temperature-sensing sensor data processing is shown in Figure 4.

Circuit Design
On the basis of the design principle for simplicity, low power consumption, and adaptability to space environment, the design of the ranging compensation temperature-sensing sensor circuit is shown in Figure 5.
The temperature-sensing circuit converts the temperature into a voltage signal using a thermistor and a pull-up resistor. The thermistor can be distributed in the ISL payload of the APAA, RF channel, and DBD, and selection of the resistance value of the pull-up resistor is made according to the temperature-resistance range of the thermistor. To satisfy multi-module temperature sensing, the ADC uses the multi-channel simultaneous sampling chip AD7865, which is a 14-bit four-channel ADC. The data control and processing terminal uses the FPGA, which can be directly integrated into the ISL payload DBD processing chip. The complete temperature-sensing sensor can be integrated in the ISL DBD printed circuit board except the thermistor, and the occupied area is only 15 mm × 12 mm. The FPGA logic and storage resources only introduce six adders and six 2 N × M ROM storage capacity, which is less than the Xilinx XQR4VSX55 (San Jose, California, USA) slice resource of 1%. In addition, the overall power-consumption increase is less than 90 mW.

Field Data Collection and Ranging Experiment
To verify that the proposed circuit and method are valid, we used an engineering prototype for field data acquisition and ranging comparison. The selected thermistor in the −40-80 • C temperature range corresponded to a resistance range of 500-205 KΩ. Single-channel sampling rate S was set to 100 KSPS, and integration time t was 1 ms. The data control and processing terminal was integrated into the FPGA of the DBD. To facilitate the trial, we used an RF cable connection. The thermistors were installed in the ISL payload of the DBD and the RF channel and then put into the temperature box for data acquisition. The effective control of the temperature box is −30-60 • C, which is within the temperature tolerance of an industrial-grade chip. The rate of change in the temperature was 0.5 • C/min. The test scenario is shown in Figure 6. The left side of Figure 6 shows the ISL ground-support test system, which includes the time-frequency module, ground ISL signal transceiver of the baseband module, RF channel module, and industrial computer. The middle panel in Figure 6 shows the automatic temperature box, and the data acquisition and processing PC is located at the top of the temperature box. The right side of Figure 6 shows the ISL payload equipment, which is put into the temperature box, followed by the DBD, RF channel, and the baseband and channel as a unit. We separately collected four groups of transmitted and received data for the DBD and RF channel. The flow processes of 16 groups of measured data are shown in Figures 7-10    The temperature reference shown in Figures 7-10 is 14 • C, i.e., V c is 6500. We set the order of fitting polynomial k equal to 20. Subpanels (a-d) in Figures 7-10 show the delay data curves measured four times and the corresponding fitting curves. According to Equation (6), subpanel (e) shows τ T i or τ R i , the arithmetic means of the delay data measured four times and the corresponding fitting curves. According to Equation (7), τ T c and τ R c corresponding to V c of 6500, and subpanel (f) shows ∆τ T i or ∆τ R i , i.e., the final delay compensation curves. Figures 7 and 8 show the DBD transmission-and reception-delay measurement data preprocessing, respectively. Figures 9 and 10 show the RF channel transmission-and reception-delay measurement data preprocessing, respectively. Figures 7-10 show that the DBD is less affected by temperature, and its transmission and reception delays change at the level of 1 ns. Meanwhile, the RF channel, because it contains more analog nonlinear components, is more affected by the temperature. Its transmission and reception delays change at the level of 5 ns.
2,000 4,000 6,000 8,000 10,000 12,000 14,000    Figure 10. RF channel reception-delay measurement data preprocessing. (a-d) the reception-delay data measured four times and the corresponding fitting curves; (e) the arithmetic means of the delay data measured four times and the corresponding fitting curves; and (f) the final reception-delay compensation curves of the RF channel.
After the data processing, from Equation (8), the corresponding converted temperature compensation data were stored in the ROM of the FPGA. Then, we put the DBD and the RF channel together in the temperature box and controlled the temperature box at 14 • C and −30-60 • C for the delay compensation comparison test. Each test time was longer than 4 h, and the test results are shown in Figures 11 and 12.
Subsequently, we subtracted the statistical mean shown in Figures 11a and 12a from the delay-fitting value shown in Figures 11b and 12b, respectively, to obtain the residuals, as shown in Figure 13. Figure 13 shows that the delay residual error is less than that in the pseudo-code measurement. In other words, after the ranging compensation temperature-sensing sensor, the delay mean at 90 • C temperature changes reached a pseudo-code error of 0.2 ns, ensuring consistency in the ISL ranging.

Conclusions
In this study, we designed a ranging-compensated temperature-sensing sensor for ISL payload. Considering the hardware limitation of an onboard payload device, the proposed sensor only needs additional thermistors, a number of resistors, and a multi-channel ADC. The data-processing terminal can be integrated in the onboard processor FPGA, and the FPGA simply uses the ADC sampling value to read out the pre-processed compensation data. After the analysis of the experimental data, the proposed compensation circuit can control the temperature variation at a 5-ns level of delay error within 0.2 ns and ensure consistency in the ISL payload delay ranging.