Miniaturized FDDA and CMOS Based Potentiostat for Bio-Applications

A novel fully differential difference CMOS potentiostat suitable for neurotransmitter sensing is presented. The described architecture relies on a fully differential difference amplifier (FDDA) circuit to detect a wide range of reduction-oxidation currents, while exhibiting low-power consumption and low-noise operation. This is made possible thanks to the fully differential feature of the FDDA, which allows to increase the source voltage swing without the need for additional dedicated circuitry. The FDDA also reduces the number of amplifiers and passive elements in the potentiostat design, which lowers the overall power consumption and noise. The proposed potentiostat was fabricated in 0.18 µm CMOS, with 1.8 V supply voltage. The device achieved 5 µA sensitivity and 0.99 linearity. The input-referred noise was 6.9 µVrms and the flicker noise was negligible. The total power consumption was under 55 µW. The complete system was assembled on a 20 mm × 20 mm platform that includes the potentiostat chip, the electrode terminals and an instrumentation amplifier for redox current buffering, once converted to a voltage by a series resistor. the chip dimensions were 1 mm × 0.5 mm and the other PCB components were off-chip resistors, capacitors and amplifiers for data acquisition. The system was successfully tested with ferricyanide, a stable electroactive compound, and validated with dopamine, a popular neurotransmitter.


Introduction
Understanding electrical signal transmission in the brain and the neurotransmitter (NT) exchanges that give rise to it plays an important role in the study of human behavior and the development of therapies for diseases such as Alzheimer and Parkinson [1][2][3]. A brain neuron typically communicates with another neuron by using an action potential (AP) that originates in its axon hillock and propagates down to its synaptic terminals. Then, the AP triggers the release of neurotransmitters that diffuse across the synaptic gap to another neuron, at which point a postsynaptic potential is created [4]. This process continues until the transfer of information is completed. When brain dysfunctions occur, such as in Parkinson and Alzheimer diseases, it has been established that NTs like dopamine, glutamate and serotonin are involved [5].
Different techniques had been proposed to detect NTs, of which chemiluminescent imaging, liquid chromatography, positron emission tomography (PET) and single photon emission computerized The balance of this paper is as follows: Section 2 provides background on the single-ended differential difference amplifier (DDA) and the FDDA; Section 3 describes the proposed FDDA-based circuit architecture and Section 4 provides our validation results.

Background
A potentiostat circuit consists of a control unit, a measurement unit and two or three electrodes depending on the considered architecture [14]. It operates by keeping the voltage difference between a working electrode (WE) and a reference electrode (RE) at a value, V cell , for which the analyte under study is able to generate a redox current. In fast-scan cyclic voltammetry, the difference voltage ramps up linearly until reaching the oxidizing voltage, and then ramps down to the initial potential, thus creating an electrochemical reaction where the NT is oxidized during the positive sweep and reduced during the negative sweep. The reaction takes place on WE while a counter electrode (CE) supplies current to the solution in order to maintain the voltage difference between WE and RE constant. The chemical reaction current is measured via WE. Typically, the measurement is made within the interval of molecule concentration where a linear relationship exists with respect to the sensed current [18]. Figure 2a shows the diagram of a single-ended (SE) potentiostat, where the virtual ground at the-input of OP2 forces V cell to track V src , and OP3 senses the control current that is generated between CE and WE. Many integrated SE potentiostats have been proposed in the literature. Among recent works, Genov et al. reported a 16-channel integrated potentiostat for simultaneous monitoring of chemical neural activity at different locations in the brain [19]. Schienle et al. designed an array of potentiostats for DNA applications, while Stanacevic et al. demonstrated a 16-channel current-measuring VLSI sensor array system using a first-order single bit delta-sigma modulator with programmable oversampling ratio [20,21]. There is also Ahmadi et al. who reported a low power and small size current-mirror-based potentiostat [13]. The current advances in integrated circuit design and fabrication processes have created challenges for designing implantable SE potentiostats. Indeed, the lower operating voltages required by the smaller transistor geometry of current semiconductor technologies can violate Nernst equation, which states that the applied voltage in the solution must be higher than the oxidoreduction voltage of the eletroactive substance for a reaction to take place [22]. One approach to maintain sensitivity while applying a low supply voltage is to use a fully differential (FD) architecture to widen the voltage swing of the potentiostat (in comparison to an SE architecture). An FD potentiostat also solves the performance degradation of SE potentiostats due to common-mode interference [23]. There have been several FD architectures proposed in the literature in the past years. For instance, Wang et al. [24] implemented an FD potentiostat that operates in differential signal mode for the output voltage. It shows low power consumption, low-to-medium operation frequency and medium-to-high resolution that are suitable for a portable potentiostat. Martin et al. [14] described a FD potentiostat that doubles the dynamic range of the system, but more importantly, maximizes the number of detectable analytes for a given supply voltage. Finally, Nazari et al. [23] designed a potentiostat that is able to detect analytes directly via on-chip recording electrodes while benefiting from differential recording electrodes to suppress common mode noise [23]. Figure 2 shows the block diagrams of the three-electrode SE and FD potentiostats [14]. In this figure, C CE and C WE stand for the double-layer capacitance of CE and WE, while R CE , R WE represent the charge transfer resistance of the relevant electrodes. The current to be measured is monitored through a sensing resistor, R sense , with R sym added for symmetric operation in the FD case [14]. We have for both SE and FD circuits: Therefore, both potentiostats ensure that V cell =V src , but the voltage swing of the FD potentiostat is nearly twice that of the SE case, as shown next [14]: In the previous equations, S SE is the output swing voltage of single-ended amplifier and S FD is the output swing voltage of fully-differential amplifier.
Equations (3) and (4) reveal that for both the SE and FD potentiostat, the maximum voltage swing is bounded by the supply voltage term, but it is doubled in the differential architecture [25][26][27]. In addition, the reduced common mode performance of the FD architecture considerably improve the sensitivity and detection limits of the potentiostat. However, power consumption can be a problem due to the increased circuit complexity. One approach to address this issue is to reduce the number of amplifiers and resistors in the front end by using a differential difference amplifier (DDA), which already contains two differential pairs of inputs (four inputs instead of two in a conventional FD amplifier). Moreover, an FD version of DDA, called FDDA, can be used for improved output voltage swing. The FDDA improves the input differential range, supply noise rejection, dynamic range, harmonic distortion and reduces the effect of coupling between various blocks [28,29]. Additionally, a rail-to-rail input/output swing maximizes the output dynamic range for the potentiostat, thus offering a wider range of voltages for NT detection [14]. The balanced outputs of the FDDA are given in Equation (5), in which A O is the open-loop gain of the FDDA, V pp and V pn are the non-inverting pairs, and V np and V nn are the inverting pairs: When a negative feedback loop is created with the FDDA, the two differential input pairs become equal as shown in Equation (6):

Proposed Circuit Architecture
A first version of our potentiostat, shown in Figure 3, was designed with discrete components using 10 operational amplifiers, 14 off-chip resistors, and 3 large capacitors (10 nF). An optional ADC was added for data acquisition, and the system was implemented on a 4.5 cm × 3.3 cm PCB. This version is fully functional, enabling the detection of dopamine with concentrations down to 10 µM. This design is independent from the fluid's impedance since it measures the voltage across the load using the buffered inputs SP1 and SP2 and compensate for any error using the buffered output BUF3 using error integration. Amplifiers BUF1, BUF2, SUBS1 and SUBS2 are used to calculate the error: between the desired voltage V src and the actual voltage applied on the fluid. BUF5, PI1 and BUF3 are used to compensate the error and maintain the desired voltage across the fluid. However, a problem arises with this circuit when measurements are desired for implantable bio-application: the number of electrical components needed to implement this design on-chip is too high. Since the number of amplifiers used in this design can hardly be reduced to keep the exact functionality, we investigated another approach based on FDDA in order to miniaturize the circuit toward an implantable device for bio-application. Although fluid impedance is now part of this design feedback loop calculations, the low number of components allows an optimized miniaturization.   (6), the negative feedback used for this circuit leads to the following equations: As already mentioned, R sense converts the redox current to current and R sym is added to balance the FDDA output. Obviously, choosing high R sense values will allow to sense low redox currents and, consequently, low analyte concentrations.
However, high R sense values also lead to high-voltage drops across this resistor, with a negative impact on the system accuracy and linearity. Moreover, for best sensitivity, R sense cannot be increased without regard for the injected noise in the sensed current, which must be as low as possible.
The sensing current should only flow from CE to WE, as it will affect the RE voltage otherwise. The common method to prevent this is to buffer the RE electrode as shown in Figure 2b. This is achieved by default in the proposed potentiostat, where the RE terminal connects to the gate of a MOSFET in the FDDA, hence saving an operational amplifier and lowering the overall power consumption as a result. The circuit schematic of the proposed FDDA is shown in Figure 5. It is adapted from [28] and relies on a four-input, two-stage, current-mirror-based architecture. In this design, input transistors (M 1 -M 4 ) are selected with the same dimensions of width (W) and length (L); transistors M 5 -M 8 and M 9 -M 10 also have the same in size. Additionally, a common-mode feedback (CMFB) circuit to tune the common-mode output voltage is implemented with switched capacitors. The CMFB circuit is also used to adjust the dc value of the differential outputs via V bias . One important parameter to consider in the FDDA is its input-referred noise. Its average mean-squared value is given by [30]: From Equation (9), minimum thermal input-referred noise can be achieved by maximizing g m 1-4 and minimizing g m 5-8 and g m [9][10] . In order to augment the small-signal transconductance of M 1-4 (g m 1-4 ) and decrease g m 5-10 , (W/L) 1-4 should be as big as possible while (W/L) 5-10 should be as small as possible. By taking into account the chosen transistor dimensions and applying a low bias current, M 1 -M 4 will operate in the weak inversion (subthreshold) region, and M 5 -M 8 and M 9 -M 10 will operate in the moderate inversion region. The bias current of the input stage can be set by off-chip resistors connected to the V Bias input (We estimated a risk of up to 20% drift in resistance value due to fabrication process if these resistors were embedded on chip. Therefore, we preferred to use off-chip resistor in the first version of the prototype for better monitoring of chip performances).
Another important FDDA noise parameter to consider is the flicker noise (1/f noise). Since most chemical reactions occur at low frequencies, lowering this noise is critical in a potentiostat design. For the circuit of Figure 5, the average mean-squared value of the flicker noise is given by [30]: where K n and K p are the flicker noise constants for nMOS and pMOS transistors, respectively, and C ox is the gate oxide capacitance per unit area. Equation (10) shows that the flicker noise contribution of M 5 -M 10 is negligible when g m 1 g m i , leaving transistors M 1 -M 4 as the main contributors to flicker noise in the circuit; pMOS transistors are used to take advantage of their lower flicker noise in comparison to nMOS transistors [29][30][31]. To reduce the flicker noise, M 1 -M 4 should be as wide as possible and M 5 -M 10 should be as narrow as possible, but circuit stability must be considered when doing so. For a stable system (phase margin ≥ 45 • ), the two poles frequencies at g m 6 /C 6 and g m 7 /C 7 should be higher than the dominant pole at g m 1 /C L , where C 5 -C 9 are the gate capacitances of transistors M 5 -M 9 and C L is the load capacitor, whose value depends on the chemical cell and electrodes used. So, in order to lower noise in the system, g m 5 and g m 9 cannot be reduced arbitrarily (by using large a C L and low g m 1 and g m 9 ). Indeed, (g m 1 /C L ) (g m 9 /C 9 , g m 5 /C 5 ) when C L C 9 , C 5 [30].
Finally, we must also consider the FDDA open-loop gain, which can be increased by current mirror amplification between the first and second stages. Here, unit-gain current mirror amplification is used to meet the constrains of Equations (9) and (10). The gain of the proposed FDDA is given by [30]: As the dimensions of M 1 -M 4 , M 5 -M 8 and M 9 -M 10 are identical and R L is much smaller than R ds (drain-source resistor) for M 9 -M 10 and M 5 -M 8 , Equation (11) can be rewritten as Equation (12). As a result, the design benefits from the high value of g m 1 to generate the appropriate negative feedback gain.
In order to achieve a low-noise circuit, the input stage transistors were designed with a width/length ratios in the range of 200/1. However, this large ratio normally leads to more power consumption. Using a low bias current and operating the input stage transistors in the weak inversion mitigates this effect.
The reported input-referred noise (µV rms ) includes the CMFB noise. For low concentrations, the CMFB noise is an obstacle to sensitivity due to its clock interference with the sensed current. Fortunately, the clock frequency was 1 MHz, while the input signal bandwidth was 0-100 Hz, thus allowing to eliminate this noise a simple RC low-pass filter with cut-off frequency close to 100 Hz.

Experimental Verification and Validation
Two types of experiments were conducted, one to verify the system operation and the other to validate it in vitro. Next is a description of the two.

System Verification
A first prototype of 67 mm × 35 mm dimensions was designed to test the functionality of the system with non-embedded electrodes. A second system was designed on a 20 mm × 20 mm PCB with embedded electrodes and a microfluidic chamber fo size 8 mm × 8mm. The fabricated chip area by itself was about 1 mm × 0.5 mm. A first prototype of the on-chip potentiostat described in the previous section was designed in 180 nm CMOS technology, with the resulting chip encapsulated in a CQFP48 ceramic package. In addition, the transistors placed close to the chip edges, which are more sensitive to fabrication process mismatches, were increased in size a bit. All the resistors were designed for off-chip placement to improve control of the bias current and minimize the mismatch impacts. The chip was soldered on a PCB (67 mm × 35 mm) illustrated in Figure 6 to make possible the application of a 0 to 1.8 V triangular waveform to the V pp and V np inputs, and two non-overlapping 1 MHz differential clocks to the switched-capacitor CMFB circuit. Using 1 MHz clock frequency was sufficient for the proper operation in comparison to the 100 Hz frequency of the differential input signals [30] (the cyclic voltametry analysis in our experiments used 100 Hz frequency). R sense was set to 1 MΩ to allow the detection of redox currents with high linearity. Figure 7b shows the microphotograph of the fabricated chip using the 180 nm CMOS process of TSMC, with the bias, FDDA and CFMB parts identified. Following the first prototype, second compact PCB prototype (25 mm × 25 mm) was designed where the potentiostat chip was wire-bonded directly on the PCB as a loose dye, and where An 8 mm × 8 mm polydimethylsiloxane (PDMS) chamber was designed to cover and protect the CMOS chip from liquid leakage. Figure 7b shows a picture of the second prototype.
As already mentioned, the only physical contact of the potentiostat with a solution is through electrodes WE, CE and RE, and the generated redox current passes through WE to induce a voltage difference across R sense . An external low-bias-current and low-noise instrumentation amplifier (INA121 FET-Input, Texas Instrument, USA) buffers this voltage while providing additional gain if needed. (shown in Figures 6 and 7a). Since the feedback loop of the potentiostat includes the chemical solution as well as electrodes WE, CE and RE, the area and ruggedness of these electrodes, and the analyte concentration, considerably affect the system accuracy and sensitivity [32]. In this work, the electrodes surfaces were covered with gold by electro-deposition, with an estimated plating thickness of 1 µm [16,33]. A 99.99% solution of chloroauric acid (HAuCl4) was used. Before reporting the system performance with different solutions, we show in Figure 8 the impact of the output impedance on the output voltage swing. A stable system response can be observed down to 500 kΩ. (we define as stable a linear response for voltage swing, with no limiting effects when increasing the input voltage in the closed loop). Below that value, we are below the 90% of 1.25 V, the threshold for a stable potentiostat behavior with regards to the swing voltage. The frequency response of the closed-loop output voltage swing of the potentiostat was also analyzed. Figure 9 presents the obtained results, showing a inverse relationship between the output voltage swing and frequency, except for an initial plateau that ends at 1 kHz. In our intended applications, the fabricated potentiostat operates mostly below 100 Hz, hence at the maximum voltage swing. The other performances of the fabricated potentiostat were a dc gain of 57 dB and a unity-gain bandwidth of 9 MHz, with a phase margin of 55 • as shown at Figure 10. The slew rate was 21 V/µs, and the input differential range and input offset voltage of the FDDA were 1 mV and 14 µV, respectively. The measured power consumption of the chip was 53.85 µW using a 1.8 V supply voltage, with the FDDA and CMFB accounting for 33.69 µW and the voltage bias circuit for 20.16 µW. Finally, the common-mode rejection ratio (CMRR) was 84 dB, and the cut-off frequency 10 kHz. The potentiostat circuit was also tested in closed loop to analyze its output voltage swing. As shown in Figure 11, the chip's current sourcing capability saturates when the applied input voltage is more than 1.2 V. Therefore, the maximum differential output voltage range is 2.4 V when the chip is supplied with 1.8 V.

Built-in Electrodes
To evaluate the noise performance of the potentiostat, the inputs were grounded and transient analysis was performed. The obtained output RMS noise amplitude was then divided by the amplifier gain (707 V/V), yielding 6.9 µV rms for the input-referred noise. Figure 12 shows three sample noise records at 100 Hz, 1 kHz and 10 kHz operating frequencies. As can be seen, obtained data look similar, which indicates that flicker noise is not dominant in this architecture, and the system can be operated at low frequency with no adverse effect due to this noise. Indeed the difference between three figures does not exceed 1 µV rms .

In Vitro Validation
We used ferricyanide (Sigma-Aldrich, St. Louis, MO, USA) for system calibration. Ferricyanide was chosen for its stable electrochemical properties. After calibration, we conducted additional experiments to test the proposed potentiostat on an actual NT. Dopamine (Sigma-Aldrich, St. Louis, MO, USA) was used for the purpose, as it is highly electroactive.
The electrochemical analysis of ferricyanide was carried out with solutions from 500 µM to 3 mM, to determine the sensitivity and linearity of the system. The highest detected concentration without saturating the system was 3 mM. Figure 13 provides the system sensitivity for different concentrations of ferricyanide. As can be seen, the sensitivity of the potentiostat was in the micro-ampere range, and the 0.9933 regression factor attests of the high system linearity. The input voltage at which the reduction occurs for different concentrations was also measured to test the system's operational consistency. Figure 14 shows that in all tests, the redox peaks were occurring at almost identical voltage of 75 mV, thus proving a high operational consistency. After verification with ferricyanide, different concentrations of a dopamine solution, from 1 mM to 10 mM, were used in order to test the potentiostat response to a neurotransmitter. Figure 15 reports an example of obtained CV with dopamine at a concentration of 1 mM and R sense = 1 MΩ. Figure 15 shows the CV response with a scan rate of 100 mV/s. The reduction and oxidation peaks correspond to currents of −5 µA and 5 µA, respectively, with an input voltage from −400 mV to 300 mV. Figure 16 shows the corresponding detected current as a function of scan rate (labeled input frequency). As expected, the minimum detected current increased with frequency. The figure also shows a regression factor of 0.9902 and a sensitivity at the order of micro-amperes. We set the system to work continuously without any standby mode, and static power consumption was not optimized to the minimum. The linearity of the system was also very high (>0.99). On the other hand, other version of the prototype is being developed to improve the sensitivity in term of electronic and electrode design. In this regard, more effort should be devoted to optimizing the electrode arrangement and surface areas.  As shown in Table 1, the accuracy of our potentiostat is 0.993 and it uses only one FDDA amplifier, for a current sensitivity of 60 µA at the concentration of 1 µM with screen printed electrodes. In addition, our chip has relatively lower power consumption, since the ones reported in the other references may be related to complete system designs and multi-channel potentiostats. It should be noted also that this is the first iteration of the design, in which our main focus is the number of amplifier needed and accuracy in terms of linearity. The obtained current noise performance is acceptable (7 pA) for this design as we are not targeting concentration lower than 1 µM, which is equivalent to a sensing current of 60 µA. This system was designed as proof of concept for in-vitro experiments with artificial cerebrospinal fluid. It was not optimized for real implants.
The smallest concentration of dopamine that we were able to detect with was 1 mM. When the concentration is more than 3 mM the output was saturated and when it was below 500 µM there was interference with clock of CMFB. This is due to several factors, of which the potentiostat electrodes. We used electroless gold plating for them, which did not allow us a strong control over the quality of deposition. Therefore, the electrode surface area could not be accurately determined, thus preventing us from testing smaller dopamine concentrations. Other electrodes based on fiber are being fabricated and they should lead to higher sensitivity. On the other hand, obtained results show a strong reliability of our system, since the gold-plated electrodes were tested for two months with repeatable results. Afterward, the gold layer started disappearing. Different electrode architectures were tested to evaluate the system sensitivity to dopamine. We used dopamine with a KCl solution as solvent. We observed two behaviors as shown in Figures 17  and 18. Indeed as can be seen in Figure 17, when the dopamine was between 1 µM and 0.1 mM, the detected current varied between 60 µA and 100 µA. On the other hand, when the concentration was between 0.1 mM and 10 mM, the detected current was in the range of 100 µA to 840 µA. Thus, we observed two linear behaviors: one with 0.074 µA/mM at high concentration and 404.04 µA/mM at low concentration. We used carbon screen printed electrodes (RRPE1002C from PINE research, Durham, NC, USA). The stimulation voltage out of the chip was amplified with a commercial amplifier to cover the entire range from -2 V to 2 V, order to make sure that the oxidation peaks are accounted for. The experimental results clearly show that they did not exceed 1.13 V, which is within the operating voltage range of the designed chip. In terms of detected concentration range, the obtained results are similar to those reported in [34]. In terms of electrical performance, the power consumption of our system is 53 µW, versus 25 mW for 576 electrodes in [35,36]. A coarse approximation of the latter mentioned work leads to a power consumption of (25/576) mW/channel which is equivalent to 43.4 µW. Therefore, we are in the same range of power consumption. However, this is a coarse approximation as some circuits are shared between different channels in the case of [35,36]. DDA and FDDA circuits have four inputs with no need for passive elements, which make them attractive for low power and low noise applications. FDDA is the fully differential architecture of the DDA, for improved input differential range, supply noise rejection, harmonic distortion and reduced coupling effects between the various circuit blocks. Also, increasing the output swing improves the output dynamic range and can cover a wider range of detected neurotransmitters. On the other hand, a potential drawback to using the FDDA is the CMFB circuit to control the common-mode output voltage, which introduces clock interferences. Overall, using FDDA architecture reduces power consumption and noise level while improving the dynamic range and output voltage swing. Furthermore, the overall dimensions of the system were not optimized in the first prototype, where we used wire-bonding instead of more area-efficient packaging techniques such as flip-chip, and we placed the off-chip resistors further away from the chip than needed, for probing and debugging purposes. Another CMOS TSMC 180 nm chip was submitted for fabrication that includes all data acquisition amplifiers in order to reduce the biosensor area as much as possible. If we compare our die area to other published work, our area of 1 mm × 0.5 mm is smaller than [3,19] which reports 2.25 mm × 2.25 mm for 16 channels and 3.8 mm × 3.1 mm for 93 channels. However, it should be noted that in the previous example we are comparing die sizes and not one-channel circuit area.
The concentration of dopamine varies across the brain, hence motivating the need for wide dynamic range potentiostat. The system described in this work was designed primarily for in vitro experiments with artificial solutions and brain slices. A such, it was not optimized for real brain application. Currently, a second iteration is being investigated to sense concentrations down to nM and a prototype has been sent for fabrication to check its validity.

Conclusions
This paper presented a new potentiostat topology based on a FDDA circuit. The chip was fabricated with the 180 nm TSMC CMOS process. This FDDA-based potentiostat used four-input and FD output to decrease the number of amplifiers and passive elements in the circuit and to decrease the generated noise through the circuit. Moreover, The chip is designed with a wide input stage to benefit from the diminished input-referred noise of 6.9 µV rms . The whole decreased noise in both the circuit and system levels improved the sensitivity and accuracy of the potentiostat. The FD output is an original approach to detect the analytes. The main advantage of this architecture is the doubled swing voltage over V cell . Additionally, due to current-mirror architecture of the designed FDDA, the total power consumption of the potentiostat was 53.9 µW. The system was verified and tested with ferricyanide and dopamine. Further improvements in terms of power consumption are being achieved in addition to tests with other NTs. is involved in the design of the CMOS Chip and discrete circuit elaborated by Elnaz Ghodsevali. He copsupervised Elnaz Ghodsevali and revised the paper. Benoit Gosselin co-supervised Elnaz Ghodsevali, he participated in the design of the CMOS integrated potentiostat and revised the paper. Élodie Boisselier analyzed biological data and co-supervised Samuel Morneau-Gamache. She also revised the paper. Amine Miled is the principal investigator of this project, he proposed the idea of the integrated potentiostat for neurotransmitter detection. He also reviewed the CMOS and discrete designs, Microfluidic architecture and co-supervised the biological experiments.

Conflicts of Interest:
The authors declare no conflict of interest.