A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit

This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI) material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of −50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts), the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor’s output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.


Introduction
In recent years, silicon piezoresistive pressure sensors fabricated using MEMS technology have been extensively applied in commercial and industrial fields because of their small size, high precision and low cost [1]. Additionally, there is a growing demand for high-temperature pressure sensors for use in extreme temperature environments such as oil prospecting, chemical processing and aircraft gas turbine combustion controls, where pressure sensors must usually work at 220˝C or higher [2]. The high-temperature applications of silicon piezoresistive pressure sensors have become a current research priority.
PN-junction isolation technology among piezoresistive strain elements is used in traditional pressure sensors that are based on bulk silicon production. As the temperature increases, PN-junction reverse-leakage current increases, leading to short circuits between elements and device failure. There are more high-temperature thermal noises, electromagnetic noises and other interference factors than in conventional application environments [6]; therefore, more consideration should be given to improving the signal-to-noise ratio (SNR) among the sensor optimization measures [7]. However, signal interference is inevitable over long distances, especially for the signal output of piezoresistive pressure sensors, which usually has a small output range (from tens to hundreds of millivolts). This interference has a serious impact on measurement accuracy. As shown in Figure 2, after 5-m-long cable transmission for the full-scale output of a 100 mV piezoresistive pressure sensor, measurement accuracy decreases from 1% to 3% because of signal interference. Unlike the general high-temperature pressure sensor with a single chip based on SOI technology [8], the proposed device, integrated with signal-conditioning circuits, can convert a small signal output to a 0 V to 5 V standard voltage signal output, which can significantly reduce the ambient noise interference over long cable transmissions and improve the measurement accuracy. Additionally, general follow-up pressure transmitter devices in the voltage converter (shown in Figure 1) need not be added, because the standard signal output can be directly acquired by the signal acquisition system, which greatly reduces the cost of the test system. There are more high-temperature thermal noises, electromagnetic noises and other interference factors than in conventional application environments [6]; therefore, more consideration should be given to improving the signal-to-noise ratio (SNR) among the sensor optimization measures [7]. However, signal interference is inevitable over long distances, especially for the signal output of piezoresistive pressure sensors, which usually has a small output range (from tens to hundreds of millivolts). This interference has a serious impact on measurement accuracy. As shown in Figure 2, after 5-m-long cable transmission for the full-scale output of a 100 mV piezoresistive pressure sensor, measurement accuracy decreases from 1% to 3% because of signal interference. insulation (SOI), and wideband-gap semiconductor material SiC, GaN, the working temperature of piezoresistive pressure sensors can reach 300 °C or even higher [4]. However, the microfabrication technology of wideband-gap sensor materials is far less mature than silicon micromachining technology. Further progress must be made before these wideband-gap sensors can become costeffective products. Therefore, the development of high temperature low-cost micromachined silicon piezoresistive transducers based on SOI technology remains attractive. Compared to general pressure sensors in the temperature range used in industry, hightemperature pressure sensors are usually installed in high-temperature pressure test zones; their output signals are sent to low-temperature data acquisition zones via long cables through temperature buffer zones [5], as shown in Figure 1. There are more high-temperature thermal noises, electromagnetic noises and other interference factors than in conventional application environments [6]; therefore, more consideration should be given to improving the signal-to-noise ratio (SNR) among the sensor optimization measures [7]. However, signal interference is inevitable over long distances, especially for the signal output of piezoresistive pressure sensors, which usually has a small output range (from tens to hundreds of millivolts). This interference has a serious impact on measurement accuracy. As shown in Figure 2, after 5-m-long cable transmission for the full-scale output of a 100 mV piezoresistive pressure sensor, measurement accuracy decreases from 1% to 3% because of signal interference. Unlike the general high-temperature pressure sensor with a single chip based on SOI technology [8], the proposed device, integrated with signal-conditioning circuits, can convert a small signal output to a 0 V to 5 V standard voltage signal output, which can significantly reduce the ambient noise interference over long cable transmissions and improve the measurement accuracy. Additionally, general follow-up pressure transmitter devices in the voltage converter (shown in Figure 1) need not be added, because the standard signal output can be directly acquired by the signal acquisition system, which greatly reduces the cost of the test system. Unlike the general high-temperature pressure sensor with a single chip based on SOI technology [8], the proposed device, integrated with signal-conditioning circuits, can convert a small signal output to a 0 V to 5 V standard voltage signal output, which can significantly reduce the ambient noise interference over long cable transmissions and improve the measurement accuracy. Additionally, general follow-up pressure transmitter devices in the voltage converter (shown in Figure 1) need not be added, because the standard signal output can be directly acquired by the signal acquisition system, which greatly reduces the cost of the test system.

Design and Fabrication of the Pressure-Sensitive Chip
(1) Design of the pressure-sensitive chip The pressure-sensitive chip testing method uses the principle of the Wheatstone bridge, as shown in Figure 3a. The design parameters include the doping concentration; the shape and size of the pressure-sensitive chip and its diaphragm; and the size, shape, and placement of piezoresistors.

Design and Fabrication of the Pressure-Sensitive Chip
(1) Design of the pressure-sensitive chip The pressure-sensitive chip testing method uses the principle of the Wheatstone bridge, as shown in Figure 3a. The design parameters include the doping concentration; the shape and size of the pressure-sensitive chip and its diaphragm; and the size, shape, and placement of piezoresistors. Based on the relationship curve of doping concentration, the temperature coefficient of the piezoresistor (TCR), and the temperature coefficient of the piezoresistive coefficient (TCπ) [9], the doping concentration value of 2 × 10 18 cm −3 is used for the production of a boron-doped device layer, in order to make sensitivity temperature drift as small as possible. The design of a 2 mm side-length square structure is used for the pressure-sensitive chip for ease of processing, cost reduction, and increased production (each piece of the SOI wafer can produce no less than 1300 sensitive chips).
For ease of manufacture, the silicon diaphragm is a sensitive membrane in the form of a square, as shown in Figure 3b. By including the existing theoretical foundation, we found that a sensitive silicon diaphragm of thickness h with side length a should meet the following three requirements: first, output linearity requires that the sensitive diaphragm should follow the small deflection theory model, which means that the maximum deflection of the diaphragm is less than 20% of the thickness of the center; second, the maximum overload stress requires that the combined stress value (the difference of longitudinal stress and transverse stress) at each point on the film is less than or equal to 30% of the material rupture stress; third, the higher sensitivity output requires that the relative rate of change of the varistor be greater than 2%. According to the shell theory formula [10], the requirements above can be restated by Equation (1) where the piezoresistive coefficient π44 = 138 × 1011 Pa −1 , Young's modulus E = 190 GPa, Poisson's ratio v = 0.28. When the pressure sensor range P = 2 MPa, pressure can be calculated from the equation set for a reasonable range of a/h from 22 to 28. For the side length of 2 mm of the pressure-sensitive chip, the thickness of the diaphragm can be set to 40 μm for a sensitive diaphragm side length of 1 mm. The four piezoresistors size should meet the components' power requirement that the rated power per unit area of the components is less than the dissipated power per unit area of the material. Otherwise, the accumulation of heat easily causes the components to undergo fuse failure. The power dissipated per unit area of silicon is 5 × 10 −3 mW/μm 2 [11], which can be expressed as: Based on the relationship curve of doping concentration, the temperature coefficient of the piezoresistor (TCR), and the temperature coefficient of the piezoresistive coefficient (TCπ) [9], the doping concentration value of 2ˆ10 18 cm´3 is used for the production of a boron-doped device layer, in order to make sensitivity temperature drift as small as possible. The design of a 2 mm side-length square structure is used for the pressure-sensitive chip for ease of processing, cost reduction, and increased production (each piece of the SOI wafer can produce no less than 1300 sensitive chips).
For ease of manufacture, the silicon diaphragm is a sensitive membrane in the form of a square, as shown in Figure 3b. By including the existing theoretical foundation, we found that a sensitive silicon diaphragm of thickness h with side length a should meet the following three requirements: first, output linearity requires that the sensitive diaphragm should follow the small deflection theory model, which means that the maximum deflection of the diaphragm is less than 20% of the thickness of the center; second, the maximum overload stress requires that the combined stress value (the difference of longitudinal stress and transverse stress) at each point on the film is less than or equal to 30% of the material rupture stress; third, the higher sensitivity output requires that the relative rate of change of the varistor be greater than 2%. According to the shell theory formula [10], the requirements above can be restated by Equation (1): where the piezoresistive coefficient π 44 = 138ˆ1011 Pa´1, Young's modulus E = 190 GPa, Poisson's ratio v = 0.28. When the pressure sensor range P = 2 MPa, pressure can be calculated from the equation set for a reasonable range of a/h from 22 to 28. For the side length of 2 mm of the pressure-sensitive chip, the thickness of the diaphragm can be set to 40 µm for a sensitive diaphragm side length of 1 mm. The four piezoresistors size should meet the components' power requirement that the rated power per unit area of the components is less than the dissipated power per unit area of the material. Otherwise, the accumulation of heat easily causes the components to undergo fuse failure. The power dissipated per unit area of silicon is 5ˆ10´3 mW/µm 2 [11], which can be expressed as:  (2) where R P is the piezoresistor's resistance value, R S is the square resistance, W is the resistance strip width, L is the resistance strip length, and I is the operating current value. Based on the target square resistance, the constant voltage source power supply, and the derating, the size of the resistance strip can be set to 10 µmˆ150 µm, with a "U"-shaped structure, as shown in Figure 3c. Figure 4 shows the pressure-sensitive chip simulation of stress distribution diagram. It can be obviously seen that stress concentration areas are an intermediate position of the four edges of the sensitive diaphragm. Therefore, the piezoresistors should be placed in stress concentration areas to improve the sensitivity of the sensor.
Sensors 2016, 16, 913 4 of 12 where RP is the piezoresistor's resistance value, RS is the square resistance, W is the resistance strip width, L is the resistance strip length, and I is the operating current value. Based on the target square resistance, the constant voltage source power supply, and the derating, the size of the resistance strip can be set to 10 μm × 150 μm, with a "U"-shaped structure, as shown in Figure 3c. Figure 4 shows the pressure-sensitive chip simulation of stress distribution diagram. It can be obviously seen that stress concentration areas are an intermediate position of the four edges of the sensitive diaphragm. Therefore, the piezoresistors should be placed in stress concentration areas to improve the sensitivity of the sensor. (2) Fabrication and package of the pressure-sensitive chip The SOI material and the standard MEMS process is used in pressure-sensitive chip fabrication, as shown in Figure 5. a) SOI wafer: 4 inches, n-type, <100> crystal orientation, silicon device layer thickness of 2 μm, silicon dioxide dielectric spacer layer thickness of 1 μm, total thickness of 400 μm. b) Boron doping: Solid source of boron thermal diffusion process is used for boron doping in the silicon device layer, at a target doping concentration of 2 × 10 18 cm −3 . c) Etching piezoresistors: an inductive coupled plasma (ICP) dry etching process is used to etch piezoresistors on the silicon device layer. d) Depositing a passivation layer: the plasma enhanced chemical vapor deposition (PECVD) process is used to deposit a passivation layer with a total thickness of 0.3 μm of SiO2 and Si3N4 so as to protect the piezoresistors. e) Etching the ohmic contact region: the ICP dry etching process is used again to etch the ohmic contact region between the piezoresistors and the metal lead. f) Heavy doping in the ohmic contact region: a solid source of boron thermal diffusion processes is used again to heavily dope the ohmic contact region as to reduce the contact resistance between the piezoresistors and the metal lead, with a target doping concentration greater than 2 × 10 20 cm −3 . g) Sputtering metal lead: the sputtering process is used to produce a metal lead and wire bonding pads. The three sputtered layers of metal are Ti, Pt, and Au from bottom to top; among them, Ti is an adhesion layer, Pt is a barrier layer, and Au is a conductive passivation (2) Fabrication and package of the pressure-sensitive chip The SOI material and the standard MEMS process is used in pressure-sensitive chip fabrication, as shown in Figure 5. a) SOI wafer: 4 inches, n-type, <100> crystal orientation, silicon device layer thickness of 2 µm, silicon dioxide dielectric spacer layer thickness of 1 µm, total thickness of 400 µm. b) Boron doping: Solid source of boron thermal diffusion process is used for boron doping in the silicon device layer, at a target doping concentration of 2ˆ10 18 cm´3. c) Etching piezoresistors: an inductive coupled plasma (ICP) dry etching process is used to etch piezoresistors on the silicon device layer. d) Depositing a passivation layer: the plasma enhanced chemical vapor deposition (PECVD) process is used to deposit a passivation layer with a total thickness of 0.3 µm of SiO 2 and Si 3 N 4 so as to protect the piezoresistors. e) Etching the ohmic contact region: the ICP dry etching process is used again to etch the ohmic contact region between the piezoresistors and the metal lead. f) Heavy doping in the ohmic contact region: a solid source of boron thermal diffusion processes is used again to heavily dope the ohmic contact region as to reduce the contact resistance between the piezoresistors and the metal lead, with a target doping concentration greater than 2ˆ10 20 cm´3. g) Sputtering metal lead: the sputtering process is used to produce a metal lead and wire bonding pads. The three sputtered layers of metal are Ti, Pt, and Au from bottom to top; among them, Ti is an adhesion layer, Pt is a barrier layer, and Au is a conductive passivation layer. To ensure the follow-up wire bonds reliably, the thickness of the Au layer should be greater than 200 nm. layer. To ensure the follow-up wire bonds reliably, the thickness of the Au layer should be greater than 200 nm. h) Release the pressure-sensitive diaphragm: the BOSCH process is used to deeply etch the bottom of the wafer, creating a pressure-sensitive diaphragm. i) Making the reference absolute pressure chamber: the anodic bonding process between the bottom area of wafer and 300-um-thick glass Pyrex 7740 is used to make an absolute pressure reference chamber. The pressure-sensitive chip (glass surface down) is mounted on a 316 L stainless steel base using a high-temperature adhesive to ceate a modular package, as shown in Figure 6. The electrode pads of the pressure-sensitive chip are leaded to Kovar pins of the package base using a thermocompression wire bonding process. Insulating glass is filled into the gap between the Kovar pins and the package base to ensure good electrical isolation.

Design of the Pressure-Sensitive Chip Temperature Compensation Circuit
For high-temperature piezoresistive pressure sensors following the principles of Wheatstone bridge measurement, continuous drift in the sensor's output voltage is inevitable, because the piezoresistance increases with temperature, whereas the piezoresistive coefficient decreases [12]; this phenomenon adversely affects the testing precision. Therefore, it is critical to achieve effective temperature compensation for high-temperature piezoresistive pressure sensors. Commonly used temperature compensation methods include hardware compensation and software compensation [13]. Software compensation requires a large number of experiments using the pressure-sensitive chip, establishing temperature drift data, then completing compensation using an inverse function algorithm or an artificial neural networks algorithm [14], which usually has extremely high accuracy; however, the complex compensation system and the high cost of testing make it difficult to achieve large-scale production. In contrast, hardware compensation, because of the characteristics of simplicity, reliability, low cost, high accuracy, wide application range, and ease of batch manufacturing, has been widely used. Hardware compensation typically uses an additional The pressure-sensitive chip (glass surface down) is mounted on a 316 L stainless steel base using a high-temperature adhesive to ceate a modular package, as shown in Figure 6. The electrode pads of the pressure-sensitive chip are leaded to Kovar pins of the package base using a thermo-compression wire bonding process. Insulating glass is filled into the gap between the Kovar pins and the package base to ensure good electrical isolation. layer. To ensure the follow-up wire bonds reliably, the thickness of the Au layer should be greater than 200 nm. h) Release the pressure-sensitive diaphragm: the BOSCH process is used to deeply etch the bottom of the wafer, creating a pressure-sensitive diaphragm. i) Making the reference absolute pressure chamber: the anodic bonding process between the bottom area of wafer and 300-um-thick glass Pyrex 7740 is used to make an absolute pressure reference chamber. The pressure-sensitive chip (glass surface down) is mounted on a 316 L stainless steel base using a high-temperature adhesive to ceate a modular package, as shown in Figure 6. The electrode pads of the pressure-sensitive chip are leaded to Kovar pins of the package base using a thermocompression wire bonding process. Insulating glass is filled into the gap between the Kovar pins and the package base to ensure good electrical isolation.

Design of the Pressure-Sensitive Chip Temperature Compensation Circuit
For high-temperature piezoresistive pressure sensors following the principles of Wheatstone bridge measurement, continuous drift in the sensor's output voltage is inevitable, because the piezoresistance increases with temperature, whereas the piezoresistive coefficient decreases [12]; this phenomenon adversely affects the testing precision. Therefore, it is critical to achieve effective temperature compensation for high-temperature piezoresistive pressure sensors. Commonly used temperature compensation methods include hardware compensation and software compensation [13]. Software compensation requires a large number of experiments using the pressure-sensitive chip, establishing temperature drift data, then completing compensation using an inverse function algorithm or an artificial neural networks algorithm [14], which usually has extremely high accuracy; however, the complex compensation system and the high cost of testing make it difficult to achieve large-scale production. In contrast, hardware compensation, because of the characteristics of simplicity, reliability, low cost, high accuracy, wide application range, and ease of batch manufacturing, has been widely used. Hardware compensation typically uses an additional

Design of the Pressure-Sensitive Chip Temperature Compensation Circuit
For high-temperature piezoresistive pressure sensors following the principles of Wheatstone bridge measurement, continuous drift in the sensor's output voltage is inevitable, because the piezoresistance increases with temperature, whereas the piezoresistive coefficient decreases [12]; this phenomenon adversely affects the testing precision. Therefore, it is critical to achieve effective temperature compensation for high-temperature piezoresistive pressure sensors. Commonly used temperature compensation methods include hardware compensation and software compensation [13]. Software compensation requires a large number of experiments using the pressure-sensitive chip, establishing temperature drift data, then completing compensation using an inverse function algorithm or an artificial neural networks algorithm [14], which usually has extremely high accuracy; however, the complex compensation system and the high cost of testing make it difficult to achieve large-scale production. In contrast, hardware compensation, because of the characteristics of simplicity, reliability, low cost, high accuracy, wide application range, and ease of batch manufacturing, has been widely used. Hardware compensation typically uses an additional thermistor, a low temperature coefficient resistor network, a diode, a triode, an adjustable gain operational amplifier, and so on [15]. This design of the pressure-sensitive chip temperature compensation circuit uses a passive resistor temperature compensation model based on hardware compensation of low-temperature-coefficient resistor networks, as shown in Figure 7. The bridge circuit is powered by a constant voltage source Vin, with passive compensation resistors Rs, Rp, and Rz. The premise of the model is that the temperature coefficient of the passive resistor should be less than 1% of that of the bridge arm resistor. In this case, the temperature coefficient of the passive resistor can be ignored. Because the temperature coefficient of a typical silicon piezoresistor is greater than 2000 ppm [16], the temperature coefficient of the passive resistor should be less than 200 ppm. thermistor, a low temperature coefficient resistor network, a diode, a triode, an adjustable gain operational amplifier, and so on [15]. This design of the pressure-sensitive chip temperature compensation circuit uses a passive resistor temperature compensation model based on hardware compensation of low-temperaturecoefficient resistor networks, as shown in Figure 7. The bridge circuit is powered by a constant voltage source Vin, with passive compensation resistors Rs, Rp, and Rz. The premise of the model is that the temperature coefficient of the passive resistor should be less than 1% of that of the bridge arm resistor. In this case, the temperature coefficient of the passive resistor can be ignored. Because the temperature coefficient of a typical silicon piezoresistor is greater than 2000 ppm [16], the temperature coefficient of the passive resistor should be less than 200 ppm. For the negative initial offset voltage of this pressure-sensitive chip, the compensation model in Figure 7a can be adopted, the output voltage expression of which is: The measurement parameters of the compensation model, which should be tested in advance, involve the four bridge arm resistances at the two compensation temperature thresholds of the hightemperature pressure sensor, T0, and T1 (T0 < T1), and two load pressures, P0, and P1 (P0 < P1). The test results for the bridge arm resistors at temperature thresholds of 20 °C (T0) and 220 °C (T1) and the load pressures at 200 kPa (P0) and 600 kPa (P1) are listed in Table 1. According to the demands of bridge temperature compensation, the algorithm for passive resistor temperature compensation can be written as: For the negative initial offset voltage of this pressure-sensitive chip, the compensation model in Figure 7a can be adopted, the output voltage expression of which is: V OUT pT, Pq " V INˆr R 2 pT,Pq`R 3 pT,Pqs rR Z`R4 pT,Pq`R 1 pT,Pq R P s rR 2 pT,Pq`R 3 pT,Pqs rR Z`R4 pT,Pq`R 1 pT,Pq R P s`R S" R Z`R4 pT,Pq R Z`R4 pT,Pq`R 1 pT,Pq R P´R 3 pT, Pq R 2 pT, Pq`R 3 pT, Pq ı The measurement parameters of the compensation model, which should be tested in advance, involve the four bridge arm resistances at the two compensation temperature thresholds of the high-temperature pressure sensor, T 0 , and T 1 (T 0 < T 1 ), and two load pressures, P 0 , and P 1 (P 0 < P 1 ). The test results for the bridge arm resistors at temperature thresholds of 20˝C (T 0 ) and 220˝C (T 1 ) and the load pressures at 200 kPa (P 0 ) and 600 kPa (P 1 ) are listed in Table 1. According to the demands of bridge temperature compensation, the algorithm for passive resistor temperature compensation can be written as: These equations show that the compensation of the temperature coefficient of the offset requires the sensor output voltage under the initial load pressure P 0 to be independent of temperature. The compensation of the temperature coefficient of sensitivity also requires the sensor output voltage under the higher load pressure P 1 to be independent of temperature. These requirements mean that the partial derivatives of V OUT (T, P 0 ) and V OUT (T, P 1 ) with respect to temperature T must remain equal to zero.
The algorithm for the passive resistor temperature compensation shown in Equation (4) can be solved by examining the plot in Figure 8, which applies MATLAB to the test data in Table 1 (setting the offset output voltage U 0 = 4 mV).
These equations show that the compensation of the temperature coefficient of the offset requires the sensor output voltage under the initial load pressure P0 to be independent of temperature. The compensation of the temperature coefficient of sensitivity also requires the sensor output voltage under the higher load pressure P1 to be independent of temperature. These requirements mean that the partial derivatives of VOUT(T, P0) and VOUT(T, P1) with respect to temperature T must remain equal to zero.
The algorithm for the passive resistor temperature compensation shown in Equation (4) can be solved by examining the plot in Figure 8, which applies MATLAB to the test data in Table 1 (setting the offset output voltage U0 = 4 mV). The parameter values were varied within the following ranges of compensation resistance: From these parameters, we obtained the minimal compensation resistance parameters: Sensor calibration was conducted for uncompensated and compensated sensors in the range of 20-220 °C and 100-2000 kPa. The results are shown in Figure 9. The uncompensated sensor calibration curve (Figure 9a) shows significant variation over the temperature range; the overall accuracy is ±18%FS. However, the sensor calibration curve compensated using the passive resistor temperature compensation (Figure 9b) exhibits significantly better accuracy at ±1.5%FS over the entire temperature range.

Design of High-Temperature Signal-Conditioning Circuit
The main function of the high-temperature signal-conditioning circuit is amplification of the sensor output voltage signal from tens of millivolts to 0 V~5 V. Additionally, the circuit has a flexible adjustable range in offset voltage and magnification. A high temperature operational amplifier (HT1104) and a linear regulator (HTPLREG05) produced by Honeywell (Morris Plains, NJ, USA) are used; these devices have long-term stability working in the temperature range from −55 °C to +225 °C . The parameter values were varied within the following ranges of compensation resistance: R Z P r0, 200Ωs , R P P r1kΩ, 1000kΩs , R S P r1kΩ, 30kΩs From these parameters, we obtained the minimal compensation resistance parameters: Sensor calibration was conducted for uncompensated and compensated sensors in the range of 20-220˝C and 100-2000 kPa. The results are shown in Figure 9. The uncompensated sensor calibration curve (Figure 9a) shows significant variation over the temperature range; the overall accuracy is˘18%FS. However, the sensor calibration curve compensated using the passive resistor temperature compensation (Figure 9b) exhibits significantly better accuracy at˘1.5%FS over the entire temperature range.

Design of High-Temperature Signal-Conditioning Circuit
The main function of the high-temperature signal-conditioning circuit is amplification of the sensor output voltage signal from tens of millivolts to 0 V~5 V. Additionally, the circuit has a flexible adjustable range in offset voltage and magnification. A high temperature operational amplifier (HT1104) and a linear regulator (HTPLREG05) produced by Honeywell (Morris Plains, NJ, USA) are used; these devices have long-term stability working in the temperature range from´55˝C to +225˝C.
Based on the high output impedance of the pressure-sensitive chip, a typical value in the range 1 kΩ to 8 kΩ due to materials and process errors, the high-temperature signal-conditioning circuit should have a high input impedance. Here, three operational amplifiers are used to improve the circuit input impedance, as shown in Figure 10. Based on the high output impedance of the pressure-sensitive chip, a typical value in the range 1 kΩ to 8 kΩ due to materials and process errors, the high-temperature signal-conditioning circuit should have a high input impedance. Here, three operational amplifiers are used to improve the circuit input impedance, as shown in Figure 10. The pressure-sensitive chip's positive and negative outputs can be connected to the two operational amplifiers' non-inverting inputs (Vin+ and Vin−) to ensure a high input impedance. To prevent signal amplifying circuit zero voltage drift due to RF rectification effects [17], an RC low-pass filter network consisting of C1 to C3, and R3 to R4 (C1 = C2, C3 = 10C1) can be used to eliminate RF interference. The differential mode and common mode filter cut-off frequencies, which are adjustable based on the pressure-sensitive chip frequency range, can be expressed as: Vref for DC bias voltage of the output amplified signal can be obtained by linear regulator output voltage division. R5 (the gain adjustment resistor) determines the output voltage of the hightemperature signal-conditioning circuit, which can be expressed as: Based on the high output impedance of the pressure-sensitive chip, a typical value in the range 1 kΩ to 8 kΩ due to materials and process errors, the high-temperature signal-conditioning circuit should have a high input impedance. Here, three operational amplifiers are used to improve the circuit input impedance, as shown in Figure 10. The pressure-sensitive chip's positive and negative outputs can be connected to the two operational amplifiers' non-inverting inputs (Vin+ and Vin−) to ensure a high input impedance. To prevent signal amplifying circuit zero voltage drift due to RF rectification effects [17], an RC low-pass filter network consisting of C1 to C3, and R3 to R4 (C1 = C2, C3 = 10C1) can be used to eliminate RF interference. The differential mode and common mode filter cut-off frequencies, which are adjustable based on the pressure-sensitive chip frequency range, can be expressed as: Vref for DC bias voltage of the output amplified signal can be obtained by linear regulator output voltage division. R5 (the gain adjustment resistor) determines the output voltage of the hightemperature signal-conditioning circuit, which can be expressed as: The pressure-sensitive chip's positive and negative outputs can be connected to the two operational amplifiers' non-inverting inputs (Vin+ and Vin´) to ensure a high input impedance. To prevent signal amplifying circuit zero voltage drift due to RF rectification effects [17], an RC low-pass filter network consisting of C1 to C3, and R3 to R4 (C1 = C2, C3 = 10C1) can be used to eliminate RF interference. The differential mode and common mode filter cut-off frequencies, which are adjustable based on the pressure-sensitive chip frequency range, can be expressed as: Vref for DC bias voltage of the output amplified signal can be obtained by linear regulator output voltage division. R5 (the gain adjustment resistor) determines the output voltage of the high-temperature signal-conditioning circuit, which can be expressed as:

Design of the Sensor Structure and Its Assembly
The assembly structure and pictures of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit are shown in Figures 11 and 12, respectively. The device has the characteristics of small size, light weight, easy dismantling, and good sealing performance. The pressure sensor adopts a bottom-up vertical assembly process. At the beginning, the packaged pressure sensitive chip is mounted in gas pipeline with seal rings and is fastened to the end by the locking compression ring, which achieves a hermetic seal. Then, the temperature compensation circuit and the signal-conditioning circuit are successively installed using the support column and the screws fastening; the electrical interconnections among them are created using a high-temperature cable. Finally, the shell and connector are assembled to export the signal and the power supply interface.

Design of the Sensor Structure and Its Assembly
The assembly structure and pictures of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit are shown in Figures 11 and 12, respectively. The device has the characteristics of small size, light weight, easy dismantling, and good sealing performance. The pressure sensor adopts a bottom-up vertical assembly process. At the beginning, the packaged pressure sensitive chip is mounted in gas pipeline with seal rings and is fastened to the end by the locking compression ring, which achieves a hermetic seal. Then, the temperature compensation circuit and the signal-conditioning circuit are successively installed using the support column and the screws fastening; the electrical interconnections among them are created using a hightemperature cable. Finally, the shell and connector are assembled to export the signal and the power supply interface.

Design of the Sensor Structure and Its Assembly
The assembly structure and pictures of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit are shown in Figures 11 and 12, respectively. The device has the characteristics of small size, light weight, easy dismantling, and good sealing performance. The pressure sensor adopts a bottom-up vertical assembly process. At the beginning, the packaged pressure sensitive chip is mounted in gas pipeline with seal rings and is fastened to the end by the locking compression ring, which achieves a hermetic seal. Then, the temperature compensation circuit and the signal-conditioning circuit are successively installed using the support column and the screws fastening; the electrical interconnections among them are created using a hightemperature cable. Finally, the shell and connector are assembled to export the signal and the power supply interface.

Sensor Performance Test
The measurement parameters of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit, have a range of 2 MPa and can be tested using the calibration devices shown in Figure 13; the test results are shown in Figure 14.

Sensor Performance Test
The measurement parameters of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit, have a range of 2 MPa and can be tested using the calibration devices shown in Figure 13; the test results are shown in Figure 14. The sensor parameters and corresponding performance comparison with XTE-190 (produced by KULITE, Leonia, NJ, USA) are listed in Table 2. As can be seen, this sensor's sensitivity is much larger than that of the XTE-190, which is beneficial for test applications, and the total accuracy in the compensation temperature range is slightly lower than that of the XTE-190 (however, this can be further improved by reducing parameters drift at high temperatures, which is due to the pressure sensor residual stress).

Sensor Performance Test
The measurement parameters of the high-temperature piezoresistive pressure sensor with integrated signal-conditioning circuit, have a range of 2 MPa and can be tested using the calibration devices shown in Figure 13; the test results are shown in Figure 14. The sensor parameters and corresponding performance comparison with XTE-190 (produced by KULITE, Leonia, NJ, USA) are listed in Table 2. As can be seen, this sensor's sensitivity is much larger than that of the XTE-190, which is beneficial for test applications, and the total accuracy in the compensation temperature range is slightly lower than that of the XTE-190 (however, this can be further improved by reducing parameters drift at high temperatures, which is due to the pressure sensor residual stress). The sensor parameters and corresponding performance comparison with XTE-190 (produced by KULITE, Leonia, NJ, USA) are listed in Table 2. As can be seen, this sensor's sensitivity is much larger than that of the XTE-190, which is beneficial for test applications, and the total accuracy in the compensation temperature range is slightly lower than that of the XTE-190 (however, this can be further improved by reducing parameters drift at high temperatures, which is due to the pressure sensor residual stress).
Reliability testing can be carried out through a temperature cycle test and an aging test, as shown in Figure 15. After the aging test (operating for 40 h at 150˝C), and the ten temperature cycle test where the sensor operates for 1 h at (alternately)´50˝C and 220˝C, the rate of temperature change is 10˝C/min, and the parameters of the sensor do not change. The estimated time zero drift and time sensitivity drift are less than 1%FS. Reliability testing can be carried out through a temperature cycle test and an aging test, as shown in Figure 15. After the aging test (operating for 40 h at 150 °C ), and the ten temperature cycle test where the sensor operates for 1 h at (alternately) −50 °C and 220 °C , the rate of temperature change is 10 °C /min, and the parameters of the sensor do not change. The estimated time zero drift and time sensitivity drift are less than 1%FS. The results of the 5 m long-term transmission comparative test between the high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit and the device without it show that the SNR of the sensor with an integrated signal-conditioning circuit can be improved by more than 20 dB, which suggests significant advantages for long-term transmission applications.

Conclusions
This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressuresensitive chip, a temperature compensation circuit, and a signal-conditioning circuit. The SOI material and the standard MEMS process are used in pressure-sensitive chip fabrication, which adopts the base package for ease of installation; high-temperature electronic components are adopted in the temperature compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal. The output temperature drift of the pressure sensor is corrected by a passive resistor temperature compensation model whose parameters can be solved using an algorithm based on the calibration data of the uncompensated pressure-sensitive chip. Using the temperature compensation circuit and the signal-conditioning circuit, the small output signal of the pressuresensitive chip is amplified into 0 V to 5 V (which is a standard voltage output signal), which can be certified to have better signal-to-noise ratio in a long-term transmission test. Additionally, because this flexible sensor output voltage is adjustable, the general follow-up pressure transmitter devices for the voltage converter need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments. The results of the 5 m long-term transmission comparative test between the high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit and the device without it show that the SNR of the sensor with an integrated signal-conditioning circuit can be improved by more than 20 dB, which suggests significant advantages for long-term transmission applications.

Conclusions
This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit, and a signal-conditioning circuit. The SOI material and the standard MEMS process are used in pressure-sensitive chip fabrication, which adopts the base package for ease of installation; high-temperature electronic components are adopted in the temperature compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal. The output temperature drift of the pressure sensor is corrected by a passive resistor temperature compensation model whose parameters can be solved using an algorithm based on the calibration data of the uncompensated pressure-sensitive chip. Using the temperature compensation circuit and the signal-conditioning circuit, the small output signal of the pressure-sensitive chip is amplified into 0 V to 5 V (which is a standard voltage output signal), which can be certified to have better signal-to-noise ratio in a long-term transmission test. Additionally, because this flexible sensor output voltage is adjustable, the general follow-up pressure transmitter devices for the voltage converter need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.