Fractional-Order Chaotic Memory with Wideband Constant Phase Elements

This paper provides readers with three partial results that are mutually connected. Firstly, the gallery of the so-called constant phase elements (CPE) dedicated for the wideband applications is presented. CPEs are calculated for 9° (decimal orders) and 10° phase steps including ¼, ½, and ¾ orders, which are the most used mathematical orders between zero and one in practice. For each phase shift, all necessary numerical values to design fully passive RC ladder two-terminal circuits are provided. Individual CPEs are easily distinguishable because of a very high accuracy; maximal phase error is less than 1.5° in wide frequency range beginning with 3 Hz and ending with 1 MHz. Secondly, dynamics of ternary memory composed by a series connection of two resonant tunneling diodes is investigated and, consequently, a robust chaotic behavior is discovered and reported. Finally, CPEs are directly used for realization of fractional-order (FO) ternary memory as lumped chaotic oscillator. Existence of structurally stable strange attractors for different orders is proved, both by numerical analyzed and experimental measurement.


Introduction
Recently, utilization of FO circuit elements in the analog signal processing applications attracts increasing interest among researchers and especially circuit design engineers [1]. Despite significant manufacturing efforts, circuit elements characterized by a FO network function close-enough to ideal are still not commercially available. Thus, behavior of FO two-terminal or two-port device should be approximated, either in time domain or, more commonly, in frequency domain. In the latter case, we must construct a robust circuit with the constant phase shift between response (voltage or current) and driving force (voltage or current) from DC to infinite frequency. Obviously, a circuit cannot satisfy such requirement. Thus, approximation of CPE is valid only in some limited frequency range predefined by application. Concrete value of a phase shift depends on mathematical order of CPE. In practice, CPEs are primarily constructed as two-terminal devices and mostly for the non-integer orders between zero and one; to replace standard capacitor with the so-called fractal capacitor. In this case, phase shift between current and voltage is 90α • , where α∈(0, 1) is mathematical order of designed CPE. If speaking in terms of module frequency response, admittance linearly increases (in logarithmic horizontal scale), namely with slope 20α dB per frequency decade. Besides fractal capacitor, we can find FO integrator, i.e., two-port where voltage transfer function has FO character. Higher non-integer orders can be implemented easily by a cascading two or more FO integrators. It is much more transparent than utilization of the general immittance converters to create FO immittance with an order higher than one. Some interesting structures of immittance converters capable to create arbitrary FO can be found in papers [2][3][4]. In addition, conventional topologies such as the general immittance converters by

Design Methods Dedicated for CPE
As mentioned before, CPE is usually approximated in the frequency domain. It means that the higher order circuit having complex network function realizes CPE. To be more specific, this network function has several real negative zeroes and poles that alternates on frequency axis and this variation of zeroes and poles creates final ripple of phase frequency response. Each CPE is designed based on three input parameters: frequency range (depends on the future applications), maximal phase error (should be as small as possible) and complexity (each zero and pole pair needs to be implemented by additional sub-circuit). For given frequency interval, maximal phase difference between ideal and approximated CPE is inversely proportional to the circuit complexity, i.e., very accurate CPEs have a FO network function with many zeroes and poles.
In the case of proposed wideband CPEs, the frequency band begins at 3 Hz and finishes at 1 MHz. To preserve distinguishability between individual orders of CPEs, the maximal phase error needs to be lower than 1.5 • . Having these two input parameters defined the resulting complexity as a sixth order network function. This general network function can be written in Laplace transform as where s is a complex frequency, a k and b k are real positive coefficients, and z k and p k are zeroes and poles of network function. Of course, if function (1) is at least of second order it can be further decomposed into biquadratic sub-sections. Zeroes and poles of a complex network function (1) are real, negative (it is system with minimal argument) and alternates equidistantly (in a logarithmic scale) on the frequency axis. This alternation creates final phase ripple around theoretical value given as 90 • α, where α is a non-integer order of designed CPE. Phase ripple in degrees that can be expected in the case of CPE approximation is evident from formula (2) Entropy 2020, 22, 422 4 of 32 CPEs can be successfully approximated in operational frequency range using various circuits; both passive and active. So far, the most common structure is the ladder network provided in Figure 1a. Input admittance of this fractal capacitor can be expressed as This function has 8 zeroes and 7 poles. Approximation itself begins with zero, i.e., a phase frequency response of the admittance is zero at DC, then begins to increase and finally, above approximated frequency band, asymptotically reaches 90 • . A second simple passive ladder circuit dedicated for modeling two-terminal CPE with negative phase shift (fractal capacitor) is demonstrated in Figure 1b. In this case, input impedance is This function has 8 zeroes and the same number of poles. Approximation begins with zero located at zero frequency, i.e., phase shift of the admittance is 90 • at DC, then starts to decrease to the desired value. The above upper frequency limit for approximation phase shift returns to zero and module of admittance is constant, as CPE behaves similar to a resistor. Fractal inductors can be implemented following the duality principle: resistors remain but value is inverted, capacitors are substituted by inductors, series connection of elements turns into parallel and vice versa. This approach, if applied on the schematic in Figure 1a, results into circuit provided in Figure 1c. Input impedance can be written in form Z(s) = R a + s·L a + 7 k=1 s·L ak R ak s·L ak + R ak .
Another promising structure of the fractal inductor is provided by means of Figure 1d where lossy inductors are employed. Admittance function of this two-terminal device is Equality (1) indicates how CPEs can be implemented using the active two-ports: as a cascade of eight bilinear sections or four biquadratic sections. Network function F(s) will be a voltage transfer, rather than immittance function. If suitable, two-port topology is adopted positions of individual zeroes and poles can be adjusted independently.
Design process toward fully passive ladder CPEs is thoroughly described in key papers [36,37]. However, frequencies of zeroes and poles, especially pairs located at the beginning of approximation, are too low to be implementable using common resistors and capacitors directly taken from standard fabrication series (E6, E12, E24, etc.). Series combination of resistors as well as parallel connection of capacitors do not solve this problem because a huge number of passive components are still required. However, large values of the capacitors can be created by using positive impedance converters and RL realizations are also up to date because we can take advantage of many known topologies of grounded and floating synthetic loss inductor. Thus, attention is paid only on the active realizations, both voltage-mode and current-mode, where realistic values of the circuit components can be found. Of course, a list of possible active realizations is by no way complete. Nevertheless, the proposed networks contain only cheap and off-the-shelf active elements. However, large values of the capacitors can be created by using positive impedance converters and RL realizations are also up to date because we can take advantage of many known topologies of grounded and floating synthetic loss inductor. Thus, attention is paid only on the active realizations, both voltage-mode and current-mode, where realistic values of the circuit components can be found. Of course, a list of possible active realizations is by no way complete. Nevertheless, the proposed networks contain only cheap and off-the-shelf active elements.

Wideband CPE Dedicated for Lumped Chaotic Oscillators
Chaotic signals have several unique properties that predefined the utilization of chaotic oscillators in practical applications, such as long-time unpredictability of future states, absence of analytic solution in the closed form, extreme sensitivity to the changes of the initial conditions, continuous wideband frequency range, etc. Because of the latter case, CPEs applicable in the chaotic systems to model FO elements need to be wideband as well. Therefore, CPEs proposed in this section form alternative to audio CPEs are listed in paper [38], with larger phase error but wider bandwidth. Since exactly the same network structures for CPE approximation are proposed in both papers, it is

Wideband CPE Dedicated for Lumped Chaotic Oscillators
Chaotic signals have several unique properties that predefined the utilization of chaotic oscillators in practical applications, such as long-time unpredictability of future states, absence of analytic solution in the closed form, extreme sensitivity to the changes of the initial conditions, continuous wideband frequency range, etc. Because of the latter case, CPEs applicable in the chaotic systems to model FO elements need to be wideband as well. Therefore, CPEs proposed in this section form alternative to audio CPEs are listed in paper [38], with larger phase error but wider bandwidth. Since exactly the same network structures for CPE approximation are proposed in both papers, it is possible to use the printed circuit boards depicted in [38]. Therein, to obtain the nearest numerical value required, each RC combination can be implemented by series and/or parallel interconnection of three resistors and three capacitors (fabricated in commercial series such as E6 or E12).
This section brings numerical values of the circuit components for different realizations of CPEs. Individual mathematical orders are provided as the sub-sections in ascending order; beginning with phase shift 9 • (α = 1/10, behavior very close to resistor) and ending with 81 • (α = 9/10, i.e., motion close to capacitor, inductor, ideal integrator, or differentiator). The total amount of 19 non-integer orders are chosen with respect to practical applications; each one represents a significant fraction between zero and one. Tabularized numerical values provided in each sub-section represent complete knowledge about behavior of developed wideband CPE in the form of RC passive-only ladder structure. Values provided for resistors and capacitors are calculated using algorithm described in fundamental papers [34,35] and rounded conveniently. Then, location of first and last zero-pole pair is slightly adjusted to enhance approximation bandwidth as much as possible. Concrete time constant of CPEs should be composed by series-parallel interconnection of real passive components taken from commercially available fabrication series with minimal tolerances (ideally 0.1% and/or 0.5% at maximum). Numerical values of CPEs are calculated so that the fundamental property of CPE, pseudo-capacitance or pseudo-inductance, is not considered for calculations and unified. This is, in fact, a value of module measured at angular frequency 1 rad/s, i.e., frequency 159 MHz Thus, it can be verified directly in the module frequency responses of the individual CPEs. For type I RC structure, module of CPE admittance is equal to 1/R P at DC frequency. For type II RC network, admittance of CPE is defined at very high frequencies and equals 1/R S .

Numerical Verification of Wideband CPEs
This sub-section shows numeric verification of wideband CPEs in Mathcad. Obtained results are provided via Figures 2-4. Both frequency responses, i.e., module and phase, and absolute errors of first and second RC ladder structure, are calculated in frequency range starting with 1 Hz and ending at 10 MHz. As required, phase error is below 1.5 • . Within these pictures, the locations of zeroes and poles of complex admittance function are also provided, from 100 mHz up to 100 MHz. Note that phase error is always smaller than ±1.5° in the required frequency band from 3 Hz up to 1 MHz, i.e., phase frequency response is located within predefined tolerance channel. Figure 5 shows polar plots of complex admittance functions for individual RC configurations in the sense of Figure 1a. Figure 6 demonstrate the same for passive CPE approximants given in Figure 1b. Locations of zeroes and poles on frequency axis of CPE considered as admittance two-terminal device, module (red and blue) and phase (brown and green) frequency response, absolute error of first (red) and second (blue) type of RC approximation circuit: (a) α = 1/10, (b) α = 1/9, (c) α = 1/5, and (d) α = 2/9.
Note that phase error is always smaller than ±1.5 • in the required frequency band from 3 Hz up to 1 MHz, i.e., phase frequency response is located within predefined tolerance channel. Figure 5 shows

Transformations Associated with Passive CPEs
As previously mentioned, the CPEs suggested in the previous section are designed for the frequency band from 3 Hz up to 1 MHz, i.e., in nearly six decades. Additionally, impedance constant of individual approximation circuits is different, so that numerical values of resistors and capacitors are reasonable. This is good for chaotic systems if time constant is chosen properly, as demonstrated in upcoming section of this paper. However, another application may require approximation of CPEs valid in different frequency bands, for example, subsonic or ultrasound bands. In such case, frequency normalization is able to shift whole phase frequency response down or up along the frequency axis without changes of its shape (e.g., phase ripple does not become deformed). Doing so, module frequency response does not change. By introducing the impedance norm, we can shift module frequency response vertically down or up while phase frequency response remains exactly the same. This allows us to recalculate all approximation of CPEs to have a pseudo-capacitance equal to one F/s 1−α .
Horizontal movement of phase frequency response to the left (right) proportional to size Ω<1 (Ω>1) can be done by dividing all capacitors by Ω, resistors stand unchanged. Vertical movement of module frequency response down (up) proportional to value ξ can be done by dividing all capacitors by ξ while all resistors are multiplied by value ξ. In practice, both transformations are performed simultaneously. This operation can be expressed as where k is index of circuit component including those elements denoted as Cp, Rp, Cs, and Rs. Both transformations mentioned above renders CPEs designed in this paper more flexible, universal, and customizable for concrete practical application. It is also not restricted for passive ladder networks proposed here; both transformations can be directly used for any RC structure, i.e., also for audio CPEs designed in paper [38], RC tree networks, active RC topologies (only frequency norms work in general), etc. For design of FO chaotic oscillators, value Ω should be chosen carefully so that the natural harmonic component of the chaotic signal is in the middle of frequency range (in geometrical sense) where CPE approximation is valid. Roughly speaking, the entire frequency spectrum of

Transformations Associated with Passive CPEs
As previously mentioned, the CPEs suggested in the previous section are designed for the frequency band from 3 Hz up to 1 MHz, i.e., in nearly six decades. Additionally, impedance constant of individual approximation circuits is different, so that numerical values of resistors and capacitors are reasonable. This is good for chaotic systems if time constant is chosen properly, as demonstrated in upcoming section of this paper. However, another application may require approximation of CPEs valid in different frequency bands, for example, subsonic or ultrasound bands. In such case, frequency normalization is able to shift whole phase frequency response down or up along the frequency axis without changes of its shape (e.g., phase ripple does not become deformed). Doing so, module frequency response does not change. By introducing the impedance norm, we can shift module frequency response vertically down or up while phase frequency response remains exactly the same. This allows us to recalculate all approximation of CPEs to have a pseudo-capacitance equal to one F/s 1−α .
Horizontal movement of phase frequency response to the left (right) proportional to size Ω < 1 (Ω > 1) can be done by dividing all capacitors by Ω, resistors stand unchanged. Vertical movement of module frequency response down (up) proportional to value ξ can be done by dividing all capacitors by ξ while all resistors are multiplied by value ξ. In practice, both transformations are performed simultaneously. This operation can be expressed as where k is index of circuit component including those elements denoted as C p , R p , C s , and R s . Both transformations mentioned above renders CPEs designed in this paper more flexible, universal, and customizable for concrete practical application. It is also not restricted for passive ladder networks proposed here; both transformations can be directly used for any RC structure, i.e., also for audio CPEs designed in paper [38], RC tree networks, active RC topologies (only frequency norms work in general), etc. For design of FO chaotic oscillators, value Ω should be chosen carefully so that the natural harmonic component of the chaotic signal is in the middle of frequency range (in geometrical sense) where CPE approximation is valid. Roughly speaking, the entire frequency spectrum of chaotic signal should be covered by CPE approximation. This proposition holds in general: frequency band of processed signals should be covered by frequency range of CPE approximation.

Wideband CPE as Part of Chaotic System
It is well known that the dynamical behavior that is both bounded and extremely sensitive to tiny deviations of initial conditions can be generated by third-order autonomous deterministic dynamical system with at least one scalar nonlinearity. Besides initial conditions, behavior of both autonomous and driven chaotic systems is sensitive to the internal parameters as well. Small deviations can cause deformation and collapse of dense strange attractor predefined by numerical integration. Therefore, the design of FO chaotic oscillator requires very good approximation of CPE over wide frequency range. Practical experience with approximated CPEs confirms that all mathematical orders are very sensitive to numerical values of resistors and capacitors. Thus, general recommendation during construction is to make a careful selection and the measure real value of all passive component before assembly to PCB.
Quite recently, it has been proved that robust chaotic waveforms can be generated by binary memory composed by two coupled resonant tunneling diodes (RTD) [39] approximated by either piecewise linear (PWL) [40] or cubic polynomial function [41]. Both diodes possess typical N-type ampere-voltage characteristics (AVC) and three degrees of freedom required for chaos evolution are obtained due to the parasitic features of RTDs observed on the high frequencies. These can be modeled by a pair of junction capacitances and lead inductance [42]. Basic structure of static ternary memory cell is provided by means of Figure 7a. Two RTDs are connected in series together with biasing voltage responsible for proper geometrical configuration of vector field. In this operational condition either robustness of three stable states or potential stability problem is achieved. If high-frequency models of RTDs are considered, simple circuitry given in Figure 7b can be derived. Without loss of generality PWL AV curves of both RTDs can be shifted toward origin so that biasing voltage source can be removed. After small rearrangement of network components simple circuitry given in Figure 7c can be obtained. Behavior of resulting dynamical system can be described by a following set of first-order ordinary differential equations where f 1 and f 2 are scalar three-segment odd-symmetrical saturation-type PWL functions. Individual k-th PWL function can be expressed as where g k inner and g k outer is slope of k-th PWL function in inner and outer segments respectively and β k stands for breakpoint voltage. Locations of fixed points can be determined via two voltages Using these auxiliary numbers, positions of the equilibrium points (if exist) are In each segment of vector field, local behavior is uniquely determined by eigenvalues, i.e., roots of characteristic polynomial where g n is slope of n-th PWL function in the investigated segment of vector field. Several methods of how to distinguish between regular and irregular behavior of arbitrary order mathematical model have been developed and published. Some of them are based on calculation of flow quantifier such as the largest Lyapunov exponent (LLE), metric dimensions, or by using return maps. Interesting reading about this topic is provided in paper [43] and references are cited therein. Utilization of such an algorithm as an objective function for optimization leads to set of normalized values that causes memory to behave chaotically, namely c1 = 10 F, c2 = 6 F, l = 100 mH, g 1 inner = −20 S, g 1 outer = 8 S, β1 = 200 mV, g 2 inner = −15 S, g 2 outer = 18 S, and β2 = 400 mV. All state trajectories plotted in this section were numerically integrated using Mathcad 15 and build-in fourth order Runge-Kutta method having fixed step size. The type of the dynamical behavior of the memory strongly depends on the shapes of both PWL functions. For example, numerically observed attractors for different slope of outer segments associated with second RTD are demonstrated in Figure 8. The first two columns provide a 3D perspective view on state space while the third and fourth column are two Monge projections of the same situation. Note that the well-known single-scroll strange attractor is obtained for value g 2 outer = 18 S. Here, final time for numerical integration was set to 200 and time step 0.01. Further experimentations reveal that funnel and double-scroll chaotic attractor can be also robust solution of analyzed set of differential equations, namely for normalized values c2 = 4.5 F, l = 150 mH and c2 = 6 F, l = 170 mH, g 2 outer = 20 S, respectively. Remaining internal parameters of memory system are unchanged. Position of these attractors within state space is visualized by means of Figure 9. Final time was set to 10 4 , time step 0.1 and initial conditions were x0 = (0, 0, ±0.1) T for single-spirals and x0 = (0, 0, ±0.1) T for funnels. Due to vector field symmetry, two lateral strange attractors can merge, forming large attracting set that enters all state space segments. Several methods of how to distinguish between regular and irregular behavior of arbitrary order mathematical model have been developed and published. Some of them are based on calculation of flow quantifier such as the largest Lyapunov exponent (LLE), metric dimensions, or by using return maps. Interesting reading about this topic is provided in paper [43] and references are cited therein. Utilization of such an algorithm as an objective function for optimization leads to set of normalized values that causes memory to behave chaotically, namely c 1 = 10 F, c 2 = 6 F, l = 100 mH, g 1 inner = −20 S, g 1 outer = 8 S, β 1 = 200 mV, g 2 inner = −15 S, g 2 outer = 18 S, and β 2 = 400 mV. All state trajectories plotted in this section were numerically integrated using Mathcad 15 and build-in fourth order Runge-Kutta method having fixed step size. The type of the dynamical behavior of the memory strongly depends on the shapes of both PWL functions. For example, numerically observed attractors for different slope of outer segments associated with second RTD are demonstrated in Figure 8. The first two columns provide a 3D perspective view on state space while the third and fourth column are two Monge projections of the same situation. Note that the well-known single-scroll strange attractor is obtained for value g 2 outer = 18 S. Here, final time for numerical integration was set to 200 and time step 0.01. Further experimentations reveal that funnel and double-scroll chaotic attractor can be also robust solution of analyzed set of differential equations, namely for normalized values c 2 = 4.5 F, l = 150 mH and c 2 = 6 F, l = 170 mH, g 2 outer = 20 S, respectively. Remaining internal parameters of memory system are unchanged. Position of these attractors within state space is visualized by means of Figure 9. Final time was set to 10 4 , time step 0.1 and initial conditions were x 0 = (0, 0, ±0.1) T for single-spirals and x 0 = (0, 0, ±0.1) T for funnels. Due to vector field symmetry, two lateral strange attractors can merge, forming large attracting set that enters all state space segments.
A key feature of chaos is the extreme sensitivity of the system behavior to the tiny changes of initial conditions. This unique property is proved in Figure 9d, where five groups of 10 4 initial conditions were integrated with a final time of 100 and time step of 0.1 (ending state is plotted). Each group is generated in the close neighborhood of some fixed point (black dots) distinguished by colors (x e1 red, x e2 blue, x e3 green, x e4 orange, and x e5 brown) using normal distribution with mean deviation 10 −3 . Note that self-excitation process of the limit cycle and both mirrored single-spiral attractors is verified.   Let's see what kind of vector field geometry forms double-scroll attractor newly presented in this paper. This attractor occupies all affine segments of the state space, i.e., dynamics of memory is uniquely determined by eigenvalues and eigenspaces associated with all fixed points. For numerical set of parameters given above, formula (11) returns the following results: saddle-focus with unstable eigenplane in blue segments in the sense of Figure 9c, a full saddle focus repellor with spiral movement in orange areas, stable spiral combined with stable vector movement in brown regions, and finally a saddle node with stability index one within the yellow region.
As nicely demonstrated by the chaotic Chua´s oscillator [44] or memory cell [45], similar to that analyzed in this work, calculation of basins of attraction (BA) for different limit sets can lead to the interesting, unexpected results. For two values of transconductance slopes g 2 outer , namely 18 S and 20 S, graphical visualization of BA is provided by means of Figures 10 and 11 respectively. In these graphs, the blue color represents the limit cycle, yellow is the fixed-point equilibrium, and red and green marks left and right chaotic attractor. Due to computational time demands, a relatively small state space cube with size 2 × 2 × 4,5 was investigated; with step size of the initial conditions 0.01 × 0.01 × 0.5. Due to vector field symmetry caused by PWL functions, BA are also symmetrical with respect to x = 0, y = 0, and z = 0 axis. Note that, in the case of g 2 outer = 18 S, geometrical structures of individual BA seem to be quite simple. On the other hand, transconductance slope equal to g 2 outer = 20 S leads to a much more complicated snake-like regions ending into periodic solution. It should be noted that the chaotic attractors discovered in this paper are to self-excited. However, the existence of the hidden chaotic attractors is not excluded since, in the sense of initial conditions, investigated space is too small and grid large. Remember that, even in the case of the "old" and well-known Chua´s oscillator, which was analyzed more than three decades, hidden strange attractors were discovered quite recently [46].      By introducing FO derivatives to differential equations that describe voltage vs. current flowing through capacitors, we get where Y1,2 is the pseudo-capacitance of first and second FO capacitor, respectively. If the capacitor is replaced by the approximation circuit depicted in Figure 1a, current vs. voltage relation changes into By introducing FO derivatives to differential equations that describe voltage vs. current flowing through capacitors, we get where Y 1,2 is the pseudo-capacitance of first and second FO capacitor, respectively. If the capacitor is replaced by the approximation circuit depicted in Figure 1a, current vs. voltage relation changes into where v and i is external voltage and current across CPE and v k are the internal nodes of CPE practically invisible to the rest of circuit. Note that state vector associated with memory changes from basic set where the components of column vector f are f 1 (v 1 ) and f 2 (v 2 ) given by PWL function (9). Numerical values of components R pa , C pa , R pb , C pb , R ak , C ak , R bk , C bk for k = 1, 2, . . . , 7 can be adopted directly from Section 3 of this paper. The chaotic oscillator is designed so that only off-the-shelf electronic components are required. Used diodes are BAT 63 because of the low forward voltage of about 200 mV. Buffered voltage output of the integrated circuit AD844 can be utilized to trace voltages across FO capacitors. The whole network is fed by using symmetrical ±15 V voltage supply. Note that only integer-order nature of memory´s lead inductance is assumed. where the components of column vector f are f1(v1) and f2(v2) given by PWL function (9). Numerical values of components Rpa, Cpa, Rpb, Cpb, Rak, Cak, Rbk, Cbk for k = 1, 2, …, 7 can be adopted directly from Section 3 of this paper. The chaotic oscillator is designed so that only off-the-shelf electronic components are required. Used diodes are BAT 63 because of the low forward voltage of about 200 mV. Buffered voltage output of the integrated circuit AD844 can be utilized to trace voltages across FO capacitors. The whole network is fed by using symmetrical ±15 V voltage supply. Note that only integer-order nature of memory´s lead inductance is assumed.  (12) and (13) with respect to the entropic properties of the generated signals. The threshold r is the main parameter of the numerical algorithm, which measures and quantify similarity patterns in the data sequence of the increasing length (up to the self-comparison)-see tutorial paper [47] for a better understanding. In this picture, the rainbow color scale for ApEn quantity is utilized, see legend. Data for time integration of real circuit has been obtained from interval starting with 100 and ending with 200 ms. This data sequence clearly represents steady state of circuit with two CPEs. Both Figures 13 and 14 demonstrate numerical investigation of systems (12) and (13) with respect to the entropic properties of the generated signals. The threshold r is the main parameter of the numerical algorithm, which measures and quantify similarity patterns in the data sequence of the increasing length (up to the self-comparison)-see tutorial paper [47] for a better understanding. In this picture, the rainbow color scale for ApEn quantity is utilized, see legend. Data for time integration of real circuit has been obtained from interval starting with 100 and ending with 200 ms. This data sequence clearly represents steady state of circuit with two CPEs. Figure 15 provides graph of LLE as a function of slopes of both PWL functions. The minimum value of LLE is −0.09 and the maximum value is 0.153. The colored scale is as following: dark blue areas represent fixed point solution, green stands for limit cycle solutions, yellow and white denotes weak (LLE lower than 0.1) and strong (LLE greater than 0.1) chaos behavior. Since three-segment odd-symmetrical PWL functions∈ are considered for memory, this plot represents four-dimensional hypercube with edges g 1 inner ∈(−21, −19), g 1 outer ∈(7, 9), g 2 inner ∈(−16, −14), g 2 outer ∈ (17,19) and resolution 201 × 201 × 201 × 201 points. For this calculation, the fourth-order Runge-Kutta method in Matlab. Final time for integration was set to 1000 with transient behavior omitted.
For practical experiments, fundamental frequency and impedance norm was chosen to be 10 5 and 10 4 , respectively. Thus, real-valued integer-order capacitors are C 1 = 10 nF, C 2 = 6 nF and inductor is L = 10 mH. Remaining circuit components of this IO memory are R n1 = 3 k∧, R n2 = 1 k∧, R n3 = 180 ∧ and R n4 = 1.5 k∧. Computer-aided analysis of this dynamical system in the time domain is given in Figure 16. Initial conditions can be imposed into circuit by using pseudo-component IC1; it serves for the definition of the node voltage at the start of the time domain simulation. The same circuitry undergoes Orcad Pspice based simulation for two equivalent CPE having orders α = β = 9/10, see Figure 17 for brief results. While the value of the inductor was kept default, components of first and second CPE were adjusted by impedance norms 2 and 13, respectively. Of course, continuation with experiments can result into a circuit total order that is decreased even further. Such an example is given in Figure 18 where two equivalent CPEs are considered; each with math order α = β = 4/5. In this case, impedance norms were chosen to be equal to 15 and 55. Additionally, the famous double-scroll strange attractor can be generated by FO active memory. Corresponding proof can be found inside Figure 19 where both simulation and laboratory measurement are demonstrated. Here, original CPEs described in Section 3 of this paper were affected by impedance norms 3 and 16. For the above circuit calculations, parameters adjusted within simulation profile were set to the final time 50 ms, whereas maximum time step was decreased to 100 ns to obtain smooth state trajectories. It is worth nothing that these options guarantee good resolution for FFT calculation. True laboratory experiments are provided via oscilloscope screenshots located at bottom left corners of Figure 16, Figure 17, Figure 18 and within the right column in Figure 19. In the latter case, generated chaotic waveforms in time domain are also included.

Discussion
From the perspective of the reader, the orientation of this manuscript is towards three problems. Firstly, it brings thorough investigation of research and review papers focused on applications of FO circuits in analog design engineering (more precisely speaking, in area of continuous-time signal processing and generation). Considerable attention is paid on the various implementations of CPE. This section can help curious reader to find specific topic for their own research, to develop new application with promising properties, or to fix engineering problem unsolvable with IO circuits.
A wide spectrum of potential applications with wideband CPEs are proposed in Section 3 of this paper. These circuit elements can be used in the frequency filters, tunable harmonic oscillators and modeling of the complex dynamical systems derived by direct observations of nature phenomena. Series, parallel or a combination of series-parallel interconnection of resistors and capacitors are considered to reach values sufficiently close to those provided in the tables in Section 3 of this paper. These values can be transformed into locations of zeroes and poles (in the complex plane) of voltage and/or current transfer function for different kind of circuit realization of CPE. Knowledge of the mentioned positions itself can lead to cascade connection of bilinear filters, while coupling of zeroes and poles pairs result into cascade of biquadratic filtering two-ports. A systematic approach of how to use generalized band-pass and band-reject filtering section for CPE approximation is described in paper [48].
Each CPE provided in Section 3 undergoes tolerance analysis in Orcad Pspice, namely 1000 runs of Monte-Carlo (normal distribution for values of resistors and capacitors was applied) combined with standard AC sweep. As expected, passive components dedicated for the CPE design need to be very accurate. Larger fabrication tolerances such as 0.5%, 1%, or higher, are out of question for this purpose because it causes too large phase errors. Phase frequency response starts to be significantly rippled, nearby peaks and valleys of a phase pantile can sum-up leading to the maximal phase deviation significantly raised. Unfortunately, a higher phase difference between theoretical and obtained value occurs not locally, but globally, i.e., over an entire approximated frequency range. Practical experience resulting from survey of existing application-oriented research papers suggests that maximal phase error greater than 3° renders constructed CPE unserviceable. Moreover, individual orders become undistinguishable. Of course, usability of designed CPE always depends

Discussion
From the perspective of the reader, the orientation of this manuscript is towards three problems. Firstly, it brings thorough investigation of research and review papers focused on applications of FO circuits in analog design engineering (more precisely speaking, in area of continuous-time signal processing and generation). Considerable attention is paid on the various implementations of CPE. This section can help curious reader to find specific topic for their own research, to develop new application with promising properties, or to fix engineering problem unsolvable with IO circuits.
A wide spectrum of potential applications with wideband CPEs are proposed in Section 3 of this paper. These circuit elements can be used in the frequency filters, tunable harmonic oscillators and modeling of the complex dynamical systems derived by direct observations of nature phenomena. Series, parallel or a combination of series-parallel interconnection of resistors and capacitors are considered to reach values sufficiently close to those provided in the tables in Section 3 of this paper. These values can be transformed into locations of zeroes and poles (in the complex plane) of voltage and/or current transfer function for different kind of circuit realization of CPE. Knowledge of the mentioned positions itself can lead to cascade connection of bilinear filters, while coupling of zeroes and poles pairs result into cascade of biquadratic filtering two-ports. A systematic approach of how to use generalized band-pass and band-reject filtering section for CPE approximation is described in paper [48].
Each CPE provided in Section 3 undergoes tolerance analysis in Orcad Pspice, namely 1000 runs of Monte-Carlo (normal distribution for values of resistors and capacitors was applied) combined with standard AC sweep. As expected, passive components dedicated for the CPE design need to be very accurate. Larger fabrication tolerances such as 0.5%, 1%, or higher, are out of question for this purpose because it causes too large phase errors. Phase frequency response starts to be significantly rippled, nearby peaks and valleys of a phase pantile can sum-up leading to the maximal phase deviation significantly raised. Unfortunately, a higher phase difference between theoretical and obtained value occurs not locally, but globally, i.e., over an entire approximated frequency range. Practical experience resulting from survey of existing application-oriented research papers suggests that maximal phase error greater than 3 • renders constructed CPE unserviceable. Moreover, individual orders become undistinguishable. Of course, usability of designed CPE always depends on concrete application. Even 1.5 • maximal phase error can be too large for high-performance demanding applications.

Conclusions
This paper brings a rich gallery of high-precision CPEs dedicated for wideband signal processing. Readers can pick and use proposed CPEs directly, without the need of additional calculations. Individual designed CPEs have reasonable values of circuit components that can be found commonly in stocks of markets. Individual outputs resulting from this paper attract a wide spectrum of enthusiasts, electronic engineers, and design specialist to construct linear and nonlinear systems described by FO dynamics. Moreover, using designed CPEs, existing structures of FO filters, harmonic oscillators and arbitrary waveform generators (especially tunable in wide range), phase correctors, PID controllers, regulators, models of dynamical systems, etc. can be simulated again, and associated results can be polished.
From a nonlinear dynamics point of view, this paper demonstrates that FO analog memory can be chaotic, even if real CPEs are included both into mathematical model and real fabricated circuit. This is a new and so far unpublished reality, proved by means of numerical calculations, computer-aided analysis of memory circuit, as well as experimental outputs.