Abstract: We propose the data mining-informed cognitive radio, which uses non-traditional data sources and data-mining techniques for decision making and improving the performance of a wireless network. To date, the application of information other than wireless channel data in cognitive radios has not been significantly studied. We use a novel dataset (Twitter traffic) as an indicator of network load in a wireless channel. Using this dataset, we present and test a series of predictive algorithms that show an improvement in wireless channel utilization over traditional collision-detection algorithms. Our results demonstrate the viability of using these novel datasets to inform and create more efficient cognitive radio networks.
Abstract: The authors present a large area collision detection sensor utilizing the piezoelectric effect of polyvinylidene fluoride film. The proposed sensor system provides high dynamic range for touch sensation, as well as robust adaptability to achieve collision detection on complex-shaped surfaces. The design allows for cohabitation of humans and robots in cooperative environments that require advanced and robust collision detection systems. Data presented in the paper are from sensors successfully retrofitted onto an existing commercial robotic manipulator.
Abstract: Electronic textiles have potential for many practical uses in clinical rehabilitation. This scoping review appraises recent and emerging developments of textile-based sensors with applications to rehabilitation. Contributions published from 2009 to 2013 are appraised with a specific focus on the measured physiological or biomechanical phenomenon, current measurement practices, textile innovations, and their merits and limitations. While fabric-based signal quality and sensor integration have advanced considerably, overall system integration (including circuitry and power) has not been fully realized. Validation against clinical gold standards is inconsistent at best, and feasibility with clinical populations remains to be demonstrated. The overwhelming focus of research and development has been on remote sensing but the opportunity for textile-mediated feedback to the wearer remains unexplored. Recommendations for future research are provided.
Abstract: With CMOS technology aggressively scaling towards the 22-nm node, modern FPGA devices face tremendous aging-induced reliability challenges due to bias temperature instability (BTI) and hot carrier injection (HCI). This paper presents a novel anti-aging technique at the logic level that is both scalable and applicable for VLSI digital circuits implemented with FPGA devices. The key idea is to prolong the lifetime of FPGA-mapped designs by strategically elevating the VDD values of some LUTs based on their modular criticality values. Although the idea of scaling VDD in order to improve either energy efficiency or circuit reliability has been explored extensively, our study distinguishes itself by approaching this challenge through an analytical procedure, therefore being able to maximize the overall reliability of the target FPGA design by rigorously modeling the BTI-induced device reliability and optimally solving the VDD assignment problem. Specifically, we first develop a systematic framework to analytically model the reliability of an FPGA LUT (look-up table), which consists of both RAM memory bits and associated switching circuit. We also, for the first time, establish the relationship between signal transition density and a LUT’s reliability in an analytical way. This key observation further motivates us to define the modular criticality as the product of signal transition density and the logic observability of each LUT. Finally, we analytically prove, for the first time, that the optimal way to improve the overall reliability of a whole FPGA device is to fortify individual LUTs according to their modular criticality. To the best of our knowledge, this work is the first to draw such a conclusion.
Abstract: This article presents a method that provides an estimate of road bank by decoupling the vehicle roll due to the dynamics and the roll due to the road bank. Suspension deflection measurements were used to provide a measurement of the relative roll between the vehicle body frame and the axle frame or between the sprung mass and the unsprung mass, respectively. A deflection scaling parameter was found via suspension geometry and dynamic analysis. The relative roll measurement was then incorporated into two different kinematic navigation models based on extended Kalman filter (EKF) architectures. Each algorithm was tested and then verified on the Prowler ATV experimental platform at the National Center for Asphalt Technology (NCAT). Experimental data showed that both the cascaded and coupled approach performed well in providing estimates of the current vehicle roll and instantaneous road bank.
Abstract: This paper describes advancement in color edge detection, using a dedicated Geometric Algebra (GA) co-processor implemented on an Application Specific Integrated Circuit (ASIC). GA provides a rich set of geometric operations, giving the advantage that many signal and image processing operations become straightforward and the algorithms intuitive to design. The use of GA allows images to be represented with the three R, G, B color channels defined as a single entity, rather than separate quantities. A novel custom ASIC is proposed and fabricated that directly targets GA operations and results in significant performance improvement for color edge detection. Use of the hardware described in this paper also shows that the convolution operation with the rotor masks within GA belongs to a class of linear vector filters and can be applied to image or speech signals. The contribution of the proposed approach has been demonstrated by implementing three different types of edge detection schemes on the proposed hardware. The overall performance gains using the proposed GA Co-Processor over existing software approaches are more than 3.2× faster than GAIGEN and more than 2800× faster than GABLE. The performance of the fabricated GA co-processor is approximately an order of magnitude faster than previously published results for hardware implementations.