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Proceedings 2017, 1(4), 557; doi:10.3390/proceedings1040557

Analysis of pn Junction Deep Trench Isolation with SU-8/SiO2-Liner Passivation in a Linear Butt-Coupled 3D CMOS Si Photodetector Array

Electrical Engineering and Information Technology, Institute of Micro and Sensor Systems (IMOS), Otto-von-Guericke University of Magdeburg, Magdeburg, Germany
Presented at the Eurosensors 2017 Conference, Paris, France, 3–6 September 2017.
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Published: 7 June 2017
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Abstract

The realization of 30 µm-deep trench isolation in a linear array of butt-coupled 3D CMOS silicon photodetectors is investigated by implementing the formation of a shallow n+-p junction and SiO2-liner over the trench sidewalls as well as the SU-8 filling trenches for passivation. The dependency of the dark I-V curve on the trench isolation scheme is analyzed by monitoring the dynamic dark I-V measurements of four samples including the schemes of single-trench isolation with different widths and the scheme of double-trench isolation. The highest and the lowest dark currents are measured in the detectors with the widest single-trench isolation and the double-trench isolation, respectively.
Keywords: 3D CMOS; photodetector array; 3D pn junction trench; deep trench isolation; single-trench isolation; double-trench isolation; SU-8; passivation; MEMS; dark current 3D CMOS; photodetector array; 3D pn junction trench; deep trench isolation; single-trench isolation; double-trench isolation; SU-8; passivation; MEMS; dark current
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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MDPI and ACS Style

Alirezaei, I.S.; Vierhaus, J.; Burte, E.P. Analysis of pn Junction Deep Trench Isolation with SU-8/SiO2-Liner Passivation in a Linear Butt-Coupled 3D CMOS Si Photodetector Array. Proceedings 2017, 1, 557.

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