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Electronics 2017, 6(2), 48; doi:10.3390/electronics6020048

Security Interrogation and Defense for SAR Analog to Digital Converter

Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA
Author to whom correspondence should be addressed.
Academic Editor: Mostafa Bassiouni
Received: 4 April 2017 / Revised: 2 June 2017 / Accepted: 12 June 2017 / Published: 17 June 2017
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Nowadays, the analog and mixed-signal intellectual property (IP) cores play an important role in system on chip (SoC) design due to their capabilities in performing critical functions. These IPs can be the target of adversaries similar to their digital counterparts. In this work, we study the security aspects of a tunnel field effect transistor (TFET)-based six-bit successive approximation register (SAR) analog to digital converter (ADC) through proposing two threats and two countermeasures that target the output signals of the ADC datapath and its control unit. The datapath-based threat manipulates the exiting signals from the register file, and its countermeasure attempts to filter the ADC output based on the convention of having ± 1 least significant bit variation (at maximum) between the adjacent sampled data points. The control-based threat manipulates the exiting signals from the control unit, and its countermeasure is a trustworthy replication of a part of the ADC circuit that is used to provide reference data for security examination and output filtering. View Full-Text
Keywords: analog to digital converter; defense circuit; hardware trojan; low power design. analog to digital converter; defense circuit; hardware trojan; low power design.

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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Taheri, S.; Lin, J.; Yuan, J.-S. Security Interrogation and Defense for SAR Analog to Digital Converter. Electronics 2017, 6, 48.

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