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Electronics, Volume 5, Issue 2 (June 2016) – 18 articles

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867 KiB  
Article
InAlGaN/GaN HEMTs at Cryogenic Temperatures
by Ezgi Dogmus, Riad Kabouche, Sylvie Lepilliet, Astrid Linge, Malek Zegaoui, Hichem Ben-Ammar, Marie-Pierre Chauvat, Pierre Ruterana, Piero Gamarra, Cédric Lacam, Maurice Tordjman and Farid Medjdoub
Electronics 2016, 5(2), 31; https://doi.org/10.3390/electronics5020031 - 22 Jun 2016
Cited by 18 | Viewed by 7319
Abstract
We report on the electron transport properties of two-dimensional electron gas confined in a quaternary barrier InAlGaN/AlN/GaN heterostructure down to cryogenic temperatures for the first time. A state-of-the-art electron mobility of 7340 cm2·V−1·s−1 combined with a sheet carrier [...] Read more.
We report on the electron transport properties of two-dimensional electron gas confined in a quaternary barrier InAlGaN/AlN/GaN heterostructure down to cryogenic temperatures for the first time. A state-of-the-art electron mobility of 7340 cm2·V−1·s−1 combined with a sheet carrier density of 1.93 × 1013 cm−2 leading to a remarkably low sheet resistance of 44 Ω/□ are measured at 4 K. A strong improvement of Direct current (DC) and Radio frequency (RF) characteristics is observed at low temperatures. The excellent current and power gain cutoff frequencies (fT/fmax) of 65/180 GHz and 95/265 GHz at room temperature and 77 K, respectively, using a 0.12 μm technology confirmed the outstanding 2DEG properties. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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161 KiB  
Editorial
Two-Dimensional Electronics — Prospects and Challenges
by Frank Schwierz
Electronics 2016, 5(2), 30; https://doi.org/10.3390/electronics5020030 - 07 Jun 2016
Cited by 2 | Viewed by 5231
Abstract
For about a decade, 2D (two-dimensional) materials have represented one of the hottest directions in solid-state research.[...] Full article
(This article belongs to the Special Issue Two-Dimensional Electronics - Prospects and Challenges)
1245 KiB  
Article
Understanding the Performance of Low Power Raspberry Pi Cloud for Big Data
by Wajdi Hajji and Fung Po Tso
Electronics 2016, 5(2), 29; https://doi.org/10.3390/electronics5020029 - 06 Jun 2016
Cited by 42 | Viewed by 9031
Abstract
Nowadays, Internet-of-Things (IoT) devices generate data at high speed and large volume. Often the data require real-time processing to support high system responsiveness which can be supported by localised Cloud and/or Fog computing paradigms. However, there are considerably large deployments of IoT such [...] Read more.
Nowadays, Internet-of-Things (IoT) devices generate data at high speed and large volume. Often the data require real-time processing to support high system responsiveness which can be supported by localised Cloud and/or Fog computing paradigms. However, there are considerably large deployments of IoT such as sensor networks in remote areas where Internet connectivity is sparse, challenging the localised Cloud and/or Fog computing paradigms. With the advent of the Raspberry Pi, a credit card-sized single board computer, there is a great opportunity to construct low-cost, low-power portable cloud to support real-time data processing next to IoT deployments. In this paper, we extend our previous work on constructing Raspberry Pi Cloud to study its feasibility for real-time big data analytics under realistic application-level workload in both native and virtualised environments. We have extensively tested the performance of a single node Raspberry Pi 2 Model B with httperf and a cluster of 12 nodes with Apache Spark and HDFS (Hadoop Distributed File System). Our results have demonstrated that our portable cloud is useful for supporting real-time big data analytics. On the other hand, our results have also unveiled that overhead for CPU-bound workload in virtualised environment is surprisingly high, at 67.2%. We have found that, for big data applications, the virtualisation overhead is fractional for small jobs but becomes more significant for large jobs, up to 28.6%. Full article
(This article belongs to the Special Issue Raspberry Pi Technology)
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1672 KiB  
Article
An Investigation of Carbon-Doping-Induced Current Collapse in GaN-on-Si High Electron Mobility Transistors
by An-Jye Tzou, Dan-Hua Hsieh, Szu-Hung Chen, Yu-Kuang Liao, Zhen-Yu Li, Chun-Yen Chang and Hao-Chung Kuo
Electronics 2016, 5(2), 28; https://doi.org/10.3390/electronics5020028 - 02 Jun 2016
Cited by 22 | Viewed by 8909
Abstract
This paper reports the successful fabrication of a GaN-on-Si high electron mobility transistor (HEMT) with a 1702 V breakdown voltage (BV) and low current collapse. The strain and threading dislocation density were well-controlled by 100 pairs of AlN/GaN superlattice buffer layers. Relative to [...] Read more.
This paper reports the successful fabrication of a GaN-on-Si high electron mobility transistor (HEMT) with a 1702 V breakdown voltage (BV) and low current collapse. The strain and threading dislocation density were well-controlled by 100 pairs of AlN/GaN superlattice buffer layers. Relative to the carbon-doped GaN spacer layer, we grew the AlGaN back barrier layer at a high temperature, resulting in a low carbon-doping concentration. The high-bandgap AlGaN provided an effective barrier for blocking leakage from the channel to substrate, leading to a BV comparable to the ordinary carbon-doped GaN HEMTs. In addition, the AlGaN back barrier showed a low dispersion of transiently pulsed ID under substrate bias, implying that the buffer traps were effectively suppressed. Therefore, we obtained a low-dynamic on-resistance with this AlGaN back barrier. These two approaches of high BV with low current collapse improved the device performance, yielding a device that is reliable in power device applications. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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34316 KiB  
Article
An FPGA Scalable Software Defined Radio Platform Design for Educational and Research Purposes
by Marcos Hervás, Rosa Ma Alsina-Pagès and Martí Salvador
Electronics 2016, 5(2), 27; https://doi.org/10.3390/electronics5020027 - 01 Jun 2016
Cited by 4 | Viewed by 10451
Abstract
In a digital modem design, the integration of the Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC) with the core processor is usually a major issue for the designer. In this paper an FPGA scalable Software Defined Radio platform based [...] Read more.
In a digital modem design, the integration of the Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC) with the core processor is usually a major issue for the designer. In this paper an FPGA scalable Software Defined Radio platform based on a Spartan-6 as a control unit is presented, developed for both educational and research purposes, which can fit the different application requirements in terms of analog front-end performance, processing unit and cost. The resolution and sampling frequency of the analog front-end are its main adjustable parameters. The processing core requirements involve the FPGA and the communication ports. A multidisciplinary working group was required to design a high performance system for both analog front-end and digital processing core in terms of signal integrity and electromagnetic compatibility. The platform has 5 different peripheral ports ranging from 16 kbps to 2.5 Gbps. The communication ports allow our students to develop a high range of applications for both on-site and online courses applying teaching methodology based on learning by doing using a real system to help them to reach other transversal skills. Full article
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1874 KiB  
Article
Photovoltaic Energy Harvesting Wireless Sensor Node for Telemetry Applications Optimized for Low Illumination Levels
by Ljubomir Vračar, Aneta Prijić, Damir Nešić, Saša Dević and Zoran Prijić
Electronics 2016, 5(2), 26; https://doi.org/10.3390/electronics5020026 - 01 Jun 2016
Cited by 20 | Viewed by 5577
Abstract
This paper reports the design of a photovoltaic energy harvesting device used as a telemetry node in wireless sensor networks. The device draws power from the small solar cell, stores it into the primary energy buffer and backup supercapacitor, collects measured data from [...] Read more.
This paper reports the design of a photovoltaic energy harvesting device used as a telemetry node in wireless sensor networks. The device draws power from the small solar cell, stores it into the primary energy buffer and backup supercapacitor, collects measured data from various sensors and transmits them over low power radio link at 868 MHz. Its design ensures reliable cold booting under very poor illumination conditions (down to 20 lx). The solar cell also enables indirect illumination level detection for the subcircuit that manages stored energy (day/night detector). The device is allowed to draw power from the backup supercapacitor only when it is not possible to gather enough energy from the solar cell during the sleep period. Short lasting and sudden drops of the illumination do not activate the backup power supply. A wireless sensor node design is adjusted to the proposed photovoltaic harvesting circuitry, so the overall power consumption in the sleep mode is less than 25 μW. Also, due to adaptive power consumption, proposed device topology ensures its autonomy time in the total darkness of 81 h. The device has been produced using commercially available components enabling versatile telemetric functionality by the implementation of different sensors. Full article
(This article belongs to the Special Issue Energy Scavenging for Embedded Electronic Systems)
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1059 KiB  
Article
GaN Monolithic Power Amplifiers for Microwave Backhaul Applications
by Roberto Quaglia, Vittorio Camarchia, Marco Pirola and Giovanni Ghione
Electronics 2016, 5(2), 25; https://doi.org/10.3390/electronics5020025 - 01 Jun 2016
Cited by 7 | Viewed by 5762
Abstract
Gallium nitride integrated technology is very promising not only for wireless applications at mobile frequencies (below 6 GHz) but also for network backhaul radiolink deployment, now under deep revision for the incoming 5G generation of mobile communications. This contribution presents three linear power [...] Read more.
Gallium nitride integrated technology is very promising not only for wireless applications at mobile frequencies (below 6 GHz) but also for network backhaul radiolink deployment, now under deep revision for the incoming 5G generation of mobile communications. This contribution presents three linear power amplifiers realized on 0.25 μ m Gallium Nitride on Silicon Carbide monolithic integrated circuits for microwave backhaul applications: two combined power amplifiers working in the backhaul band around 7 GHz, and a more challenging third one working in the higher 15 GHz band. Architectures and main design steps are described, highlighting the pros and cons of Gallium Nitride with respect to the reference technology which, for these applications, is represented by gallium arsenide. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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2970 KiB  
Article
Domain Specific and Model Based Systems Engineering in the Smart Grid as Prerequesite for Security by Design
by Christian Neureiter, Dominik Engel and Mathias Uslar
Electronics 2016, 5(2), 24; https://doi.org/10.3390/electronics5020024 - 28 May 2016
Cited by 22 | Viewed by 12788
Abstract
The development of Smart Grid systems has proven to be a challenging task. Besides the inherent technical complexity, the involvement of different stakeholders from different disciplines is a major challenge. In order to maintain the strict security requirements, holistic systems engineering concepts and [...] Read more.
The development of Smart Grid systems has proven to be a challenging task. Besides the inherent technical complexity, the involvement of different stakeholders from different disciplines is a major challenge. In order to maintain the strict security requirements, holistic systems engineering concepts and reference architectures are required that enable the integration, maintenance and evaluation of Smart Grid security. In this paper, a conceptual approach is presented on how to enable the integration of security by design in the development of Smart Grid Systems. A major cornerstone of this approach is the development of a domain-specific and standards-based modelling language on basis of the M/490 Smart Grid Architecture Model (SGAM). Furthermore, this modelling approach is utilized to develop a reference architecture model on basis of the National Institute of Standards and Technology (NIST) Logical Reference Model (LRM) with its integrated security concepts. The availability of a standards-based reference architecture model enables the instantiation of particular solutions with a profound basis for security. Moreover, it is demonstrated how such architecture models can be utilized to gain insights into potential security implications and furthermore can serve as a basis for implementation. Full article
(This article belongs to the Special Issue Smart Grid Cyber Security)
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1046 KiB  
Article
Frequency Dependence of Electrical Parameters of an Organic-Inorganic Hybrid Composite Based Humidity Sensor
by Rizwan Akram
Electronics 2016, 5(2), 23; https://doi.org/10.3390/electronics5020023 - 23 May 2016
Cited by 5 | Viewed by 3893
Abstract
The present study highlights the interdependence of ambient humidity levels on the electrical parameters of organic-inorganic hybrid composite based humidity sensor at varied AC frequencies of input signal. Starting from the bottom, the layer stack of the fabricated humidity sensor was 200-nm silver [...] Read more.
The present study highlights the interdependence of ambient humidity levels on the electrical parameters of organic-inorganic hybrid composite based humidity sensor at varied AC frequencies of input signal. Starting from the bottom, the layer stack of the fabricated humidity sensor was 200-nm silver (Ag) thin film and 4 μm spun-coated PEPC+NiPC+Cu2O active layer. Silver thin films were deposited by thermal evaporator on well cleaned microscopic glass slides, which served as a substrate. Conventional optical lithography procedure was adapted to define pairs of silver-silver surface electrodes with two sorts of configurations, i.e., interdigitated and rectangular. Humidity-sensitive layers of organic-inorganic composite were then spun-cast upon the channel between the silver electrodes. The changes in relative humidity levels induced variation in capacitance and impedance of the sensors. These variations in electrical parameters of sensors were also found to be highly dependent upon frequency of input AC signal. Our findings reveal that the organic-inorganic composite shows higher humidity sensitivity at smaller orders of frequency. This finding is in accordance with the established fact that organic semiconductors-based devices are not applicable for high frequency applications due to their lower charge carrier mobility values. Two distinct geometries of semiconducting medium between the silver electrodes were investigated to optimize the sensing parameters of the humidity sensor. Furthermore, the effect of temperature change on the resistance of organic composite has also been studied. Full article
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872 KiB  
Article
Parallel Simulation of Loosely Timed SystemC/TLM Programs: Challenges Raised by an Industrial Case Study
by Denis Becker, Matthieu Moy and Jérôme Cornet
Electronics 2016, 5(2), 22; https://doi.org/10.3390/electronics5020022 - 17 May 2016
Cited by 3 | Viewed by 5214
Abstract
Transaction level models of systems-on-chip in SystemC are commonly used in the industry to provide an early simulation environment. The SystemC standard imposes coroutine semantics for the scheduling of simulated processes, to ensure determinism and reproducibility of simulations. However, because of this, sequential [...] Read more.
Transaction level models of systems-on-chip in SystemC are commonly used in the industry to provide an early simulation environment. The SystemC standard imposes coroutine semantics for the scheduling of simulated processes, to ensure determinism and reproducibility of simulations. However, because of this, sequential implementations have, for a long time, been the only option available, and still now the reference implementation is sequential. With the increasing size and complexity of models, and the multiplication of computation cores on recent machines, the parallelization of SystemC simulations is a major research concern. There have been several proposals for SystemC parallelization, but most of them are limited to cycle-accurate models. In this paper we focus on loosely timed models, which are commonly used in the industry. We present an industrial context and show that, unfortunately, most of the existing approaches for SystemC parallelization can fundamentally not apply in this context. We support this claim with a set of measurements performed on a platform used in production at STMicroelectronics. This paper surveys existing techniques, presents a visualization and profiling tool and identifies unsolved challenges in the parallelization of SystemC models at transaction level. Full article
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6899 KiB  
Article
A Software Framework for Rapid Application-Specific Hybrid Photonic Network-on-Chip Synthesis
by Shirish Bahirat and Sudeep Pasricha
Electronics 2016, 5(2), 21; https://doi.org/10.3390/electronics5020021 - 14 May 2016
Cited by 5 | Viewed by 4757
Abstract
Network on Chip (NoC) architectures have emerged in recent years as scalable communication fabrics to enable high bandwidth data transfers in chip multiprocessors (CMPs). These interconnection architectures still need to conquer many challenges, e.g., significant power consumption and high data transfer latencies. Hybrid [...] Read more.
Network on Chip (NoC) architectures have emerged in recent years as scalable communication fabrics to enable high bandwidth data transfers in chip multiprocessors (CMPs). These interconnection architectures still need to conquer many challenges, e.g., significant power consumption and high data transfer latencies. Hybrid electro-photonic NoCs have been recently proposed as a solution to mitigate some of these challenges. However, with increasing application complexity, hardware dependencies, and performance variability, optimization of hybrid photonic NoCs requires traversing a massive design space. To date, prior work on software tools for rapid automated NoC synthesis have mainly focused on electrical NoCs. In this article, we propose a novel suite of software tools for effectively synthesizing hybrid photonic NoCs. We formulate and solve the synthesis problem using four search-based optimization heuristics: (1) Ant Colony Optimization (ACO); (2) Particle Swarm Optimization (PSO); (3) Genetic Algorithm (GA); and (4) Simulated Annealing (SA). Our experimental results show significant promise for the ACO and PSO based heuristics. Our novel implementation of PSO achieves an average of 64% energy-delay product improvements over GA and 53% improvement over SA; while our novel ACO implementation achieves 107% energy-delay product improvements over GA and 62% improvement over SA. Full article
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1808 KiB  
Article
Trapping Analysis of AlGaN/GaN Schottky Diodes via Current Transient Spectroscopy
by Martin Florovič, Jaroslava Škriniarová, Jaroslav Kováč and Peter Kordoš
Electronics 2016, 5(2), 20; https://doi.org/10.3390/electronics5020020 - 10 May 2016
Cited by 4 | Viewed by 5284
Abstract
Trapping effects on two AlGaN/GaN Schottky diodes with a different composition of the AlGaN barrier layer were analyzed by current transient spectroscopy. The current transients were measured at a constant bias and at six different temperatures between 25 and 150 °C. Obtained data [...] Read more.
Trapping effects on two AlGaN/GaN Schottky diodes with a different composition of the AlGaN barrier layer were analyzed by current transient spectroscopy. The current transients were measured at a constant bias and at six different temperatures between 25 and 150 °C. Obtained data were fitted by only three superimposed exponentials, and good agreement between the experimental and fitted data was achieved. The activation energy of dominant traps in the investigated structures was found to be within 0.77–0.83 eV. This nearly identical activation energy was obtained from current transients measured at a reverse bias of −6 V as well as at a forward bias of+1 V. It indicates that the dominant traps might be attributed to defects mainly associated with dislocations connected predominantly with the GaN buffer near the AlGaN/GaN interface. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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4356 KiB  
Article
Universal Safety Distance Alert Device for Road Vehicles
by Matic Virant and Miha Ambrož
Electronics 2016, 5(2), 19; https://doi.org/10.3390/electronics5020019 - 29 Apr 2016
Cited by 10 | Viewed by 7243
Abstract
Driving with too short of a safety distance is a common problem in road traffic, often with traffic accidents as a consequence. Research has identified a lack of vehicle-mountable devices for alerting the drivers of trailing vehicles about keeping a sufficient safe distance. [...] Read more.
Driving with too short of a safety distance is a common problem in road traffic, often with traffic accidents as a consequence. Research has identified a lack of vehicle-mountable devices for alerting the drivers of trailing vehicles about keeping a sufficient safe distance. The principal requirements for such a device were defined. A conceptual study was performed in order to select the components for the integration of the device. Based on the results of this study, a working prototype of a flexible, self-contained device was designed, built and tested. The device is intended to be mounted on the rear of a vehicle. It uses radar as the primary distance sensor, assisted with a GPS receiver for velocity measurement. A Raspberry Pi single-board computer is used for data acquisition and processing. The alerts are shown on an LED-matrix display mounted on the rear of the host vehicle. The device software is written in Python and provides automatic operation without requiring any user intervention. The tests have shown that the device is usable on almost any motor vehicle and performs reliably in simulated and real traffic. The open issues and possibilities for future improvements are presented in the Discussion. Full article
(This article belongs to the Special Issue Raspberry Pi Technology)
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3364 KiB  
Review
A Comparative Reliability Study of Three Fundamental Multilevel Inverters Using Two Different Approaches
by Omid Alavi, Abbas Hooshmand Viki and Sadegh Shamlou
Electronics 2016, 5(2), 18; https://doi.org/10.3390/electronics5020018 - 15 Apr 2016
Cited by 36 | Viewed by 6852
Abstract
The reliability of power electronic devices and components is very important to manufacturers. In recent years, many researchers have conducted reliability assessments of power electronic devices, yet the reliability of numerous circuits used widely has not been evaluated. This paper presents a comprehensive [...] Read more.
The reliability of power electronic devices and components is very important to manufacturers. In recent years, many researchers have conducted reliability assessments of power electronic devices, yet the reliability of numerous circuits used widely has not been evaluated. This paper presents a comprehensive reliability evaluation of fundamental multilevel inverters. The reliability of the multilevel inverters is analyzed by calculating the mean time to failure for each component. The calculation was performed by two methods (approximate and exact) to achieve better comparisons. The approximate method is similar to the parts count method used in MIL-HDBK-217 reliability standard, and the exact method exhibits the parts stress method. In the exact method, due to the direct relationship between component failure and temperature, we used Matlab Simulink to determine power losses in diodes and switches taking into account the temperature factor. The results determined by the approximate method showed that the three-level cascade H-bridge was the most reliable of the inverters considered. Although the exact method validates those results, and shows that cascade H-bridge (CHB) had a longer lifespan, but the calculated values are different. Therefore, using different approaches for evaluating reliability results in different outcomes. Full article
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744 KiB  
Article
Optimized Linear, Quadratic and Cubic Interpolators for Elementary Function Hardware Implementations
by Masoud Sadeghian, James E. Stine and E. George Walters
Electronics 2016, 5(2), 17; https://doi.org/10.3390/electronics5020017 - 08 Apr 2016
Cited by 12 | Viewed by 4737
Abstract
This paper presents a method for designing linear, quadratic and cubic interpolators that compute elementary functions using truncated multipliers, squarers and cubers. Initial coefficient values are obtained using a Chebyshev series approximation. A direct search algorithm is then used to optimize the quantized [...] Read more.
This paper presents a method for designing linear, quadratic and cubic interpolators that compute elementary functions using truncated multipliers, squarers and cubers. Initial coefficient values are obtained using a Chebyshev series approximation. A direct search algorithm is then used to optimize the quantized coefficient values to meet a user-specified error constraint. The algorithm minimizes coefficient lengths to reduce lookup table requirements, maximizes the number of truncated columns to reduce the area, delay and power of the arithmetic units, and minimizes the maximum absolute error of the interpolator output. The method can be used to design interpolators to approximate any function to a user-specified accuracy, up to and beyond 53-bits of precision (e.g., IEEE double precision significand). Linear, quadratic and cubic interpolator designs that approximate reciprocal, square root, reciprocal square root and sine are presented and analyzed. Area, delay and power estimates are given for 16, 24 and 32-bit interpolators that compute the reciprocal function, targeting a 65 nm CMOS technology from IBM. Results indicate the proposed method uses smaller arithmetic units and has reduced lookup table sizes compared to previously proposed methods. The method can be used to optimize coefficients in other systems while accounting for coefficient quantization as well as truncation and rounding effects of multiple arithmetic units. Full article
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1428 KiB  
Article
Robot Motion Planning Using Adaptive Hybrid Sampling in Probabilistic Roadmaps
by Ashwin Kannan, Prashant Gupta, Rishabh Tiwari, Shubham Prasad, Apurv Khatri and Rahul Kala
Electronics 2016, 5(2), 16; https://doi.org/10.3390/electronics5020016 - 06 Apr 2016
Cited by 11 | Viewed by 4959
Abstract
Motion planning deals with finding a collision-free trajectory for a robot from the current position to the desired goal. For a high-dimensional space, sampling-based algorithms are widely used. Different sampling algorithms are used in different environments depending on the nature of the scenario [...] Read more.
Motion planning deals with finding a collision-free trajectory for a robot from the current position to the desired goal. For a high-dimensional space, sampling-based algorithms are widely used. Different sampling algorithms are used in different environments depending on the nature of the scenario and requirements of the problem. Here, we deal with the problems involving narrow corridors, i.e., in order to reach its destination the robot needs to pass through a region with a small free space. Common samplers used in the Probabilistic Roadmap are the uniform-based sampler, the obstacle-based sampler, maximum clearance-based sampler, and the Gaussian-based sampler. The individual samplers have their own advantages and disadvantages; therefore, in this paper, we propose to create a hybrid sampler that uses a combination of sampling techniques for motion planning. First, the contribution of each sampling technique is deterministically varied to create time efficient roadmaps. However, this approach has a limitation: The sampling strategy cannot adapt as per the changing configuration spaces. To overcome this limitation, the sampling strategy is extended by making the contribution of each sampler adaptive, i.e., the sampling ratios are determined on the basis of the nature of the environment. In this paper, we show that the resultant sampling strategy is better than commonly used sampling strategies in the Probabilistic Roadmap approach. Full article
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2085 KiB  
Article
High-k Dielectric Passivation for GaN Diode with a Field Plate Termination
by Michitaka Yoshino, Fumimasa Horikiri, Hiroshi Ohta, Yasuhiro Yamamoto, Tomoyoshi Mishima and Tohru Nakamura
Electronics 2016, 5(2), 15; https://doi.org/10.3390/electronics5020015 - 31 Mar 2016
Cited by 17 | Viewed by 5910
Abstract
Vertical structured Gallium nitride (GaN) p-n junction diodes with improved breakdown properties have been demonstrated using high-k dielectric passivation underneath the field plate. Simulation results at a reverse voltage of 1 kV showed that the maximum electric field near the mesa-etched p-n junction [...] Read more.
Vertical structured Gallium nitride (GaN) p-n junction diodes with improved breakdown properties have been demonstrated using high-k dielectric passivation underneath the field plate. Simulation results at a reverse voltage of 1 kV showed that the maximum electric field near the mesa-etched p-n junction edges covered with film of dielectric constant k = 10 was reduced to 2.0 MV/cm from 3.0 MV/cm (SiO2 (k = 3.9)). The diodes were fabricated using the high-k mixed oxide of SiO2 and CeO2 with k = 12.3. I–V characteristics of the diode with a field plate showed a breakdown voltage above 2 kV with an increased avalanche resistance. This means that the electric field reduces at the periphery of the mesa-etched p-n junction and is uniformly formed across the whole p-n junction. It is clear that high-k dielectric film passivation and filed plate termination are essential techniques for GaN power devices. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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2288 KiB  
Article
Gate Stability of GaN-Based HEMTs with P-Type Gate
by Matteo Meneghini, Isabella Rossetto, Vanessa Rizzato, Steve Stoffels, Marleen Van Hove, Niels Posthuma, Tian-Li Wu, Denis Marcon, Stefaan Decoutere, Gaudenzio Meneghesso and Enrico Zanoni
Electronics 2016, 5(2), 14; https://doi.org/10.3390/electronics5020014 - 25 Mar 2016
Cited by 33 | Viewed by 7902
Abstract
This paper reports on an extensive investigation of the gate stability of GaN-based High Electron Mobility Transistors with p-type gate submitted to forward gate stress. Based on combined electrical and electroluminescence measurements, we demonstrate the following results: (i) the catastrophic breakdown voltage of [...] Read more.
This paper reports on an extensive investigation of the gate stability of GaN-based High Electron Mobility Transistors with p-type gate submitted to forward gate stress. Based on combined electrical and electroluminescence measurements, we demonstrate the following results: (i) the catastrophic breakdown voltage of the gate diode is higher than 11 V at room temperature; (ii) in a step-stress experiment, the devices show a stable behavior up to VGS = 10 V, and a catastrophic failure happened for higher voltages; (iii) failure consists in the creation of shunt paths under the gate, of which the position can be identified by electroluminescence (EL) measurements; (iv) the EL spectra emitted by the devices consists of a broad emission band, centered around 500–550 nm, related to the yellow-luminescence of GaN; and (v) when submitted to a constant voltage stress tests, the p-GaN gate can show a time-dependent failure, and the time to failure follows a Weibull distribution. Full article
(This article belongs to the Special Issue Gallium Nitride Electronics)
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