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Journal: J. Low Power Electron. Appl., 2017
Volume: 7
Number: 7

Article: The Design and Implementation of a Low-Power Gating Scan Element in 32/28 nm CMOS Technology
Authors: by Mahshid Mojtabavi Naeini, Sreedharan Baskara Dass and Chia Yee Ooi
Link: https://www.mdpi.com/2079-9268/7/2/7

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