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Crystals 2017, 7(8), 250; doi:10.3390/cryst7080250

Simulation Model Development for Packaged Cascode Gallium Nitride Field-Effect Transistors

1
Department of Mechanical Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan
2
Department of Electrical and Electronic Engineering, Ta Hua University of Science and Technology, Hsinchu County 30740, Taiwan
*
Author to whom correspondence should be addressed.
Academic Editor: Ikai Lo
Received: 24 June 2017 / Revised: 4 August 2017 / Accepted: 6 August 2017 / Published: 9 August 2017
(This article belongs to the Special Issue Advances in GaN Crystals and Their Applications)
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Abstract

This paper presents a simple behavioral model with experimentally extracted parameters for packaged cascode gallium nitride (GaN) field-effect transistors (FETs). This study combined a level-1 metal–oxide–semiconductor field-effect transistor (MOSFET), a junction field-effect transistor (JFET), and a diode model to simulate a cascode GaN FET, in which a JFET was used to simulate a metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT). Using the JFET to simulate the MIS-HEMT not only ensures that the curve fits an S-shape transfer characteristic but also enables the pinch-off voltages extracted from the threshold voltage of the MIS-HEMT to be used as a watershed to distinguish where the drop in parasitic capacitance occurs. Parameter extraction was based on static and dynamic characteristics, which involved simulating the behavior of the created GaN FET model and comparing the extracted parameters with experimental measurements to demonstrate the accuracy of the simulation program with an integrated circuit emphasis (SPICE) model. Cascode capacitance was analyzed and verified through experimental measurements and SPICE simulations. The analysis revealed that the capacitance of low-voltage MOSFETs plays a critical role in increasing the overall capacitance of cascode GaN FETs. The turn-off resistance mechanism effectively described the leakage current, and a double-pulse tester was used to evaluate the switching performance of the fabricated cascode GaN FET. LTspice simulation software was adopted to compare the experimental switching results. Overall, the simulation results were strongly in agreement with the experimental results. View Full-Text
Keywords: GaN FET; MIS-HEMT; cascode; behavioral model; parasitic capacitance; turn-off resistance; SPICE GaN FET; MIS-HEMT; cascode; behavioral model; parasitic capacitance; turn-off resistance; SPICE
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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MDPI and ACS Style

Wu, C.-C.; Jeng, S.-L. Simulation Model Development for Packaged Cascode Gallium Nitride Field-Effect Transistors. Crystals 2017, 7, 250.

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