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Electric power systems are among the greatest achievements of the last century. Today, important issues, such as an ever-increasing demand, the flexible and reliable integration of distributed generation or a growth in disturbing loads, must be borne in mind. In this context, smart grids play a key role, allowing better efficiency of power systems. Power electronics provides solutions to the aforementioned matters, since it allows various energy sources to be integrated into smart grids. Nevertheless, the design of the various control schemes that are necessary for the correct operation of the power-electronic interface is a very important issue that must always be taken into consideration. This paper deals with the design of the control system of a distribution static synchronous compensator (DSTATCOM) based on flying-capacitor multilevel converters. The control system is tailored to compensate for both voltage sags by means of reactive-power injection and voltage imbalances caused by unbalanced loads. The design of the overall control is carried out by using the root-locus and frequency-response techniques, improving both the transient response and the steady-state error of the closed-loop system. Simulation results obtained using PSCAD™/EMTDC™ (Manitoba Hydro International Ltd., Commerce Drive, Winnipeg, MB, Canada) show the resultant voltage regulation.

Over the past century, electric power systems have been based on the paradigm of large power generation. Nevertheless, this paradigm has become obsolete, due to the depletion of conventional fuel supplies, such as oil and coal, the increase of demand, the availability of competitive distributed energy sources integrated into the grid and environmental issues [

Microgrids can operate in an interconnected mode or in an islanded mode, and require power-electronic converters, due to the nature of most of the distributed energy sources [

The key technologies involved in smart grids include integrated communications across the grid, advanced control schemes, sensing, metering and measuring, advanced grid components and decision support and human interfaces. Among these technologies, the evolution of the advanced grid components is one of the most relevant issues, such as the next generation of power system devices, which include flexible AC transmission system (FACTS) devices [

Static synchronous compensators (STATCOM) and distribution static synchronous compensators (DSTATCOM) are two FACTS devices based on a voltage-source converter (VSC), which are widely used to improve voltage regulation and harmonic elimination and to balance the grid current [

Although there are many aspects involved in the design and operation of STATCOM and DSTACOM devices, this paper focuses on two particular issues: the VSC topology and the design of the control system.

For low-voltage and low-power applications, STATCOMs and DSTACOMs based on two-level VSCs are normally used. Nevertheless, as the rating of these devices continues to increase in the realm of reactive-power compensation, the power electronic converters are beginning to be higher-voltage points of the grid. In this way, multilevel converter topologies are at present the most popular topologies for high voltage applications: they have been advanced as a means to reduce the voltage stress on the switching devices [

Although there are many proposals of control system strategies for the operation of both the STATCOM and the DSTATCOM, one of the most popular is the vector control theory [

This paper deals with the design of a control system for a DSTATCOM, which employs a five-level flying-capacitor VSC. The DSTATCOM is tailored to inject up to 100 MVAr and is connected to a 13.8 kV distribution grid. The work focuses on the design methodology of the overall control system and uses classical linear control tools, such as the root-locus and frequency-response techniques, in order to tailor the control scheme. The control architecture employs the synchronous reference frame method and implements proportional-integral regulators combined with resonant-type regulators [

The paper is organized as follows. The dynamic model of the DSTACOM and the five-level flying-capacitor VSC topology are presented in Section 2. The configuration of the overall control system is explained in Section 3, and the various control subsystems are detailed, which are the voltage in the DC capacitor controller, the controller of the voltage at the coupling point, the control structure for the balancing of the grid current and the control algorithm to maintain the flying capacitor voltages balanced. The design of the various parameters of the control system is studied in Section 4. In addition, simulation results obtained by the implementation of the control system in PSCAD/EMTDC are also presented in this section. The main conclusions of this study are provided in Section 5.

The basic configuration of a DSTATCOM is shown in _{g}_{g}

The equivalent circuit of the DSTATCOM connected at the PCC is depicted in _{s}_{g}_{g}_{g}_{L}

The five-level FC converter configuration is shown in _{1}, _{2} and _{3}, must be charged to 3_{dc}_{dc}_{dc}_{dc}

The dynamic equation of the system plotted in _{1}. Under the assumption that a three-wire VSTC is used, the homopolar component of the current, _{d}_{q}_{d}_{q}_{1}, the PCC voltage, _{d}

Since the homopolar component of the current,

The variables, _{d}_{q}_{d}

It should be noted that System _{d}_{q}_{d}_{q}_{d}_{q}_{FC}_{C}_{t}_{R}_{L}_{L}_{vsc}_{C}_{d}

The main objective of the control system is three-fold: to contribute toward maintaining the grid voltage constant by means of either the injection or absorption of reactive power; to eliminate possible imbalances in the grid current, which can cause voltage imbalances at the PCC, and to control and to keep constant at a sufficient level the voltage in the DC capacitor to a proper operation of the DSTATCOM.

The superscript asterisk stands for reference values, and the control structure of each axis (_{r}_{d}_{q}_{A}_{B}_{C}

The design of the different regulators is carried out using the decoupled system

The voltage in the DC capacitor is controlled by means of the current, _{d}_{i}_{vdc}

A proportional-integral (PI) regulator is proposed for the control of the current, _{d}_{d}_{i}_{i}_{p}

Nevertheless, Controller

The controller, _{vdc}_{d}_{d}

The proposed control law for the regulator, _{vdc}_{idc}_{pdc}_{vdc}_{d}

An additional feature of controller _{vdc}

As in the previous control scheme, the control of the PCC voltage also uses a configuration of two nested control loops. In this case, the voltage at the PCC can be modified by controlling the current, _{q}

The inner control loop employs the regulator, _{i}_{i}

The controller for the voltage at the PCC, _{vpcc}_{iv}_{rms}(_{rms}(_{d}_{q}_{vpcc}

The previously explained control schemes are able to regulate the voltage at the PCC when operating under balanced conditions (e.g., compensation of balanced voltage sags), as all the variables are transformed into DC quantities in the SRF. The approach in which PI regulators are used therefore provides a satisfactory result. Nevertheless, unbalanced loads and unbalanced short-circuit faults cause current imbalances, which result in voltage imbalances [

As the internal model principle (IMP) determines that, in order to obtain zero tracking error, a stable closed-loop system must include the generating polynomials of the reference input and the disturbance input in the denominator of the open-loop system [_{1} in its denominator, is therefore proposed.

According to _{g}_{L}_{ig}_{R}_{1} (_{PL}

The output of the closed-loop control system shown in

The frequency responses of the transfer functions, _{D}_{1}) = 1 and _{D}_{1}) = 0, respectively. The time response of _{1}. Moreover, as the term, _{R}_{ig}_{i}

Different switching schemes can be used to control the output voltage of an FC multilevel converter: when a high switching frequency is required, one of the most frequently used techniques is that of the phase-shifted SPWM (sinusoidal pulse-width modulation) switching method, since its implementation is simple. For a given number of levels, _{1}, which is compared with a number of triangular carrier signals with frequency _{sw}_{sw}

An additional controller with which to balance the FC voltages is also required in order to cancel out possible voltage imbalances. The cause of these voltage imbalances may be asymmetrical conditions in the converter parameters or differences in the switching of the power devices. The solution implemented in this paper was originally proposed in [_{sq}

An hysteresis comparator is used to compare the FC voltage with its reference. The output of this comparator is driven by a logic function that calculates the value of

The test system depicted in

Load 1 (inductive-resistive load): active power 30 MW and reactive power 18 MVAr.

Load 2 (inductive-resistive load): active power 70 MW and reactive power 35 MVAr.

Load 3 (resistive load): active power 7.5 MW.

The loads are connected sequentially by means of circuit breakers. The DSTATCOM is connected to the PCC by means of the secondary side of a three-phase transformer with a winding ratio of 20 kV/75 kV. The transformer's primary and secondary windings are delta and star connected, respectively. The resistance and the leakage inductance of the transformer, referred to the 20 kV, secondary side, are _{g}_{sw}_{sw}

The different regulators in the control system have been designed using the root-locus and the frequency-response techniques. The controllers, _{i}_{1} = _{2} = −1, 000, as shown in _{i}_{p}

The controller, _{vdc}_{1} = −100 and _{2} = −20, which is the dominant pole. The dynamics associated with pole _{1} can therefore be ignored in comparison with that obtained with pole _{2} [_{1} = −100 and _{2} = −20) for the voltage control of the DC capacitor. The gains of the controller _{idc}_{pdc}_{vdc}

The controller for the PCC voltage has been designed by including a first-order low pass filter in the voltage measurement with transfer function:
_{Vpcc}_{iv}

The criteria used to design the regulator, _{ig}_{i}_{o}_{2}, where _{2} is twice the fundamental frequency (

The design procedure to obtain the parameters of Regulator _{PL}^{−3} and _{ig}_{o}_{2}, whereas the resulting time response of the closed-loop system when the reference is a sinusoidal input of frequency 2ω_{1} is plotted in _{1}; in this case, the control system is also able to reject the disturbance.

Having shown the design of the overall control system, details are now provided of a comprehensive simulation case: the DSTATCOM is initially connected to the grid; the control system of the voltage in the DC capacitor, the FC voltage control and the controllers for the currents, _{d}_{q}

_{d}_{d}_{q}

At instant

Although the controller used to balance the grid current has been designed to eliminate current imbalances, which only contain positive and negative sequences, it should be stressed that this design can also be extended to compensate for those imbalances that involve the homopolar component. Furthermore, various resonant regulators can be used in parallel in order to eliminate current harmonics.

The time response of the voltage in the DC capacitor is shown in

_{1}, 60 kV for _{2} and 30 kV for _{3}. Once the FC voltages are equal to their references, the amplitude of the square wave is reduced to 5 kV at

The line-to-line output voltage of the five-level FC VSC corresponding to the time interval 0.64 s ≤

This paper has presented the design of a control system for the operation of a DSTATCOM based on a five-level flying-capacitor VSC connected to a distribution grid. The control system is tailored to compensate for voltage sags and voltage imbalances caused by unbalanced loads. The compensation of these voltage imbalances is achieved by balancing the grid current. The overall control system is split into various subsystems: the first one is responsible for controlling the voltage in the DC capacitor; a second subsystem works to regulate the voltage at the PCC, whereas a third subsystem is employed to balance the grid current. Finally, a fourth control scheme deals with the balancing of the voltages in the flying capacitors. Basic linear regulators are used in the design, such as PI controllers and resonant controllers. The design has been carried out using classical linear control tools, namely, the root-locus and the frequency response techniques, with special attention paid to the criteria and specifications of the design. This fact allows one not only to obtain a better time response of the overall control system, but also to provide a design methodology that can be used to add more functionalities to the DSTATCOM, such as compensation or current harmonics by adding various resonant controllers in parallel.

The DSTATCOM and the control system have been implemented in PSCAD/EMTDC. The simulation results obtained show that the DSTATCOM performs very effectively in terms of dynamics and steady-state error when compensating for voltage sags and voltage imbalances.

This work has been partially supported by the Ministry of Economy and Competitiveness of Spain under the research project, ENE2012-33541.

The authors declare no conflicts of interest.

Example of a grid feeding three loads and a distribution static synchronous compensator (DSTATCOM) connected to the point of common coupling (PCC). Brk, Circuit breaker.

One-line equivalent circuit of the DSTATCOM.

Phase leg of a five-level flying-capacitor convertor.

Block diagram of the control system of the DSTATCOM. PLL, phase locked loop.

Simplified control system for the grid current. Subscript

Root locus for the current control, _{i}

Step response obtained with the current control, _{i}

Root locus for the control of the DC-capacitor voltage, _{vdc}

Step response obtained with the control of the DC-capacitor voltage, _{vdc}

Bode diagrams of the frequency response of the open-loop system: (

Time response of the closed-loop system for: (_{1}; and (_{1}.

RMS voltage at the PCC.

Waveforms obtained for several time intervals: (_{d}_{q}_{gd}_{gq}_{gd}_{gq}_{d}_{q}

Voltage in the DC capacitor.

Voltages of the flying capacitors (leg _{C}_{1} (blue), _{C}_{2} (green) and _{C}_{3} (red).

Line-to-line output voltage of the five-level flying-capacitor (FC) VSC (0.64 s ≤