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Sensors 2013, 13(3), 3848-3877; doi:10.3390/s130303848
Article

Efficient VLSI Architecture for Training Radial Basis Function Networks

 and *
Received: 21 February 2013; in revised form: 11 March 2013 / Accepted: 14 March 2013 / Published: 19 March 2013
(This article belongs to the Section Physical Sensors)
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Abstract: This paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. The architecture contains the circuits for fuzzy C-means (FCM) and the recursive Least Mean Square (LMS) operations. The FCM circuit is designed for the training of centers in the hidden layer of the RBF network. The recursive LMS circuit is adopted for the training of connecting weights in the output layer. The architecture is implemented by the field programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for real-time training and classification. Experimental results reveal that the proposed RBF architecture is an effective alternative for applications where fast and efficient RBF training is desired.
Keywords: reconfigurable computing; system on programmable chip; FPGA; radial basis function; fuzzy C-means reconfigurable computing; system on programmable chip; FPGA; radial basis function; fuzzy C-means
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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MDPI and ACS Style

Fan, Z.-C.; Hwang, W.-J. Efficient VLSI Architecture for Training Radial Basis Function Networks. Sensors 2013, 13, 3848-3877.

AMA Style

Fan Z-C, Hwang W-J. Efficient VLSI Architecture for Training Radial Basis Function Networks. Sensors. 2013; 13(3):3848-3877.

Chicago/Turabian Style

Fan, Zhe-Cheng; Hwang, Wen-Jyi. 2013. "Efficient VLSI Architecture for Training Radial Basis Function Networks." Sensors 13, no. 3: 3848-3877.


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