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FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification
Department of Electronic Engineering, National Ilan University, Yilan 260, Taiwan
Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei 116, Taiwan
* Author to whom correspondence should be addressed.
Received: 26 March 2012; in revised form: 2 May 2012 / Accepted: 2 May 2012 / Published: 10 May 2012
Abstract: This paper presents a novel hardware architecture for principal component analysis. The architecture is based on the Generalized Hebbian Algorithm (GHA) because of its simplicity and effectiveness. The architecture is separated into three portions: the weight vector updating unit, the principal computation unit and the memory unit. In the weight vector updating unit, the computation of different synaptic weight vectors shares the same circuit for reducing the area costs. To show the effectiveness of the circuit, a texture classification system based on the proposed architecture is physically implemented by Field Programmable Gate Array (FPGA). It is embedded in a System-On-Programmable-Chip (SOPC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient design for attaining both high speed performance andlow area costs.
Keywords: system on programmable chip; reconfigurable computing; principal component analysis; generalized Hebbian algorithm; texture classification; FPGA
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Lin, S.-J.; Hwang, W.-J.; Lee, W.-H. FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification. Sensors 2012, 12, 6244-6268.
Lin S-J, Hwang W-J, Lee W-H. FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification. Sensors. 2012; 12(5):6244-6268.
Lin, Shiow-Jyu; Hwang, Wen-Jyi; Lee, Wei-Hao. 2012. "FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification." Sensors 12, no. 5: 6244-6268.